software/arm-trusted-firmware.git/include/lib/cpus/aarch64/cpu_macros.S, branch master

feat: place errata into their own section

2026-06-30T14:56:12+00:00

This patch moves CPU reset functions and reset errata workarounds into their own linker subsections .text.errata and .rodata.errata, as well as modifies CPU macros to allow this. When BL31 LFA is integrated later, this allows these subsections to be grouped together and padded, allowing them to be updated during live activation without affectinn the rest of the BL31 image. Signed-off-by: John Powell Change-Id: Id6f248fa796a998152e4e0b946fa3717cb0cfbf6

fix(cpus): check __clang_major__ is defined

2026-06-22T17:42:36+00:00

First check __clang_major__ is defined, before checking its value. This is done the same way in lib/compiler-rt/builtins/int_types.h. This corrects a compiler warning with -Wundef. Change-Id: Ibd8b1014542e787eece799934b9c8bf8f93bb21a Signed-off-by: Yann Gautier

feat(cpus): add sysreg_lazy_* macros for batched read-modify-write

2026-04-23T17:47:39+00:00

This patch introduces five assembly macros that collapse multiple bit-manipulation operations on the same system register into a single mrs/msr pair: sysreg_lazy_start _reg -- read register into x1 sysreg_lazy_set _bit -- ORR bit into x1 (any 64-bit mask) sysreg_lazy_clear _bit -- BIC bit from x1 (any 64-bit mask) sysreg_lazy_insert _src, _lsb, _width -- BFI into x1 sysreg_lazy_commit _reg -- write x1 back to register Each sysreg_bit_set / sysreg_bit_clear / sysreg_bitfield_insert call issues its own mrs+msr pair. When several of those target the same register the reads and writes are redundant. The lazy helpers replace N reads and N writes with one read and one write. x1 holds the accumulated register value between start and commit. x0 is used as a scratch register by sysreg_lazy_set, sysreg_lazy_clear, and sysreg_lazy_insert. mov_imm is used for bit values to support arbitrary 64-bit masks, consistent with the existing hand-written mrs/mov_imm/orr/msr patterns in CPU files. Change-Id: Iaaf0e4bd7ba85c69d9063b012a9066b3ba40b58e Signed-off-by: Varun Wadekar

perf(cpus): reduce the footprint of errata reporting

2026-01-08T09:28:54+00:00

Since the advent of spin_trylock() it's possible to combine the spinlock with the errata_reported field. If the spinlock is only acquired with a non-blocking call then a successful call means reporting should be done and an unsuccessful one means that reporting would have been done by whoever acquired it. This relies on the lock never being released which this patch does. The effect is a smaller memory footprint and a smaller runtime. Change-Id: I215a84bd2c91e33703349c41fc59f654f7764b2f Signed-off-by: Boyan Karatotev

feat(psci): check that CPUs handled a pabandon

2025-07-25T09:37:03+00:00

Up to now PSCI assumed that if a pabandon happened then the CPU driver will have handled it. This patch adds a simple protocol to make sure that this is indeed the case. The chosen method is with a return value that is highly unlikely on cores that are unaware of pabandon (x0 will be primed with 1 and if used should be overwritten with the value of CPUPWRCTLR_EL1 which should have its last bit set to power off and its top bits RES0; the ACK value is chosen to be the exact opposite). An alternative method would have been to add a field in cpu_ops, however that would have required more major refactoring across many cpus and would have taken up more memory on older platforms, so it was not chosen. Change-Id: I5826c0e4802e104d295c4ecbd80b5f676d2cd871 Signed-off-by: Boyan Karatotev

feat(cpus): update cpu_check_csv2 check

2025-06-04T15:08:37+00:00

Update the cpu_check_csv2 logic to allow ID_AA64PFR0_EL1.CSV2 values up to 3. With the introduction of FEAT_CSV2_3, the architectural limit for CSV2 has been extended, making values from 0 to 3 valid. Signed-off-by: Arvind Ram Prakash Change-Id: I8473047ed4ad759b7b506161a76774ac21555d31

Merge changes I005586ef,I0d4d74bc into integration

2025-04-25T14:09:02+00:00

* changes: fix(cpufeat): replace "bti" mnemonic with hint instructions fix(cpufeat): improve xpaci wrapper

fix(cpufeat): replace "bti" mnemonic with hint instructions

2025-04-25T14:08:06+00:00

Older GNU binutils version require to specify at least "armv8.5-a" for the ARM architecture revision to accept "bti" instructions in the assembly code. Binutils v2.35 have relaxed this, since "bti" is in the hint space, so is ignored on older cores and does NOT require a BTI enabled core to execute. To not exclude those older binutils versions (as shipped with Ubuntu 20.04), use the "hint" encoding for the "bti" instructions, which are accepted regardless of the minimum architecture revision. Hide this encoding in a macro, to make the "bti" usage more readable in the source code. Change-Id: I005586efd8974a3f2c7202896c881bb5fed07eea Signed-off-by: Andre Przywara

refactor(cpus): optimize CVE checking

2025-04-23T14:57:01+00:00

This patch replaces the use of EXTRA functions with using erratum entries check to verify CVE mitigation application for some of the SMCCC_ARCH_WORKAROUND_* calls. Previously, EXTRA functions were individually implemented for each SMCCC_ARCH_WORKAROUND_*, an approach that becomes unmanageable with the increasing number of workarounds. By looking up erratum entries for CVE check, the process is streamlined, reducing overhead associated with creating and maintaining EXTRA functions for each new workaround. New Errata entries are created for SMC workarounds and that is used to target cpus that are uniquely impacted by SMC workarounds. Signed-off-by: Arvind Ram Prakash Change-Id: I873534e367a35c99461d0a616ff7bf856a0000af

fix(cpus): fix clang compilation issue

2025-04-08T15:47:17+00:00

A potential problem with clang version < 17 can cause resolving nested 'cfi_startproc' to fail compilation. So add a variant of check_errara/reset_macros that is compatible with clang version < 17 to ignore `cfi_startproc` and `cfi_endproc`. This wouldn't cause any performance issue and will not affect any functional behaviour. Change-Id: I46147af2dd0accd5be14ddb26dea03bb2f87cba8 Signed-off-by: Govindraj Raja