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| author | Lauren Wehrmeister <lauren.wehrmeister@arm.com> | 2026-01-06 18:57:27 +0000 |
|---|---|---|
| committer | TrustedFirmware Code Review <review@review.trustedfirmware.org> | 2026-01-06 18:57:27 +0000 |
| commit | a4defaefe65379554f464e9cf2b4f4d9818740aa (patch) | |
| tree | 3241f592d484e40435c8c94000be5fc69f2add33 | |
| parent | 8f54a00aec6c317957aa86b3835c062292025d65 (diff) | |
| parent | 5b77dd10baef346aed4a9dab09f1c2ce83aea466 (diff) | |
| download | arm-trusted-firmware-a4defaefe65379554f464e9cf2b4f4d9818740aa.tar.gz arm-trusted-firmware-a4defaefe65379554f464e9cf2b4f4d9818740aa.zip | |
Merge changes from topic "xl/cortex-x2-errata" into integration
* changes:
fix(cpus): workaround for Cortex-X2 erratum 4302969
fix(cpus): workaround for Cortex-X2 erratum 3888122
| -rw-r--r-- | docs/design/cpu-specific-build-macros.rst | 8 | ||||
| -rw-r--r-- | lib/cpus/aarch64/cortex_x2.S | 12 | ||||
| -rw-r--r-- | lib/cpus/cpu-ops.mk | 8 |
3 files changed, 28 insertions, 0 deletions
diff --git a/docs/design/cpu-specific-build-macros.rst b/docs/design/cpu-specific-build-macros.rst index 9782f1b89..fbd1a4366 100644 --- a/docs/design/cpu-specific-build-macros.rst +++ b/docs/design/cpu-specific-build-macros.rst @@ -919,6 +919,14 @@ For Cortex-X2, the following errata build flags are defined : CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the CPU and is still open. +- ``ERRATA_X2_3888122``: This applies errata 3888122 workaround to Cortex-X2 + CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the + CPU and is still open. + +- ``ERRATA_X2_4302969``: This applies errata 4302969 workaround to Cortex-X2 + CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the + CPU and is still open. + For Cortex-X3, the following errata build flags are defined : - ``ERRATA_X3_2266875``: This applies errata 2266875 workaround to the Cortex-X3 diff --git a/lib/cpus/aarch64/cortex_x2.S b/lib/cpus/aarch64/cortex_x2.S index 49ca4800a..54b145b1b 100644 --- a/lib/cpus/aarch64/cortex_x2.S +++ b/lib/cpus/aarch64/cortex_x2.S @@ -233,6 +233,18 @@ add_erratum_entry cortex_x2, ERRATUM(3701772), ERRATA_X2_3701772 check_erratum_ls cortex_x2, ERRATUM(3701772), CPU_REV(2, 1) +workaround_reset_start cortex_x2, ERRATUM(3888122), ERRATA_X2_3888122 + sysreg_bit_set CORTEX_X2_CPUACTLR2_EL1, BIT(22) +workaround_reset_end cortex_x2, ERRATUM(3888122) + +check_erratum_ls cortex_x2, ERRATUM(3888122), CPU_REV(2, 1) + +workaround_reset_start cortex_x2, ERRATUM(4302969), ERRATA_X2_4302969 + sysreg_bit_set CORTEX_X2_CPUACTLR5_EL1, BIT(50) +workaround_reset_end cortex_x2, ERRATUM(4302969) + +check_erratum_ls cortex_x2, ERRATUM(4302969), CPU_REV(2, 1) + workaround_reset_start cortex_x2, CVE(2022, 23960), WORKAROUND_CVE_2022_23960 #if IMAGE_BL31 /* diff --git a/lib/cpus/cpu-ops.mk b/lib/cpus/cpu-ops.mk index dad8218fa..4cb318a68 100644 --- a/lib/cpus/cpu-ops.mk +++ b/lib/cpus/cpu-ops.mk @@ -921,6 +921,14 @@ CPU_FLAG_LIST += ERRATA_X2_3324338 # of the Cortex-X2 cpu and is still open. CPU_FLAG_LIST += ERRATA_X2_3701772 +# Flag to apply erratum 3888122 workaround during reset. This erratum applies +# to revisions r0p0, r1p0, r2p0 and r2p1 of the Cortex-X2 cpu and is still open. +CPU_FLAG_LIST += ERRATA_X2_3888122 + +# Flag to apply erratum 4302969 workaround during reset. This erratum applies +# to revisions r0p0, r1p0, r2p0 and r2p1 of the Cortex-X2 cpu and is still open. +CPU_FLAG_LIST += ERRATA_X2_4302969 + # Flag to apply erratum 2266875 workaround during reset. This erratum applies # to revisions r0p0 and r1p0 of the Cortex-X3 cpu, it is fixed in r1p1. CPU_FLAG_LIST += ERRATA_X3_2266875 |