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authorGovindraj Raja <govindraj.raja@arm.com>2026-01-08 16:02:18 +0000
committerTrustedFirmware Code Review <review@review.trustedfirmware.org>2026-01-08 16:02:18 +0000
commitdee3312e6c62a078c3204bf715248dfdf7288906 (patch)
tree8d4d8120870665dab086e382a60e49ad659c33af
parent3f637a40d624a9b620284f9e9ddc42706e02234c (diff)
parentcf14b88725c775fd087248b0aa77959e3192b903 (diff)
downloadarm-trusted-firmware-dee3312e6c62a078c3204bf715248dfdf7288906.tar.gz
arm-trusted-firmware-dee3312e6c62a078c3204bf715248dfdf7288906.zip
Merge "fix(el3-runtime): actually check for the EA bit on exception entry" into integration
-rw-r--r--common/runtime_svc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/common/runtime_svc.c b/common/runtime_svc.c
index 588d8f0d1..aac804346 100644
--- a/common/runtime_svc.c
+++ b/common/runtime_svc.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2013-2025, Arm Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2026, Arm Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
@@ -258,7 +258,7 @@ void handler_sync_exception(cpu_context_t *ctx)
return;
/* If FFH Support then try to handle lower EL EA exceptions. */
} else if ((exc_class == EC_IABORT_LOWER_EL || exc_class == EC_DABORT_LOWER_EL)
- && (read_ctx_reg(state, CTX_SCR_EL3) | SCR_EA_BIT)) {
+ && ((read_ctx_reg(state, CTX_SCR_EL3) & SCR_EA_BIT) != 0UL)) {
#if FFH_SUPPORT
/*
* Check for Uncontainable error type. If so, route to the