<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/next/linux-next.git/drivers/clk/qcom/Makefile, branch stable</title>
<subtitle>The linux-next integration testing tree</subtitle>
<id>https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/atom?h=stable</id>
<link rel='self' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/atom?h=stable'/>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/'/>
<updated>2026-06-07T00:50:16+00:00</updated>
<entry>
<title>clk: qcom: camcc-x1p42100: Add support for camera clock controller</title>
<updated>2026-06-07T00:50:16+00:00</updated>
<author>
<name>Jagadeesh Kona</name>
<email>jagadeesh.kona@oss.qualcomm.com</email>
</author>
<published>2026-05-07T05:38:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=10524682d1b8e1cf2e83afe3bcabd2cc69a0a5c4'/>
<id>urn:sha1:10524682d1b8e1cf2e83afe3bcabd2cc69a0a5c4</id>
<content type='text'>
Add support for the camera clock controller for camera clients to
be able to request for camcc clocks on X1P42100 platform. Although
X1P42100 is derived from X1E80100, the camera clock controller driver
differs significantly. Few PLLs, clocks and GDSC's are removed, there
is delta in frequency tables for most RCG's and parent data structures
also changed for few RCG's. Hence introduce a separate camcc driver
for X1P42100 platform.

Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Reviewed-by: Taniya Das &lt;taniya.das@oss.qualcomm.com&gt;
Signed-off-by: Jagadeesh Kona &lt;jagadeesh.kona@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260507-purwa-videocc-camcc-v5-5-fc3af4130282@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: videocc-x1p42100: Add support for video clock controller</title>
<updated>2026-06-07T00:50:16+00:00</updated>
<author>
<name>Jagadeesh Kona</name>
<email>jagadeesh.kona@oss.qualcomm.com</email>
</author>
<published>2026-05-07T05:38:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=cfc34906768cb8ee2c6ab0dc83f0a57cc6410d59'/>
<id>urn:sha1:cfc34906768cb8ee2c6ab0dc83f0a57cc6410d59</id>
<content type='text'>
Add support for the video clock controller for video clients to be
able to request for videocc clocks on X1P42100 platform. Although
X1P42100 is derived from X1E80100, the video clock controller differs
significantly. The BSE clocks are newly added, several cdiv clocks have
been removed, and most RCG frequency tables have been updated. Initial
PLL configurations also require changes, hence introduce a separate
videocc driver for X1P42100 platform.

Reviewed-by: Taniya Das &lt;taniya.das@oss.qualcomm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Signed-off-by: Jagadeesh Kona &lt;jagadeesh.kona@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260507-purwa-videocc-camcc-v5-3-fc3af4130282@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Add support for global clock controller on Hawi</title>
<updated>2026-05-13T16:52:47+00:00</updated>
<author>
<name>Vivek Aknurwar</name>
<email>vivek.aknurwar@oss.qualcomm.com</email>
</author>
<published>2026-05-06T16:50:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=67121dad6cba6df7f5d8c21fa432ff543964c53f'/>
<id>urn:sha1:67121dad6cba6df7f5d8c21fa432ff543964c53f</id>
<content type='text'>
Add support for the global clock controller (GCC) on the
Qualcomm Hawi SoC.

Reviewed-by: Taniya Das &lt;taniya.das@oss.qualcomm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Reviewed-by: Mike Tipton &lt;mike.tipton@oss.qualcomm.com&gt;
Signed-off-by: Vivek Aknurwar &lt;vivek.aknurwar@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260506-clk-hawi-v3-7-530b538679f1@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Add Hawi TCSR clock controller driver</title>
<updated>2026-05-13T16:52:46+00:00</updated>
<author>
<name>Vivek Aknurwar</name>
<email>vivek.aknurwar@oss.qualcomm.com</email>
</author>
<published>2026-05-06T16:50:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=24ba8ce4c9867e4224bb22ab3a50838d073fe13a'/>
<id>urn:sha1:24ba8ce4c9867e4224bb22ab3a50838d073fe13a</id>
<content type='text'>
Add support for the TCSR clock controller found on the Qualcomm Hawi SoC.
This controller provides reference clocks for various peripherals
including PCIe, UFS, and USB.

Reviewed-by: Taniya Das &lt;taniya.das@oss.qualcomm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Reviewed-by: Mike Tipton &lt;mike.tipton@oss.qualcomm.com&gt;
Signed-off-by: Vivek Aknurwar &lt;vivek.aknurwar@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260506-clk-hawi-v3-5-530b538679f1@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: add Global Clock controller (GCC) driver for IPQ9650 SoC</title>
<updated>2026-05-11T23:14:08+00:00</updated>
<author>
<name>Kathiravan Thirumoorthy</name>
<email>kathiravan.thirumoorthy@oss.qualcomm.com</email>
</author>
<published>2026-05-07T17:08:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=76fc060df67c7d3c0ca9613ebcc1e5c257c325d9'/>
<id>urn:sha1:76fc060df67c7d3c0ca9613ebcc1e5c257c325d9</id>
<content type='text'>
Add support for the global clock controller found on IPQ9650 SoC.

Signed-off-by: Kathiravan Thirumoorthy &lt;kathiravan.thirumoorthy@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260507-ipq9650_boot_to_shell-v3-2-62742b49c991@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Add support for GXCLK for Milos</title>
<updated>2026-04-27T19:31:35+00:00</updated>
<author>
<name>Luca Weiss</name>
<email>luca.weiss@fairphone.com</email>
</author>
<published>2026-04-17T07:07:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=3df6b9dbd24e1610854c17a8ec4ac146481b8e42'/>
<id>urn:sha1:3df6b9dbd24e1610854c17a8ec4ac146481b8e42</id>
<content type='text'>
GXCLKCTL (Graphics GX Clock Controller) is a block dedicated to managing
clocks for the GPU subsystem on GX power domain. The GX clock controller
driver manages only the GX GDSC and the rest of the resources of the
controller are managed by the firmware.

We can use the existing kaanapali driver for Milos as well since the
GX_CLKCTL_GX_GDSC supported by the Linux driver requires the same
configuration.

Reviewed-by: Jagadeesh Kona &lt;jagadeesh.kona@oss.qualcomm.com&gt;
Reviewed-by: Taniya Das &lt;taniya.das@oss.qualcomm.com&gt;
Reviewed-by: Dmitry Baryshkov &lt;dmitry.baryshkov@oss.qualcomm.com&gt;
Signed-off-by: Luca Weiss &lt;luca.weiss@fairphone.com&gt;
Link: https://lore.kernel.org/r/20260417-milos-gxclkctl-v3-2-08f5988c43a2@fairphone.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: gcc: Add multiple global clock controller driver for Nord SoC</title>
<updated>2026-04-09T02:00:09+00:00</updated>
<author>
<name>Taniya Das</name>
<email>taniya.das@oss.qualcomm.com</email>
</author>
<published>2026-04-03T14:10:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=a4f780cd5c7aa8c0d2d044ffd153f7a3a13ca81e'/>
<id>urn:sha1:a4f780cd5c7aa8c0d2d044ffd153f7a3a13ca81e</id>
<content type='text'>
The global clock controller on the Nord SoC is partitioned into
GCC, SE_GCC, NE_GCC, and NW_GCC. Introduce driver support for each
of these controllers.

Signed-off-by: Taniya Das &lt;taniya.das@oss.qualcomm.com&gt;
[Shawn: Drop include of &lt;linux/of.h&gt; as the driver doesn't use any OF APIs]
Co-developed-by: Shawn Guo &lt;shengchao.guo@oss.qualcomm.com&gt;
Signed-off-by: Shawn Guo &lt;shengchao.guo@oss.qualcomm.com&gt;
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260403-nord-clks-v1-6-018af14979fd@oss.qualcomm.com
[bjorn: Added missing .use_rpm to gcc_nord_desc]
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Add TCSR clock driver for Nord SoC</title>
<updated>2026-04-09T01:57:01+00:00</updated>
<author>
<name>Taniya Das</name>
<email>taniya.das@oss.qualcomm.com</email>
</author>
<published>2026-04-03T14:10:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=9d13c7bbee5f789738a645df5868b69da5ae3879'/>
<id>urn:sha1:9d13c7bbee5f789738a645df5868b69da5ae3879</id>
<content type='text'>
Add a clock driver for the TCSR clock controller found on Nord SoC,
which provides refclks for PCIE, USB, SGMII, UFS subsystems.

[Shawn:
- Use compatible qcom,nord-tcsrcc
- Drop include of &lt;linux/of.h&gt; as the driver doesn't use any OF APIs]

Signed-off-by: Taniya Das &lt;taniya.das@oss.qualcomm.com&gt;
Co-developed-by: Shawn Guo &lt;shengchao.guo@oss.qualcomm.com&gt;
Signed-off-by: Shawn Guo &lt;shengchao.guo@oss.qualcomm.com&gt;
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260403-nord-clks-v1-4-018af14979fd@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: Add a driver for SM8750 GPU clocks</title>
<updated>2026-03-30T14:09:49+00:00</updated>
<author>
<name>Konrad Dybcio</name>
<email>konrad.dybcio@oss.qualcomm.com</email>
</author>
<published>2026-03-05T10:40:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=5af11acae6608d3b1175aea86bac06f267c6db14'/>
<id>urn:sha1:5af11acae6608d3b1175aea86bac06f267c6db14</id>
<content type='text'>
Support the graphics clock controller for SM8750 for Graphics SW
driver to use the clocks. GXCLKCTL (Graphics GX Clock Controller) is a
block dedicated to managing clocks for the GPU subsystem on GX power
domain. The GX clock controller driver manages only the GX GDSC and the
rest of the resources of the controller are managed by the firmware.

Update the compatible for Graphics GX Clock Controller for SM8750 as the
GX clock controller is a reuse of the Kaanapali driver.

Reviewed-by: Abel Vesa &lt;abel.vesa@oss.qualcomm.com&gt;
Signed-off-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Co-developed-by: Taniya Das &lt;taniya.das@oss.qualcomm.com&gt;
Signed-off-by: Taniya Das &lt;taniya.das@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260305-gpucc_sm8750_v2-v5-2-78292b40b053@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>clk: qcom: dispcc-eliza: Add Eliza display clock controller support</title>
<updated>2026-03-23T16:30:33+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-03-19T11:49:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=0e66f10942b531a7521da97e4bdab0bdfcfc2e6f'/>
<id>urn:sha1:0e66f10942b531a7521da97e4bdab0bdfcfc2e6f</id>
<content type='text'>
Add a driver for the display clock controller on Qualcomm Eliza SoC,
which is copied from SM8750 driver plus changes:

1. Additional DT_HDMI_PHY_PLL_CLK clock input,
2. Eight new HDMI clocks,
3. Different PLLs (lucid and pongo).

Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@oss.qualcomm.com&gt;
Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260319-clk-qcom-dispcc-eliza-v3-2-d1f2b19a6e6b@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
</feed>
