kernel/git/next/linux-next.git/drivers/clk/samsung, branch master

Merge branch 'clk-next' of ssh://git@gitolite.kernel.org/pub/scm/linux/kernel/git/clk/linux.git

2026-09-22T09:28:48+00:00

clk: samsung: acpm: add Exynos850 support

2026-09-20T15:11:54+00:00

The Exynos850 SoC utilizes the APM co-processor for clock management via ACPM, similar to the GS101 SoC. Add the Exynos850-specific clock variant array (including mif, int, cpucl0, cpucl1, g3d, aud, cam, disp, and cp) and wire it up to the driver data infrastructure. Add the "exynos850-acpm-clk" device ID to enable dynamic instantiation of these clocks during probe(). Unlike GS101, the ACPM firmware on Exynos850 does not implement a dynamic rate read call over ACPM IPC. To return sane clock rate in ->recalc_rate introduce a SoC-specific ->get_rate() driver data callback. For Exynos850, this falls back to reading the upstream parent CMU clock rate. When ->get_rate() is set, populate pdata.fw_name during clock registration to let clock framework to link the parent clock. Signed-off-by: Alexey Klimov Link: https://patch.msgid.link/20260915-exynos850-acpm-clk-v2-2-ffad4a6b3fb1@linaro.org Signed-off-by: Krzysztof Kozlowski

clk: samsung: acpm: introduce driver data for SoC-specific clocks

2026-09-20T15:11:53+00:00

Currently, the ACPM clock driver hardcodes the GS101 clock variant arrays and counts directly in probe() routine. To support additional other SoCs (for instance Exynos850 SoC) that use the same ACPM protocol but have different clock trees, the driver needs to be more flexible. Introduce driver data attached to the platform_device_id table. Update the probe function to dynamically extract the clock lists, number of clocks, its names and mailbox channel id based on the matching device ID. Reviewed-by: Tudor Ambarus Signed-off-by: Alexey Klimov Link: https://patch.msgid.link/20260915-exynos850-acpm-clk-v2-1-ffad4a6b3fb1@linaro.org [krzk: Drop unneeded mod_devicetable.h] Signed-off-by: Krzysztof Kozlowski

clk: samsung: Introduce Exynos5515 clock driver

2026-09-07T10:02:19+00:00

CMU_TOP is the top level clock management unit which contains PLLs, muxes, dividers and gates that feed the other clock management units. CMU_PERI provides clocks for USI blocks and their children, PWM, MCT, and watchdog timers. CMU_FSYS provides clocks for MMC, USB, GPIO, etc. More blocks will be added as device drivers which utilise them are added. Signed-off-by: Aiden Isik Link: https://patch.msgid.link/20260818-for-next-lucky7-clock-v2-3-cda0cc80f158@member.fsf.org Signed-off-by: Krzysztof Kozlowski

clk: samsung: clk-pll: Add support for pll_309

2026-09-07T10:02:18+00:00

pll_309 (referred to in the downstream kernel sources as frd_309_rpll) is one of two PLLs used in the Exynos5515 SoC. It is an integer/fractional PLL with an FVCO of 600-2400MHz. It has the same locktime (500), and kdiv/mdiv/pdiv/sdiv masks and shifts as pll_531x, so it can be handled in exactly the same way. When defining a PLL, the "con" parameter should be set to the CON3 register, like this: PLL(pll_309, CLK_FOUT_AUD_PLL, "fout_aud_pll", "oscclk", PLL_LOCKTIME_PLL_AUD, PLL_CON3_PLL_AUD, NULL), Signed-off-by: Aiden Isik Link: https://patch.msgid.link/20260818-for-next-lucky7-clock-v2-2-cda0cc80f158@member.fsf.org Signed-off-by: Krzysztof Kozlowski

drivers/clk: Convert to DEFINE_SIMPLE_DEV_PM_OPS()

2026-09-02T22:40:18+00:00

Convert the deprecated SIMPLE_DEV_PM_OPS to DEFINE_SIMPLE_DEV_PM_OPS and pm_sleep_ptr(). This lets us drop the __maybe_unused annotations from its suspend and resume callbacks, and reduces kernel size in case CONFIG_PM or CONFIG_PM_SLEEP is disabled. Signed-off-by: Triet Hoang Reviewed-by: Brian Masney Signed-off-by: Brian Masney

clk: samsung: Make sure clk_init_data is fully initialized

2026-08-31T15:29:39+00:00

The clk_init_data structure contains several mutually-exclusive members for different methods to specify the possible parents of a clock, prompting drivers to initialize only the members they need. However, not initializing all members may cause subtle issues, which are only exposed when CONFIG_INIT_STACK_ALL_PATTERN or CONFIG_INIT_STACK_NONE is enabled. Make sure all members are fully initialized, to avoid such bugs, and to prevent future breakage when converting drivers to a different method for specifying the parents. Signed-off-by: Geert Uytterhoeven Reviewed-by: Krzysztof Kozlowski Message-ID: <87b3e83137e1a987f3c69d214706e93ef3898cab.1787239813.git.geert+renesas@glider.be> Signed-off-by: Brian Masney

Merge branches 'clk-pile' and 'clk-microchip' into clk-next

2026-08-20T23:51:47+00:00

* clk-pile: (111 commits) clk: microchip: mpfs: fix regmap_update_bits() mask/val order clk: visconti: Make sure clk_init_data is fully initialized clk: ti: Make sure clk_init_data is fully initialized MAINTAINERS: Add Brian Masney and Jerome Brunet as co-maintainers for clk subsystem Drop Michael Turquette's clk maintainer entry clk: ti: composite: resolve parent clocks by DT index, not by name clk: ti: mux: resolve parent clocks by DT index, not by name clk: devres: fix cleanup in devm_clk_get_optional_enabled_with_rate() dt-bindings: clock: ti,keystone-gate: Convert to DT schema dt-bindings: clock: ti: Convert APLL clock to DT schema clk: zynq: pll: Fix kernel-doc after determine_rate() conversion dt-bindings: clock: ti,clockdomain: Convert to DT schema dt-bindings: clock: Correct white-space style clk: tegra: set up proper EMC clock implementation for Tegra114 clk: clocking-wizard: remove 20kHz restriction clk: clocking-wizard: optimize clock search clk: clocking-wizard: fix clock difference detection clk: mediatek: mt8135: Fix inverted gate control for devapc_ck clk: clocking-wizard: Program PLL CP/RES and lock parameters on reconfig clk: tegra: support 48MHz clock for pll_p_out1 ... * clk-microchip: clk: at91: Read "reg" with helper

Merge tag 'clk-misc-for-v7.3' of ssh://github.com/masneyb/linux into clk-pile

2026-08-17T16:27:10+00:00

Pull clk patches picked up by Brian Masney: Here's various improvements and fixes for the clk subsystem that was posted prior to the opening of the last merge window. - Add spread spectrum clock (SSC) support to the clk framework, including a new assigned-clock-sscs devicetree property and clk_hw_set_spread_spectrum() API with KUnit tests (Peng Fan) - Add SCMI clock OEM extensions for the i.MX95 clock driver and introduce a common SCMI clock header (Peng Fan) - Add clock, reset, and devicetree bindings for the ESWIN EIC7700 HSP clock and reset generator (Xuyang Dong) - Add clk_determine_rate_noop() helper for clock drivers that can do any rate, and convert existing open-coded implementations across hisilicon, imx, qcom, renesas, rp1, samsung, scpi, sprd, mediatek phy, and mediatek pmdomain drivers (Brian Masney) - Add kernel-doc documentation for struct clk_core and the core clock flags, and wire up clk identifiers into the documentation build (Brian Masney) - Fix clk_divider_bestdiv() returning the minimum rate instead of the maximum rate for large rate requests, with KUnit tests (Lad Prabhakar) - Fix Nuvoton MA35D1 PLL frequency calculation including ignored div_u64 return values, incorrect PLL_CTL1_FRAC bit field width, and broken determine_rate logic (Joey Lu) - Support unique clock names for multi-socket Tegra platforms (Jon Hunter) - Allow COMPILE_TEST builds for HiSilicon clock drivers (Rosen Penev) - Various fixes and cleanups from Akari Tsuyukusa, Alexander A. Klimov, Brian Masney, David Carlier, David Laight, Min zhang, Myeonghun Pak, Pavel Löbl, Randy Dunlap, Rob Herring, Rosen Penev, Uwe Kleine-König, William Theesfeld, Xuyang Dong, and Yu-Chun Lin Signed-off-by: Brian Masney [sboyd@kernel.org: Fix allmodconfig modpost failure in scmi] * tag 'clk-misc-for-v7.3' of ssh://github.com/masneyb/linux: (53 commits) pmdomain: mediatek: mtk-mfg: use clk_determine_rate_noop() pmdomain: mediatek: airoha: use clk_determine_rate_noop() phy: mediatek: phy-mtk-hdmi-mt2701: use clk_determine_rate_noop() clk: sprd: use clk_determine_rate_noop() clk: scpi: use clk_determine_rate_noop() clk: samsung: acpm: use clk_determine_rate_noop() clk: rp1: use clk_determine_rate_noop() clk: renesas: rzg2l-cpg: use clk_determine_rate_noop() clk: qcom: smd-rpm: use clk_determine_rate_noop() clk: qcom: rpmh: use clk_determine_rate_noop() clk: qcom: rpm: use clk_determine_rate_noop() clk: imx: scu: use clk_determine_rate_noop() clk: hisilicon: hi3660-stub: use clk_determine_rate_noop() clk: add clk_determine_rate_noop() clk: imx: scu: drop redundant init.ops variable assignment clk: test: convert constants to use HZ_PER_MHZ docs: clk: include some identifiers to keep documentation up to date clk: add kernel docs for struct clk_core clk: add kernel docs for the core flags clk: hisilicon: allow COMPILE_TEST builds ...

clk: samsung: Don't include

2026-08-14T02:54:17+00:00

All users of drivers/clk/samsung/clk.h live in drivers/clk/samsung (see git grep samsung/clk.h ). All these are only using of_device_id from the set of structures defined by this include (see { git grep -l clk\\.h drivers/clk/samsung/; echo drivers/clk/samsung/clk.h; } | xargs grep -oh -E "\<(acpi_device_id|amba_id|ap_device_id|apr_device_id|auxiliary_device_id|bcma_device_id|ccw_device_id|cdx_device_id|coreboot_device_id|css_device_id|dfl_device_id|dmi_(device|system)_id|eisa_device_id|fsl_mc_device_id|hda_device_id|hid_device_id|hv_vmbus_device_id|i2c_device_id|i3c_device_id|ieee1394_device_id|input_device_id|ipack_device_id|isapnp_device_id|ishtp_device_id|mcb_device_id|mdio_device_id|mei_cl_device_id|mhi_device_id|mips_cdmm_device_id|of_device_id|parisc_device_id|pci_device_id|pci_epf_device_id|pcmcia_device_id|platform_device_id|pnp_(card_)?device_id|rio_device_id|rpmsg_device_id|sdio_device_id|sdw_device_id|serio_device_id|slim_device_id|spi_device_id|spmi_device_id|ssam_device_id|ssb_device_id|tb_service_id|tee_client_device_id|typec_device_id|ulpi_device_id|usb_device_id|vchiq_device_id|vio_device_id|virtio_device_id|wmi_device_id|x86_(cpu|device)_id|zorro_device_id|cpu_feature)\>" | sort | uniq -c ). So can be replaced by to get rid of another user of the former header. Signed-off-by: Uwe Kleine-König (The Capable Hub) Reviewed-by: Brian Masney Signed-off-by: Stephen Boyd