<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/next/linux-next.git/drivers/crypto, branch akpm</title>
<subtitle>The linux-next integration testing tree</subtitle>
<id>https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/atom?h=akpm</id>
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<updated>2022-06-28T01:26:37+00:00</updated>
<entry>
<title>Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git</title>
<updated>2022-06-28T01:26:37+00:00</updated>
<author>
<name>Stephen Rothwell</name>
<email>sfr@canb.auug.org.au</email>
</author>
<published>2022-06-28T01:26:37+00:00</published>
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<id>urn:sha1:ad9dd1674d6bee8c27f02f6c61e5328cbc0bfb64</id>
<content type='text'>
</content>
</entry>
<entry>
<title>crypto: qat - Removes the x86 dependency on the QAT drivers</title>
<updated>2022-06-24T09:12:29+00:00</updated>
<author>
<name>Yoan Picchi</name>
<email>yoan.picchi@arm.com</email>
</author>
<published>2022-06-17T09:59:45+00:00</published>
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<id>urn:sha1:9c846c5d2d4e63d75b2cb172625087cadadbe065</id>
<content type='text'>
This dependency looks outdated. After the previous patch, we have been able
to use this driver to encrypt some data and to create working VF on arm64.
We have not tested it yet on any big endian machine, hence the new dependency

Signed-off-by: Yoan Picchi &lt;yoan.picchi@arm.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: qat - replace get_current_node() with numa_node_id()</title>
<updated>2022-06-24T09:12:29+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2022-06-17T09:59:44+00:00</published>
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<id>urn:sha1:c2a1b91e47984e477298912ffd55570095d67318</id>
<content type='text'>
Currently the QAT driver code uses a self-defined wrapper function
called get_current_node() when it wants to learn the current NUMA node.
This implementation references the topology_physical_package_id[] array,
which more or less coincidentally contains the NUMA node id, at least
on x86.

Because this is not universal, and Linux offers a direct function to
learn the NUMA node ID, replace that function with a call to
numa_node_id(), which would work everywhere.

This fixes the QAT driver operation on arm64 machines.

Reported-by: Yoan Picchi &lt;Yoan.Picchi@arm.com&gt;
Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Yoan Picchi &lt;yoan.picchi@arm.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - During shutdown, check SEV data pointer before using</title>
<updated>2022-06-24T09:12:29+00:00</updated>
<author>
<name>Tom Lendacky</name>
<email>thomas.lendacky@amd.com</email>
</author>
<published>2022-06-16T15:26:18+00:00</published>
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<id>urn:sha1:1b05ece0c931536c0a38a9385e243a7962e933f6</id>
<content type='text'>
On shutdown, each CCP device instance performs shutdown processing.
However, __sev_platform_shutdown_locked() uses the controlling psp
structure to obtain the pointer to the sev_device structure. However,
during driver initialization, it is possible that an error can be received
from the firmware that results in the sev_data pointer being cleared from
the controlling psp structure. The __sev_platform_shutdown_locked()
function does not check for this situation and will segfault.

While not common, this scenario should be accounted for. Add a check for a
NULL sev_device structure before attempting to use it.

Fixes: 5441a07a127f ("crypto: ccp - shutdown SEV firmware on kexec")
Signed-off-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: ccp - Fix device IRQ counting by using platform_irq_count()</title>
<updated>2022-06-24T09:09:01+00:00</updated>
<author>
<name>Tom Lendacky</name>
<email>thomas.lendacky@amd.com</email>
</author>
<published>2022-06-13T19:16:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=87d044096ea62f1f230e8c4679ee8abf03266f64'/>
<id>urn:sha1:87d044096ea62f1f230e8c4679ee8abf03266f64</id>
<content type='text'>
The ccp driver loops through the platform device resources array to get
the IRQ count for the device. With commit a1a2b7125e10 ("of/platform: Drop
static setup of IRQ resource from DT core"), the IRQ resources are no
longer stored in the platform device resource array. As a result, the IRQ
count is now always zero. This causes the driver to issue a second call to
platform_get_irq(), which fails if the IRQ count is really 1, causing the
loading of the driver to fail.

Replace looping through the resources array to count the number of IRQs
with a call to platform_irq_count().

Fixes: a1a2b7125e10 ("of/platform: Drop static setup of IRQ resource from DT core")
Signed-off-by: Tom Lendacky &lt;thomas.lendacky@amd.com&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/sec - only HW V2 needs to change the BD err detection</title>
<updated>2022-06-17T09:19:21+00:00</updated>
<author>
<name>Kai Ye</name>
<email>yekai13@huawei.com</email>
</author>
<published>2022-06-11T07:38:08+00:00</published>
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<id>urn:sha1:bffa1fc065893a14703545efba7d69bb4082b18a</id>
<content type='text'>
The base register address of V2 and V3 are different. HW V3 not needs
to change the BD err detection.

Signed-off-by: Kai Ye &lt;yekai13@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: sun8i-ss - fix infinite loop in sun8i_ss_setup_ivs()</title>
<updated>2022-06-17T09:19:20+00:00</updated>
<author>
<name>Alexey Khoroshilov</name>
<email>khoroshilov@ispras.ru</email>
</author>
<published>2022-06-10T18:27:15+00:00</published>
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<id>urn:sha1:d61a7b3decf7f0cf4121a7204303deefd2c7151b</id>
<content type='text'>
There is no i decrement in while (i &gt;= 0) loop.

Found by Linux Verification Center (linuxtesting.org) with SVACE.

Signed-off-by: Alexey Khoroshilov &lt;khoroshilov@ispras.ru&gt;
Fixes: 359e893e8af4 ("crypto: sun8i-ss - rework handling of IV")
Acked-by: Corentin Labbe &lt;clabbe.montjoie@gmail.com&gt;
Tested-by: Corentin Labbe &lt;clabbe.montjoie@gmail.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/qm - modify event irq processing</title>
<updated>2022-06-17T09:19:20+00:00</updated>
<author>
<name>Weili Qian</name>
<email>qianweili@huawei.com</email>
</author>
<published>2022-06-09T12:31:19+00:00</published>
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<id>urn:sha1:d64de9773c18409d2161228242968ff3ebe3707e</id>
<content type='text'>
When the driver receives an event interrupt, the driver will enable
the event interrupt after handling all completed tasks on the function,
tasks on the function are parsed through only one thread. If the task's
user callback takes time, other tasks on the function will be blocked.

Therefore, the event irq processing is modified as follows:
1. Obtain the ID of the queue that completes the task.
2. Enable event interrupt.
3. Parse the completed tasks in the queue and call the user callback.
Enabling event interrupt in advance can quickly report pending event
interrupts and process tasks in multiple threads.

Signed-off-by: Weili Qian &lt;qianweili@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/qm - move alloc qm-&gt;wq to qm.c</title>
<updated>2022-06-17T09:19:20+00:00</updated>
<author>
<name>Weili Qian</name>
<email>qianweili@huawei.com</email>
</author>
<published>2022-06-09T12:31:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=3099fc9c2b3aaace80947d07d13b40da2dd79fd4'/>
<id>urn:sha1:3099fc9c2b3aaace80947d07d13b40da2dd79fd4</id>
<content type='text'>
Before stopping the function, the driver needs to flush all the remaining
work about event irq. Therefore, accelerator drivers use a private
workqueue(qm-&gt;wq) to handle event irq instead of the system workqueue.
This patch moves alloc workqueue from sec_main.c and zip_main.c to qm.c.

Signed-off-by: Weili Qian &lt;qianweili@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: hisilicon/qm - add functions for releasing resources</title>
<updated>2022-06-17T09:19:20+00:00</updated>
<author>
<name>Weili Qian</name>
<email>qianweili@huawei.com</email>
</author>
<published>2022-06-09T12:31:17+00:00</published>
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<id>urn:sha1:bf081d6fa8e90aefe991e34a29eff7aa22deb3ff</id>
<content type='text'>
The resources allocated by hisi_qm_memory_init() are released by
hisi_qm_uninit(). Add hisi_qm_memory_uninit() to release resources,
no functional change.

Signed-off-by: Weili Qian &lt;qianweili@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
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