kernel/git/next/linux-next.git/drivers/dpll, branch master

Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net

2026-07-10T08:20:05+00:00

Cross-merge networking fixes after downstream PR (net-7.2-rc3). Conflicts: tools/testing/selftests/net/lib.sh dd6a23bac306b ("selftests: net: make busywait timeout clock portable") 895bad9cc4cec ("selftests: net: make busywait timeout clock portable") Signed-off-by: Paolo Abeni

dpll: zl3073x: add NCO virtual input pin

2026-07-06T12:45:05+00:00

Add a virtual NCO (Numerically Controlled Oscillator) input pin that lets userspace switch a DPLL channel into NCO mode. A single NCO pin is shared across all DPLL channels - each channel has its own independent connection state. The NCO pin is registered with the new DPLL_PIN_TYPE_INT_NCO type and reports DPLL_PIN_STATE_CONNECTED / DPLL_PIN_OPERSTATE_ACTIVE when the channel is in NCO mode. At NCO pin registration the following bits are configured in dpll_ctrl_x: - nco_auto_read: auto-capture tracking offset on NCO entry - tod_step_reset: apply negated ToD step accumulator on NCO exit - tie_clear: PPS DPLLs set 1 to re-align outputs on NCO exit, EEC DPLLs keep 0 to prevent an unwanted TIE write Before switching to NCO mode, dpll_df_read_x is configured with ref_ofst=0 and cmd=ACC_I so that nco_auto_read captures the accumulated I-part offset relative to the master clock. Without this, the captured df_offset would be near zero (offset relative to the input reference after lock). On NCO entry the df_offset captured by nco_auto_read is read from the register. Per the datasheet, nco_auto_read only captures a valid offset when entering NCO from reflock, auto or holdover mode; from freerun the captured value is not meaningful and df_offset is marked as ZL_DPLL_DF_OFFSET_UNKNOWN. The same sentinel is set in chan_state_update() when the channel is not locked, and both FFO consumers (NCO pin and input pin) guard against it. Disconnecting the NCO pin switches to freerun rather than holdover because holdover averaging is not updated during NCO mode. When connecting the NCO pin displaces a previously connected input pin (reflock mode), a change notification is sent for that input pin. Input reference pins are now always registered regardless of the initial DPLL mode. Previously they were skipped when the DPLL was in NCO mode, but the NCO pin provides the proper mechanism for mode transitions. Reviewed-by: Petr Oros Tested-by: Chris du Quesnay Signed-off-by: Ivan Vecera Link: https://patch.msgid.link/20260630125536.720717-6-ivecera@redhat.com Signed-off-by: Paolo Abeni

dpll: zl3073x: add per-DPLL serialization lock

2026-07-06T12:45:05+00:00

Add a per-DPLL mutex that serializes all operations on a given DPLL channel across DPLL netlink callbacks, the periodic kthread worker, and (in subsequent patches) PTP clock callbacks. All DPLL pin and device callbacks that access mutable state take the lock as the first operation. The periodic worker holds it for the entire check cycle of each channel, deferring change notifications until after the lock is released to avoid ABBA deadlock with dpll_lock. This establishes the lock ordering: dpll_lock (subsystem, outer) -> zldpll->lock (driver, inner). Move zl3073x_chan_state_update() from the per-device zl3073x_dev_chan_states_update() loop into the per-DPLL zl3073x_dpll_changes_check() so it runs under zldpll->lock. This serializes df_offset writes with all readers and eliminates the need for separate df_offset synchronization. Change pin->freq_offset from atomic64_t to plain s64 since all readers and writers are now serialized by zldpll->lock, making atomic access unnecessary. Signed-off-by: Ivan Vecera Reviewed-by: Petr Oros Link: https://patch.msgid.link/20260630125536.720717-5-ivecera@redhat.com Signed-off-by: Paolo Abeni

dpll: zl3073x: use per-operation poll timeouts

2026-07-06T12:45:05+00:00

Replace the single 2s timeout in zl3073x_poll_zero_u8() with a per-caller timeout parameter. Different HW operations have different expected completion times so using per-operation timeouts improves error detection. The timeout values are based on proprietary source code provided by Microchip and own measurement. Signed-off-by: Ivan Vecera Reviewed-by: Petr Oros Link: https://patch.msgid.link/20260630125536.720717-4-ivecera@redhat.com Signed-off-by: Paolo Abeni

dpll: add DPLL_PIN_TYPE_INT_NCO pin type

2026-07-06T12:45:05+00:00

Add DPLL_PIN_TYPE_INT_NCO pin type for virtual pins representing the NCO mode of a DPLL. When connected as a DPLL input, the DPLL enters NCO mode where the output frequency is adjusted by the host via the PTP clock interface. Update the fractional-frequency-offset and fractional-frequency- offset-ppt attribute documentation to note that for INT_NCO pins these attributes represent the DPLL's current output frequency offset from its nominal frequency. Reviewed-by: Jiri Pirko Signed-off-by: Ivan Vecera Link: https://patch.msgid.link/20260630125536.720717-3-ivecera@redhat.com Signed-off-by: Paolo Abeni

dpll: add STATE_CONNECTED_OVERRIDE pin capability

2026-07-06T12:45:04+00:00

Add DPLL_PIN_CAPABILITIES_STATE_CONNECTED_OVERRIDE capability flag that indicates a pin can be set to connected regardless of the current DPLL device mode, overriding the active input selection. This is useful for automatic-only DPLL devices where mode cannot be switched to manual, allowing userspace to directly connect such pin from automatic mode. The capability requires STATE_CAN_CHANGE to be set as well; dpll_pin_register() warns if a driver violates this. Document the new capability in the Pin selection section of Documentation/driver-api/dpll.rst. Signed-off-by: Ivan Vecera Link: https://patch.msgid.link/20260630125536.720717-2-ivecera@redhat.com Signed-off-by: Paolo Abeni

Replace by more specific (c files)

2026-07-03T05:38:17+00:00

Replace the #include of by the more specific where applicable. For most cases the include can be dropped completely, only a few drivers need one or two headers added. Acked-by: Danilo Krummrich Acked-by: Takashi Sakamoto Acked-by: Bjorn Helgaas Link: https://patch.msgid.link/1a3f2007c5c5dcf555c09a4035ce3ae8ef1b6c49.1782808461.git.u.kleine-koenig@baylibre.com Signed-off-by: Uwe Kleine-König (The Capable Hub)

dpll: allow fwnode pins to attempt state change without capability bit

2026-06-13T20:24:34+00:00

Pins registered with an fwnode may have .state_on_dpll_set implemented without advertising DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE upfront. Requiring the bit for fwnode pins ties firmware description to driver implementation details unnecessarily. Relax the capability check in dpll_pin_state_set() and dpll_pin_on_pin_state_set(): when a pin has an associated fwnode, bypass the capability gate and let the ops layer decide, returning -EOPNOTSUPP if .state_on_dpll_set is absent. Non-fwnode pins retain the original strict behavior. This is used later in the series by the SyncE_Ref output pin, which relies on the fwnode path for state control. Reviewed-by: Aleksandr Loktionov Reviewed-by: Jiri Pirko Signed-off-by: Grzegorz Nitka Link: https://patch.msgid.link/20260607183045.1213735-10-grzegorz.nitka@intel.com Signed-off-by: Jakub Kicinski

dpll: extend pin notifier with notification source ID

2026-06-13T20:24:34+00:00

Extend the DPLL pin notification API to include a source identifier indicating where the notification originates. This allows notifier consumers to distinguish between notifications coming from an associated DPLL instance, a parent pin, or the pin itself. A new field, src_clock_id, is added to struct dpll_pin_notifier_info and is passed through all pin-related notification paths. Callers of dpll_pin_notify() are updated to provide a meaningful source identifier based on their context: - pin registration/unregistration uses the DPLL's clock_id, - pin-on-pin operations use the parent pin's clock_id, - pin changes use the pin's own clock_id. As introduced in the commit ("dpll: allow registering FW-identified pin with a different DPLL"), it is possible to share the same physical pin via firmware description (fwnode) with DPLL objects from different kernel modules. This means that a given pin can be registered multiple times. Driver such as ICE (E825 devices) rely on this mechanism when listening for the event where a shared-fwnode pin appears, while avoiding reacting to events triggered by their own registration logic. This change only extends the notification metadata and does not alter existing semantics for drivers that do not use the new field. Reviewed-by: Arkadiusz Kubalewski Reviewed-by: Aleksandr Loktionov Reviewed-by: Jiri Pirko Signed-off-by: Grzegorz Nitka Link: https://patch.msgid.link/20260607183045.1213735-9-grzegorz.nitka@intel.com Signed-off-by: Jakub Kicinski

dpll: balance create/delete notifications in __dpll_pin_(un)register

2026-06-13T20:24:34+00:00

__dpll_pin_register() emits dpll_pin_create_ntf() internally, but __dpll_pin_unregister() left the matching delete to its callers. The counts then diverge on dpll_pin_on_pin_register() rollback and on dpll_pin_on_pin_unregister(), leaking stale notifications. Emit dpll_pin_delete_ntf() inside __dpll_pin_unregister() and drop the now-redundant call in dpll_pin_unregister(). Fixes: 9431063ad323 ("dpll: core: Add DPLL framework base functions") Signed-off-by: Grzegorz Nitka Reviewed-by: Arkadiusz Kubalewski Link: https://patch.msgid.link/20260607183045.1213735-8-grzegorz.nitka@intel.com Signed-off-by: Jakub Kicinski