kernel/git/next/linux-next.git/drivers/gpu/drm/xe, branch master

Merge branch 'drm-xe-next' of https://gitlab.freedesktop.org/drm/xe/kernel.git

2026-07-10T12:11:38+00:00

Merge branch 'for-linux-next' of https://gitlab.freedesktop.org/drm/i915/kernel.git

2026-07-10T12:11:33+00:00

Merge branch 'for-linux-next' of https://gitlab.freedesktop.org/drm/misc/kernel.git

2026-07-10T12:11:30+00:00

Merge branch 'drm-next' of https://gitlab.freedesktop.org/drm/kernel.git

2026-07-10T12:11:26+00:00

# Conflicts: # drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h # drivers/gpu/drm/amd/amdkfd/kfd_process_queue_manager.c

drm/xe/guc: Define GuC firmware for NVL-S

2026-07-09T21:23:49+00:00

GuC firmware 70.71.0 (UAPI 1.37.2) is the first official GuC firmware for Novalake S. Recommend this version for NVL-S platform. Signed-off-by: Julia Filipchuk Reviewed-by: Daniele Ceraolo Spurio Link: https://patch.msgid.link/20260707192547.50535-12-julia.filipchuk@intel.com Signed-off-by: Rodrigo Vivi

drm/xe: Add support for WA 16029897822

2026-07-09T17:07:01+00:00

The WA is implemented by the GuC, so we just need to enable it via the dedicated KLV. This WA is supported starting from GuC 70.69. Note that the GuC does not enable the relevant feature on NVL-S, so this WA can't (and shouldn't) be enabled on that platform. Signed-off-by: Daniele Ceraolo Spurio Reviewed-by: Julia Filipchuk Link: https://patch.msgid.link/20260706224344.2723462-4-daniele.ceraolospurio@intel.com

drm/xe: Add support for WA 22022079272

2026-07-09T17:07:01+00:00

The WA is implemented by the GuC, so we just need to enable it via the dedicated KLV. This WA is supported starting from GuC 70.62. Signed-off-by: Daniele Ceraolo Spurio Reviewed-by: Matthew Auld Link: https://patch.msgid.link/20260706224344.2723462-3-daniele.ceraolospurio@intel.com

drm/xe/guc: Handle GuC local uncorrectable error notifications

2026-07-09T17:03:12+00:00

Add support for the GuC uncorrectable local error G2H notification and opt in to the feature when the submission ABI exposes it. When the notification targets a known exec queue, treat it like an engine reset request and route it through the existing timeout cleanup path. This keeps the queue teardown, pending job cancellation and error capture in one place instead of open-coding a parallel recovery flow. Signed-off-by: Zhanjun Dong Reviewed-by: Daniele Ceraolo Spurio Signed-off-by: Daniele Ceraolo Spurio Link: https://patch.msgid.link/20260706234353.3874355-1-zhanjun.dong@intel.com

drm/gpusvm: let the drm_gpusvm core context purely MM level

2026-07-09T11:12:49+00:00

The core mechanism of drm_gpusvm is HMM, which is fundamentally an MM side subsystem. A drm_device, enters the picture on the device side at DMA mapping / GPU bind. So move struct drm_device from struct drm_gpusvm in drm_gpusvm. Let drm_gpusvm keep its core neutral and leave device side decisions to the driver. Make drm_gpusvm a pure MM level object. - Move the drm_device from struct drm_gpusvm. drm_device now stored in drm_gpusvm_pages. - Drop the drm parameter from drm_gpusvm_init() - Update the xe call sites in xe_svm_init() and other callers. drm_device does not disappear from the framework, it is relocated onto each drm_gpusvm_pages where DMA actually happens. Suggested-by: Matthew Brost Reviewed-by: Matthew Brost Signed-off-by: Honglei Huang Signed-off-by: Matthew Brost Link: https://patch.msgid.link/20260630102127.392396-6-honghuan@amd.com

drm/xe: have xe_svm_range embed one drm_gpusvm_pages

2026-07-09T11:12:45+00:00

With drm_gpusvm_pages now self contained, make xe stop relying on the drm_gpusvm_range pages and take responsibility for the page lifecycle on the driver side. Driver side (xe): - Embed struct drm_gpusvm_pages in xe_svm_range and route all xe accesses through it instead of range->base.pages. - Initialise the embedded pages via drm_gpusvm_init_pages(), which binds the owning &xe->drm up front, and take over the page lifecycle: xe_svm_range_get_pages() calls drm_gpusvm_get_pages() directly; the notifier event_end and xe_svm_range_free() paths drive unmap/free on the embedded pages object. - Convert the open-coded userptr pages init in xe_userptr_setup() to the same drm_gpusvm_init_pages() helper. - Switch xe_svm_range_pages_valid() to drm_gpusvm_pages_valid(). Framework side (drm_gpusvm): - Add a small inline drm_gpusvm_init_pages() helper that records the owning drm_device and initialises the per-pages state, giving drivers a single hook to extend. - Export drm_gpusvm_pages_valid() to let driver owned pages can query mapping state without going through a range. - Lifecycle change: drm_gpusvm_range_remove() no longer *triggers* unmap/free of the embedded pages. The unmap/free logic itself stays in the framework -- drm_gpusvm_free_pages() still performs the DMA unmap (as an idempotent backstop) and frees the dma_addr array -- but the driver now owns *when* it runs, since the driver owns the drm_gpusvm_pages object. Side effect / contract: a driver that owns a drm_gpusvm_pages is now responsible for its lifecycle: drm_gpusvm_init_pages() before first use, and drm_gpusvm_free_pages() when the owner goes away. Xe does the latter from its ops->range_free callback, which the framework invokes once the range refcount drops to zero in drm_gpusvm_range_remove(). The timely DMA unmap for the IOMMU security model still happens in the notifier invalidate path via drm_gpusvm_unmap_pages(); the unmap inside drm_gpusvm_free_pages() is only a backstop for pages that were never invalidated. Suggested-by: Matthew Brost Reviewed-by: Matthew Brost Signed-off-by: Honglei Huang Signed-off-by: Matthew Brost Link: https://patch.msgid.link/20260630102127.392396-4-honghuan@amd.com