kernel/git/next/linux-next.git/drivers/interconnect/qcom, branch master

Merge branch 'icc-next' of https://git.kernel.org/pub/scm/linux/kernel/git/djakov/icc.git

2026-07-10T12:28:46+00:00

Merge branch 'icc-maili' into icc-next

2026-07-07T14:19:01+00:00

Add interconnect bindings and RPMh-based interconnect driver support for the upcoming Qualcomm Maili SoC. * icc-maili dt-bindings: interconnect: qcom: document the RPMh Network-On-Chip interconnect in Maili SoC interconnect: qcom: add Maili interconnect provider driver Link: https://patch.msgid.link/20260622-maili_icc-v2-0-18b5ac08c04f@oss.qualcomm.com Signed-off-by: Georgi Djakov

interconnect: qcom: add Maili interconnect provider driver

2026-07-07T14:18:03+00:00

Add driver for the Qualcomm interconnect buses found in Maili based platforms. The topology consists of several NoCs that are controlled by a remote processor that collects the aggregated bandwidth for each master-slave pairs. Co-developed-by: Odelu Kukatla Signed-off-by: Odelu Kukatla Signed-off-by: Raviteja Laggyshetty Reviewed-by: Konrad Dybcio Link: https://patch.msgid.link/20260622-maili_icc-v2-2-18b5ac08c04f@oss.qualcomm.com Signed-off-by: Georgi Djakov

Merge branch 'icc-shikra' into icc-next

2026-07-07T14:11:06+00:00

Add Epoch Subsystem (EPSS) L3 scaling support on Qualcomm Shikra SoC. EPSS hardware on Shikra is similar to other SoCs but supports only twelve L3 frequency entries (LUT). Reading the LUT beyond supported frequencies can expose incorrect frequencies. Introduce new compatible to represent this constrained variant of EPSS. * icc-shikra dt-bindings: interconnect: qcom,osm-l3: Add EPSS L3 DT binding for Qualcomm Shikra SoC interconnect: qcom: Add EPSS L3 scaling support for Shikra SoC interconnect: qcom: Enable Shikra interconnect driver by default for ARCH_QCOM Link: https://patch.msgid.link/20260603-shikra_epss_l3-v3-0-3c2e0b796e78@oss.qualcomm.com Signed-off-by: Georgi Djakov

interconnect: qcom: Enable Shikra interconnect driver by default for ARCH_QCOM

2026-07-07T14:10:36+00:00

Interconnect drivers provide fundamental NoC bandwidth management required for correct system behavior. Although systems can boot without them, power and performance are impacted. These drivers need to enabled irresepective of the board variant, design or configuration. Enable the Shikra interconnect driver by default on ARCH_QCOM by setting "default ARCH_QCOM". Signed-off-by: Raviteja Laggyshetty Reviewed-by: Konrad Dybcio Link: https://patch.msgid.link/20260526-shikra_icc_kconfig-v1-1-c589db2d023c@oss.qualcomm.com Signed-off-by: Georgi Djakov

interconnect: qcom: Add EPSS L3 scaling support for Shikra SoC

2026-07-07T14:06:52+00:00

Add Epoch Subsystem (EPSS) L3 interconnect provider support on Qualcomm Shikra SoC. The EPSS L3 block on Shikra SoC is similar to existing Qualcomm EPSS/OSM L3 providers, but supports only up to 12 frequency lookup table entries. Reading beyond the supported LUT entries can expose incorrect frequencies. Add shikra-specific EPSS descriptor shikra_epss_l3_perf_state that reuses existing EPSS configuration with appropriate LUT entries limit. Co-developed-by: Odelu Kukatla Signed-off-by: Odelu Kukatla Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Signed-off-by: Raviteja Laggyshetty Link: https://patch.msgid.link/20260603-shikra_epss_l3-v3-2-3c2e0b796e78@oss.qualcomm.com Signed-off-by: Georgi Djakov

Merge branch 'icc-x1e80100' into icc-next

2026-07-07T13:32:56+00:00

This series enables QoS configuration for QNOC type device which can be found on X1E80100 platform. It enables QoS configuration for master ports with predefined priority and urgency forwarding. This helps in prioritizing the traffic originating from different interconnect masters at NOC (Network On Chip). The system may function normally without this feature. However, enabling QoS helps optimize latency and bandwidth across subsystems like CPU, GPU, and multimedia engines, which becomes important in high-throughput scenarios. This is a feature aimed at performance enhancement to improve system performance under concurrent workloads. * icc-x1e80100 dt-bindings: interconnect: qcom,x1e80100-rpmh: add clocks property to enable QoS interconnect: qcom: x1e80100: enable QoS configuration Link: https://patch.msgid.link/20260527-x1e80100_qos-v2-0-305c6539e6d2@oss.qualcomm.com Signed-off-by: Georgi Djakov

interconnect: qcom: x1e80100: enable QoS configuration

2026-07-07T13:32:10+00:00

Enable QoS configuration for master ports with predefined priority and urgency forwarding. Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Signed-off-by: Raviteja Laggyshetty Link: https://patch.msgid.link/20260527-x1e80100_qos-v2-2-305c6539e6d2@oss.qualcomm.com Signed-off-by: Georgi Djakov

interconnect: qcom: sc8280xp: Enable QoS configuration

2026-07-07T11:54:21+00:00

Enable static QoS configuration for SC8280XP NoC master ports with predefined priority and urgency forwarding values. Add the QoS box data for the SC8280XP providers, add regmap configurations for the real NoCs, and mark only aggre1_noc and aggre2_noc as requiring clocks for QoS register access. Signed-off-by: Xilin Wu Reviewed-by: Konrad Dybcio Reviewed-by: Dmitry Baryshkov Link: https://patch.msgid.link/20260507-sc8280xp-qos-v1-2-15135858cd98@radxa.com Signed-off-by: Georgi Djakov

Replace by more specific (c files)

2026-07-03T05:38:17+00:00

Replace the #include of by the more specific where applicable. For most cases the include can be dropped completely, only a few drivers need one or two headers added. Acked-by: Danilo Krummrich Acked-by: Takashi Sakamoto Acked-by: Bjorn Helgaas Link: https://patch.msgid.link/1a3f2007c5c5dcf555c09a4035ce3ae8ef1b6c49.1782808461.git.u.kleine-koenig@baylibre.com Signed-off-by: Uwe Kleine-König (The Capable Hub)