kernel/git/next/linux-next.git/drivers/net/phy/qcom, branch master

net: phy: qca808x: keep an explicit active-high LED across the reset

2026-09-18T00:02:19+00:00

With the previous patch an 'active-high' LED node is accepted, so led_polarity_mode can now hold 0. qca808x_config_init() only re-asserts QCA808X_LED_ACTIVE_HIGH when the mode is -1, the value that means device tree asked for nothing, so an explicit active-high does not reach the register. That matters because the bit does not survive a reset. phy_init_hw() runs .soft_reset before .config_init on every attach and resume, and commit f203c8c77c76 ("net: phy: qcom: qca808x: default to LED active High if not set") records why: "on PHY reset, the Active High bit is not set resulting in the LED driven as active-low". The polarity written from device tree during phy_probe() is therefore gone by the time the link comes up, and the LED runs inverted. Re-assert the bit for anything other than an explicit active-low, which is the one case that wants it clear and gets that from the reset for free. Name the unset value while here: led_polarity_mode otherwise holds a PHY_LED_ACTIVE_* value, so spelling the comparison PHY_LED_ACTIVE_LOW says what it means where -1, 0 and 1 did not. Cc: stable+noautosel@kernel.org # never worked Closes: https://netdev-ai.bots.linux.dev/sashiko/#/patchset/20260908105959.70453-1-donggeunyoo.kernel%40gmail.com Signed-off-by: Donggeun Yoo Reviewed-by: Christian Marangi Link: https://patch.msgid.link/20260915223138.321307-3-donggeunyoo.kernel@gmail.com Signed-off-by: Jakub Kicinski

net: phy: qca808x: accept the active-high LED polarity mode

2026-09-18T00:02:01+00:00

commit a274465cc3be ("net: phy: support 'active-high' property for PHY LEDs") added PHY_LED_ACTIVE_HIGH, but qca808x_led_polarity_set() still rejects everything except PHY_LED_ACTIVE_LOW. An LED node carrying 'active-high' therefore falls into the default case and returns -EINVAL, which phy_probe() propagates: the mdio device is left unbound and phy_attach_direct() falls back to the genphy driver, so the PHY loses every qca808x-specific feature, not just the LED. Accept the mode. The register write below already handles both polarities. Cc: stable+noautosel@kernel.org # never worked Signed-off-by: Donggeun Yoo Reviewed-by: Christian Marangi Link: https://patch.msgid.link/20260915223138.321307-2-donggeunyoo.kernel@gmail.com Signed-off-by: Jakub Kicinski

net: phy: at803x: Use a helper to check for phy reset existence

2026-07-17T13:43:32+00:00

The at803x family of devices are subjected to an errata that requires hard-reseting the PHY upon link change. That can only work if there's a physical reset line wired to the PHY, which the driver checks by looking if there's a reset GPIO configured for the MDIO device. The reset may however be controlled through a reset controller, which isn't accounted for in the errata handling. Besides that, PHY drivers aren't expected to directly access the mdiodev's resources directly, let's therefore wrap this with a phylib helper, that uses a similar mdio helper to check for reset existence. This was found in preparation for bus-level resource management for better mdio scan support. Signed-off-by: Maxime Chevallier Reviewed-by: Andrew Lunn Reviewed-by: Nicolai Buchwitz Link: https://patch.msgid.link/20260715101355.88536-1-maxime.chevallier@bootlin.com Signed-off-by: Paolo Abeni

net: phy: at803x: add RX and TX clock management for IPQ5018 PHY

2026-06-11T22:32:13+00:00

Acquire and enable the RX and TX clocks for the IPQ5018 PHY. These clocks are required for the PHY's datapath to function correctly. Signed-off-by: George Moussalem Link: https://patch.msgid.link/20260608-ipq5018-gephy-clocks-v4-4-fb2ccd56894b@outlook.com Signed-off-by: Jakub Kicinski

net: phy: qcom: at803x: Use the correct bit to disable extended next page

2026-04-13T21:36:22+00:00

As noted in the blamed commit, the AR8035 and other PHYs from this family advertise the Extended Next Page support by default, which may be understood by some partners as this PHY being multi-gig capable. The fix is to disable XNP advertising, which is done by setting bit 12 of the Auto-Negotiation Advertisement Register (MII_ADVERTISE). The blamed commit incorrectly uses MDIO_AN_CTRL1_XNP, which is bit 13 as per 802.3 : 45.2.7.1 AN control register (Register 7.0) BIT 12 in MII_ADVERTISE is wrapped by ADVERTISE_RESV, used by some drivers such as the aquantia one. 802.3 Clause 28 defines bit 12 as Extended Next Page ability, at least in recent versions of the standard. Let's add a define for it and use it in the at803x driver. Fixes: 3c51fa5d2afe ("net: phy: ar803x: disable extended next page bit") Signed-off-by: Maxime Chevallier Reviewed-by: Andrew Lunn Link: https://patch.msgid.link/20260410171021.1277138-1-maxime.chevallier@bootlin.com Signed-off-by: Jakub Kicinski

net: phy: qcom: qca807x: normalize return value of gpio_get

2026-02-21T00:09:07+00:00

The GPIO get callback is expected to return 0 or 1 (or a negative error code). Ensure that the value returned by qca807x_gpio_get() is normalized to the [0, 1] range. Fixes: 86ef402d805d ("gpiolib: sanitize the return value of gpio_chip::get()") Signed-off-by: Dmitry Torokhov Reviewed-by: Bartosz Golaszewski Reviewed-by: Linus Walleij Link: https://patch.msgid.link/aZZeyr2ysqqk2GqA@google.com Signed-off-by: Jakub Kicinski

net: phy: qca807x: Support SFP through phy_port interface

2026-01-14T02:52:35+00:00

QCA8072/8075 may be used as combo-port PHYs, with Serdes (100/1000BaseX) and Copper interfaces. The PHY has the ability to read the configuration it's in. If the configuration indicates the PHY is in combo mode, allow registering up to 2 ports. Register a dedicated set of port ops to handle the serdes port, and rely on generic phylib SFP support for the SFP handling. Reviewed-by: Christophe Leroy Reviewed-by: Andrew Lunn Tested-by: Christophe Leroy Signed-off-by: Maxime Chevallier Link: https://patch.msgid.link/20260108080041.553250-13-maxime.chevallier@bootlin.com Signed-off-by: Jakub Kicinski

net: phy: at803x: Support SFP through phy_port interface

2026-01-14T02:52:35+00:00

Convert the at803x driver to use the generic phylib SFP handling, via a dedicated .attach_port() callback, populating the supported interfaces. As these devices are limited to 1000BaseX, a workaround is used to also support, in a very limited way, copper modules. This is done by supporting SGMII but limiting it to 1G full duplex (in which case it's somewhat compatible with 1000BaseX). Reviewed-by: Christophe Leroy Reviewed-by: Andrew Lunn Tested-by: Christophe Leroy Signed-off-by: Maxime Chevallier Link: https://patch.msgid.link/20260108080041.553250-12-maxime.chevallier@bootlin.com Signed-off-by: Jakub Kicinski

net: phy: update all PHYs to use sfp_get_module_caps()

2025-09-22T23:05:15+00:00

Update all PHYs to use sfp_get_module_caps() rather than the sfp_parse_*() family of functions. Signed-off-by: Russell King (Oracle) Link: https://patch.msgid.link/E1uydVu-000000061Wd-0cAG@rmk-PC.armlinux.org.uk Signed-off-by: Jakub Kicinski

treewide: rename GPIO set callbacks back to their original names

2025-08-07T08:07:06+00:00

The conversion of all GPIO drivers to using the .set_rv() and .set_multiple_rv() callbacks from struct gpio_chip (which - unlike their predecessors - return an integer and allow the controller drivers to indicate failures to users) is now complete and the legacy ones have been removed. Rename the new callbacks back to their original names in one sweeping change. Signed-off-by: Bartosz Golaszewski