<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/next/linux-next.git/drivers/phy/socionext, branch master</title>
<subtitle>The linux-next integration testing tree</subtitle>
<id>https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/atom?h=master</id>
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<updated>2026-09-15T06:25:54+00:00</updated>
<entry>
<title>phy: uniphier-usb3: no devm for nvmem_cell_get</title>
<updated>2026-09-15T06:25:54+00:00</updated>
<author>
<name>Rosen Penev</name>
<email>rosenp@gmail.com</email>
</author>
<published>2026-03-04T04:16:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=83db6a55816f72a4cc20ce073d573efaf19ec0a4'/>
<id>urn:sha1:83db6a55816f72a4cc20ce073d573efaf19ec0a4</id>
<content type='text'>
There is absolutely no reason to extend the lifetime of nvmem_cell_get
to after removal of the driver. Use and free right after use.

Signed-off-by: Rosen Penev &lt;rosenp@gmail.com&gt;
Reviewed-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
Reviewed-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Link: https://patch.msgid.link/20260304041602.7539-1-rosenp@gmail.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: socionext: usb2: Simplify with scoped for each OF child loop</title>
<updated>2026-01-14T14:21:14+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@oss.qualcomm.com</email>
</author>
<published>2026-01-02T12:48:49+00:00</published>
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<id>urn:sha1:f16741314f68091a8edf116ad5c134a72ffab854</id>
<content type='text'>
Use scoped for-each loop when iterating over device nodes to make code a
bit simpler.

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Reviewed-by: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Reviewed-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Link: https://patch.msgid.link/20260102124848.64474-2-krzysztof.kozlowski@oss.qualcomm.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: constify of_phandle_args in xlate</title>
<updated>2024-02-23T12:13:14+00:00</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@linaro.org</email>
</author>
<published>2024-02-17T09:39:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=00ca8a15dafa990d391abc37f2b8256ddf909b35'/>
<id>urn:sha1:00ca8a15dafa990d391abc37f2b8256ddf909b35</id>
<content type='text'>
The xlate callbacks are supposed to translate of_phandle_args to proper
provider without modifying the of_phandle_args.  Make the argument
pointer to const for code safety and readability.

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Florian Fainelli &lt;florian.fainelli@broadcom.com&gt; #Broadcom
Link: https://lore.kernel.org/r/20240217093937.58234-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: Explicitly include correct DT includes</title>
<updated>2023-07-17T06:22:56+00:00</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2023-07-14T17:48:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=7559e7572c03e433efec7734af6a674fdd83dd68'/>
<id>urn:sha1:7559e7572c03e433efec7734af6a674fdd83dd68</id>
<content type='text'>
The DT of_device.h and of_platform.h date back to the separate
of_platform_bus_type before it as merged into the regular platform bus.
As part of that merge prepping Arm DT support 13 years ago, they
"temporarily" include each other. They also include platform_device.h
and of.h. As a result, there's a pretty much random mix of those include
files used throughout the tree. In order to detangle these headers and
replace the implicit includes with struct declarations, users need to
explicitly include the correct includes.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Marc Kleine-Budde &lt;mkl@pengutronix.de&gt; # for drivers/phy/phy-can-transceiver.c
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Sergio Paracuellos &lt;sergio.paracuellos@gmail.com&gt;
Link: https://lore.kernel.org/r/20230714174841.4061919-1-robh@kernel.org
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: uniphier-usb3ss: fix unintended writing zeros to PHY register</title>
<updated>2021-12-24T04:36:38+00:00</updated>
<author>
<name>Ryuta NAKANISHI</name>
<email>nakanishi.ryuta@socionext.com</email>
</author>
<published>2021-12-22T05:19:29+00:00</published>
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<id>urn:sha1:898c7a9ec81620125f2463714a0f4dea18ad6e54</id>
<content type='text'>
Similar to commit 4a90bbb478db ("phy: uniphier-pcie: Fix updating phy
parameters"), in function uniphier_u3ssphy_set_param(), unintentionally
write zeros to other fields when writing PHY registers.

Fixes: 5ab43d0f8697 ("phy: socionext: add USB3 PHY driver for UniPhier SoC")
Signed-off-by: Ryuta NAKANISHI &lt;nakanishi.ryuta@socionext.com&gt;
Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Link: https://lore.kernel.org/r/1640150369-4134-1-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: uniphier-ahci: Add support for Pro4 SoC</title>
<updated>2021-11-23T05:51:53+00:00</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2021-10-29T10:39:07+00:00</published>
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<id>urn:sha1:b1f9f4541e99a43e3d52bc65408d0b96a340c1df</id>
<content type='text'>
Add support for PHY interface built into ahci controller implemented
in UniPhier Pro4 SoC.

Pro4 SoC distinguishes it from other SoCs as "legacy" SoC, which has GIO
clock line. And Pro4 AHCI-PHY needs to control additional reset lines
("pm", "tx", and "rx").

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Link: https://lore.kernel.org/r/1635503947-18250-9-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: uniphier-pcie: Add dual-phy support for NX1 SoC</title>
<updated>2021-11-23T05:51:53+00:00</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2021-10-29T10:39:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=7f1abed4e9a5d0e0f565ae6c74bf258a97fa8f86'/>
<id>urn:sha1:7f1abed4e9a5d0e0f565ae6c74bf258a97fa8f86</id>
<content type='text'>
NX1 SoC supports 2 lanes and has dual-phy. Should set appropriate
configuration values to both PHY registers.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Link: https://lore.kernel.org/r/1635503947-18250-7-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: uniphier-pcie: Set VCOPLL clamp mode in PHY register</title>
<updated>2021-11-23T05:51:53+00:00</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2021-10-29T10:39:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=25bba42f95f6ad22295c5a0204086ace9bff1e4a'/>
<id>urn:sha1:25bba42f95f6ad22295c5a0204086ace9bff1e4a</id>
<content type='text'>
Set VCOPLL clamp mode to mode 0 to avoid hardware unstable issue.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Link: https://lore.kernel.org/r/1635503947-18250-6-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: uniphier-pcie: Add compatible string and SoC-dependent data for NX1 SoC</title>
<updated>2021-11-23T05:51:53+00:00</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2021-10-29T10:39:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=1c1597c8027aa4a98a56e8b5b341ddc38451f0e8'/>
<id>urn:sha1:1c1597c8027aa4a98a56e8b5b341ddc38451f0e8</id>
<content type='text'>
Add basic support for UniPhier NX1 SoC. This includes a compatible string,
SoC-dependent data, and a function that set to 2-lane mode.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Link: https://lore.kernel.org/r/1635503947-18250-5-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>phy: uniphier-usb3: Add compatible string for NX1 SoC</title>
<updated>2021-11-23T05:51:53+00:00</updated>
<author>
<name>Kunihiko Hayashi</name>
<email>hayashi.kunihiko@socionext.com</email>
</author>
<published>2021-10-29T10:39:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=877e8d28bc840f1240852280850cdea5d97c1151'/>
<id>urn:sha1:877e8d28bc840f1240852280850cdea5d97c1151</id>
<content type='text'>
Add basic support for UniPhier NX1 SoC. This includes a compatible string
and the same SoC-dependent data as LD20/PXs3 SoCs.

Signed-off-by: Kunihiko Hayashi &lt;hayashi.kunihiko@socionext.com&gt;
Link: https://lore.kernel.org/r/1635503947-18250-3-git-send-email-hayashi.kunihiko@socionext.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
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