kernel/git/next/linux-next.git/drivers/spi/Kconfig, branch master

spi: Fix the section ordering in accordance with the comment

2026-08-30T22:53:46+00:00

The comments in all sections tell that the list of the sections should be alphabetically ordered. With time this went apart, mostly for Freescale entries. So, put the things into order again. Signed-off-by: Andy Shevchenko Link: https://patch.msgid.link/20260821105541.1432348-4-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown

spi: Drop redundant dependency on SPI_MASTER

2026-08-30T22:53:45+00:00

The sections defined under 'if SPI_MASTER' already imply that the SPI_MASTER is selected. Drop redundant dependencies. Signed-off-by: Andy Shevchenko Link: https://patch.msgid.link/20260821105541.1432348-3-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown

spi: Fix tab and space mixture in Kconfig

2026-08-30T22:53:44+00:00

There are a couple of sections which indented using spaces and not tabs. Fix them. Signed-off-by: Andy Shevchenko Link: https://patch.msgid.link/20260821105541.1432348-2-andriy.shevchenko@linux.intel.com Signed-off-by: Mark Brown

spi: Add KUnit coverage for DMA mapping error paths

2026-08-14T15:48:52+00:00

Add KUnit tests for the __spi_map_msg() error paths. The tests verify that a later TX or RX mapping failure clears the mapping state of earlier transfers and leaves cur_{tx,rx}_dma_dev identifying the current mapping device. A zero-length transfer causes sg_alloc_table() to return -EINVAL, providing deterministic failure injection without test hooks. Additional cases cover successful map/unmap and a message which requires no mapping. Build the DMA suite as a separate translation unit, exposing the two internal mapping helpers only for KUnit through the local internal header. Enable SPI in the default and all-tests KUnit configurations so the suite is exercised there. Signed-off-by: Honghui Jiang Reviewed-by: Andy Shevchenko Link: https://patch.msgid.link/20260814031419.43378-5-jiang_hh2019@163.com Signed-off-by: Mark Brown

spi: cadence-xspi: remove 64BIT Kconfig dependency

2026-08-04T13:17:32+00:00

Now everything is ready, we can remove 64BIT Kconfig dependency now. Signed-off-by: Jisheng Zhang Link: https://patch.msgid.link/20260803140728.12747-5-jszhang@kernel.org Signed-off-by: Mark Brown

spi: ma35d1-qspi: Add Nuvoton MA35D1 QSPI controller

2026-07-31T20:29:24+00:00

Chi-Wen Weng says: Add devicetree binding and SPI controller driver support for the Quad SPI controller found in Nuvoton MA35D1 SoCs. The controller provides two native chip selects and supports standard SPI and spi-mem operations using single, dual and quad bus widths. This initial implementation uses 8-bit PIO transfers and supports per-operation clock configuration, clock and reset handling, and direct execution of SPI memory operations. DMA and active-high chip select support are intentionally left out of the initial driver. Link: https://patch.msgid.link/20260731023818.1626075-1-cwweng.linux@gmail.com

spi: ma35d1-qspi: Add Nuvoton MA35D1 QSPI controller support

2026-07-31T20:29:22+00:00

Add SPI controller driver support for the Quad SPI controller found in Nuvoton MA35D1 SoCs. The controller provides two native chip selects and supports standard SPI and spi-mem operations, including single-bit full-duplex transfers and dual or quad half-duplex transfers. Implement 8-bit PIO transfers, per-operation clock configuration, clock and reset handling, and direct execution of SPI memory operations. Limit individual transfers to 4 KiB and SPI messages to 8 KiB to keep the PIO polling path bounded. Read the optional num-cs property and fall back to the hardware default of two chip selects when it is not present. Active-high chip select and DMA transfers are not supported by this initial implementation. Signed-off-by: Chi-Wen Weng Link: https://patch.msgid.link/20260731023818.1626075-3-cwweng.linux@gmail.com Signed-off-by: Mark Brown

spi: atmel-quadspi: add LAN969x QSPI support

2026-07-19T21:14:21+00:00

Microchip LAN969x has two QSPI controllers based on SAMA7G5 QSPI. It requires pad calibration, supports DMA, and supports 100 MHz operation. Signed-off-by: Robert Marko Link: https://patch.msgid.link/20260709112006.390742-5-robert.marko@sartura.hr Signed-off-by: Mark Brown

spi: cadence-xspi: Revert COMPILE_TEST support

2026-06-08T12:18:16+00:00

Commit 0c5b5c40dc31 ("spi: cadence-xspi: Add COMPILE_TEST support") allows this driver to be built for 32-bit platforms, which causes a semantic conflict with commit 4954d4eca469 ("spi: cadence-xspi: Support 32bit and 64bit slave dma interface"), as readsq() and writesq() are only available when targeting 64-bit platforms: drivers/spi/spi-cadence-xspi.c: In function 'cdns_xspi_sdma_read': drivers/spi/spi-cadence-xspi.c:601:25: error: implicit declaration of function 'readsq'; did you mean 'readsl'? [-Wimplicit-function-declaration] 601 | readsq(src, buf, len >> 3); | ^~~~~~ | readsl drivers/spi/spi-cadence-xspi.c: In function 'cdns_xspi_sdma_write': drivers/spi/spi-cadence-xspi.c:623:25: error: implicit declaration of function 'writesq'; did you mean 'writesl'? [-Wimplicit-function-declaration] 623 | writesq(dst, buf, len >> 3); | ^~~~~~~ | writesl As there are no known 32-bit platforms that use this controller, revert compile testing support to restrict the driver to 64-bit platforms to avoid burdening the driver with workarounds. Signed-off-by: Nathan Chancellor Fixes: 4954d4eca469 ("spi: cadence-xspi: Support 32bit and 64bit slave dma interface") Acked-by: Uwe Kleine-König Link: https://patch.msgid.link/20260606-spi-cadence-xspi-revert-compile-testing-v1-1-76219ea378bd@kernel.org Signed-off-by: Mark Brown

spi: cadence-xspi: Add COMPILE_TEST support

2026-05-20T14:20:27+00:00

The Cadence XSPI driver uses readq() and writeq(), which are not provided directly by all 32-bit architectures. Include the generic non-atomic 64-bit I/O accessor fallback for non-64-bit builds so the driver can build there. Drop the 64BIT dependency at the same time. The driver only needs MMIO and the SPI memory interface at build time, and the fallback accessors cover the 32-bit compile-test case. Assisted-by: Codex:GPT-5.5 Signed-off-by: Rosen Penev Link: https://patch.msgid.link/20260519005614.628437-1-rosenp@gmail.com Signed-off-by: Mark Brown