<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/next/linux-next.git/include/dt-bindings/clock, branch master</title>
<subtitle>The linux-next integration testing tree</subtitle>
<id>https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/atom?h=master</id>
<link rel='self' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/atom?h=master'/>
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<updated>2026-07-10T11:59:50+00:00</updated>
<entry>
<title>Merge branch 'renesas-clk' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git</title>
<updated>2026-07-10T11:59:50+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2026-07-10T11:59:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=577aa3b8906d98e553b1555658609bdb60c65433'/>
<id>urn:sha1:577aa3b8906d98e553b1555658609bdb60c65433</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge branch 'sunxi/for-next' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux.git</title>
<updated>2026-07-10T11:59:37+00:00</updated>
<author>
<name>Mark Brown</name>
<email>broonie@kernel.org</email>
</author>
<published>2026-07-10T11:59:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=74ee6b32e5e87cee1d353da8c617a7c53db7e3bb'/>
<id>urn:sha1:74ee6b32e5e87cee1d353da8c617a7c53db7e3bb</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Merge branch '20260608-shikra-gcc-rpmcc-clks-v5-2-94cefe092ee3@oss.qualcomm.com' into clk-for-7.3</title>
<updated>2026-07-08T03:01:31+00:00</updated>
<author>
<name>Bjorn Andersson</name>
<email>andersson@kernel.org</email>
</author>
<published>2026-07-08T03:01:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=d328c411f1b8e4f385492e1ecb3c74990368aa4a'/>
<id>urn:sha1:d328c411f1b8e4f385492e1ecb3c74990368aa4a</id>
<content type='text'>
Merge Shikra RPM and global clock controller bindings through topic
branch, to allow constants to be made available to DeviceTree branches
as well.
</content>
</entry>
<entry>
<title>dt-bindings: clock: qcom: Add Qualcomm Shikra SoC Global Clock Controller</title>
<updated>2026-07-08T03:01:23+00:00</updated>
<author>
<name>Imran Shaik</name>
<email>imran.shaik@oss.qualcomm.com</email>
</author>
<published>2026-06-08T12:21:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=f390a1fac199b03d8971b84a531d1a978a2b20cc'/>
<id>urn:sha1:f390a1fac199b03d8971b84a531d1a978a2b20cc</id>
<content type='text'>
Add device tree bindings for the global clock controller on Qualcomm
Shikra SoC.

Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Signed-off-by: Imran Shaik &lt;imran.shaik@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260608-shikra-gcc-rpmcc-clks-v5-2-94cefe092ee3@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: qcom: Add Hawi video clock controller</title>
<updated>2026-07-07T03:05:53+00:00</updated>
<author>
<name>Lin Li</name>
<email>zhuolin.li@oss.qualcomm.com</email>
</author>
<published>2026-07-02T17:08:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=d9ef4ed45866531d37a2e9c62dc795cd678b5b0c'/>
<id>urn:sha1:d9ef4ed45866531d37a2e9c62dc795cd678b5b0c</id>
<content type='text'>
Add device tree bindings for the video clock controller on Qualcomm
Hawi SoC.

Signed-off-by: Lin Li &lt;zhuolin.li@oss.qualcomm.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260702-hawi-videocc-v1-1-6c1e640b0954@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: qcom: Add EVA clock and reset controller for Glymur SoC</title>
<updated>2026-07-07T02:57:13+00:00</updated>
<author>
<name>Taniya Das</name>
<email>taniya.das@oss.qualcomm.com</email>
</author>
<published>2026-06-17T11:07:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=7803dfda924f3c892ca93aab34a93619a67b7fe2'/>
<id>urn:sha1:7803dfda924f3c892ca93aab34a93619a67b7fe2</id>
<content type='text'>
Add the device tree bindings for the enhanced video analytics(EVA) clock
controller which is required on Qualcomm Glymur SoC. The controller
provides clocks, resets and power domains for the EVA subsystem.

Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Taniya Das &lt;taniya.das@oss.qualcomm.com&gt;
Link: https://lore.kernel.org/r/20260617-evacc_glymur-v2-2-905108dacaaa@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: rtc: sun6i: add sun60i-a733 support</title>
<updated>2026-07-06T14:40:24+00:00</updated>
<author>
<name>Jerome Brunet</name>
<email>jbrunet@baylibre.com</email>
</author>
<published>2026-07-06T09:32:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=38d6b194a21c8626647b0a773bb8db5f2b84b0ad'/>
<id>urn:sha1:38d6b194a21c8626647b0a773bb8db5f2b84b0ad</id>
<content type='text'>
Add a new rtc compatible for the sun60i-a733 SoC and new IDs for the
peripheral oscillator clock gates of this SoC.

Acked-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Jerome Brunet &lt;jbrunet@baylibre.com&gt;
Link: https://patch.msgid.link/20260706-a733-rtc-v4-2-f330728db3d3@baylibre.com
Signed-off-by: Chen-Yu Tsai &lt;wens@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'renesas-r9a09g077-dt-binding-defs-tag7' into renesas-clk-for-v7.3</title>
<updated>2026-06-30T09:55:31+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2026-06-30T09:55:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=3c7d800a263d5a0367d236335a859a781c974149'/>
<id>urn:sha1:3c7d800a263d5a0367d236335a859a781c974149</id>
<content type='text'>
Renesas RZ/T2H and RZ/N2H LCDC and RTC Clock DT Binding Definitions

LCD Controller and Real-Time Clock DT binding definitions for the
Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs, shared by driver
and DT source files.
</content>
</entry>
<entry>
<title>Merge branches 'clk-microchip' and 'clk-qcom' into clk-next</title>
<updated>2026-06-25T14:55:47+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2026-06-25T14:55:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=92010229c4b38897f1319d260162d2f96925ed17'/>
<id>urn:sha1:92010229c4b38897f1319d260162d2f96925ed17</id>
<content type='text'>
* clk-microchip:
  clk: at91: keep securam node alive while mapping it
  clk: at91: sama7d65: add peripheral clock for I3C
  clk: microchip: mpfs-ccc: fix peripheral driver registration failures after oob fix
  clk: at91: sam9x7: Fix gmac_gclk clock definition
  clk: at91: sam9x7: Rename macb0_clk to gmac_clk
  clk: at91: sam9x7: Remove gmac peripheral clock with ID 67
  clk: microchip: rename clk-core to clk-pic32

* clk-qcom: (32 commits)
  clk: qcom: regmap-phy-mux: Rework the implementation
  clk: qcom: a53: Corrected frequency multiplier for 1152MHz
  clk: qcom: camcc-milos: Declare icc path dependency for CAMSS_TOP_GDSC
  clk: qcom: gdsc: Support enabling interconnect path for power domain
  dt-bindings: clock: qcom,milos-camcc: Document interconnect path
  interconnect: Add devm_of_icc_get_by_index() as exported API for users
  clk: qcom: camcc-x1p42100: Add support for camera clock controller
  clk: qcom: camcc-x1e80100: Add support for camera QDSS debug clocks
  clk: qcom: videocc-x1p42100: Add support for video clock controller
  dt-bindings: clock: qcom: Add X1P42100 camera clock controller
  dt-bindings: clock: qcom: Add X1P42100 video clock controller
  clk: qcom: nord: negcc: add support for the USB2 PHY reset
  dt-bindings: clock: qcom: add the definition for the USB2 PHY reset
  clk: qcom: clk-rpmh: Make all VRMs optional
  clk: qcom: Add support for global clock controller on Hawi
  clk: qcom: clk-alpha-pll: Add support for Taycan EHA_T PLL
  clk: qcom: Add Hawi TCSR clock controller driver
  clk: qcom: rpmh: Add support for Hawi RPMH clocks
  dt-bindings: clock: qcom: Add Hawi global clock controller
  dt-bindings: clock: qcom: Add Hawi TCSR clock controller
  ...
</content>
</entry>
<entry>
<title>Merge branches 'clk-ti', 'clk-samsung', 'clk-rockchip' and 'clk-spacemit' into clk-next</title>
<updated>2026-06-25T14:55:38+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@kernel.org</email>
</author>
<published>2026-06-25T14:55:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/commit/?id=db810874e581db749c8c6ed9820a97fe63ea6e42'/>
<id>urn:sha1:db810874e581db749c8c6ed9820a97fe63ea6e42</id>
<content type='text'>
* clk-ti:
  clk: keystone: sci-clk: fix application of sizeof to pointer
  clk: keystone: don't cache clock rate

* clk-samsung:
  clk: samsung: exynos990: Fix PERIC0/1 USI clock types
  clk: samsung: exynos850: mark APM I3C clocks as critical

* clk-rockchip:
  clk: rockchip: allow COMPILE_TEST builds
  clk: rockchip: rk3588: add GATE_GRF clocks for I2S MCLK output to IO
  soc: rockchip: rk3588: add SYS_GRF SOC_CON6 register offset
  clk: rockchip: add helper to register auxiliary GRFs
  clk: rockchip: allow grf_type_sys lookup in aux_grf_table
  dt-bindings: clock: rockchip,rk3588-cru: add I2S MCLK output to IO clock IDs

* clk-spacemit:
  clk: spacemit: k3: Add PCIe DBI clock
  dt-bindings: soc: spacemit: k3: Add PCIe DBI clock IDs
  clk: spacemit: k3: Fix PCIe clock register offset
  clk: spacemit: k3: Switch to pll2_d6 as parent for PCIe clock
</content>
</entry>
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