The linux-next integration testing tree https://git.rulkc.org/pub/scm/linux/kernel/git/next/linux-next.git/atom?h=akpm-base 2022-06-27T16:56:10+00:00 2022-06-27T16:56:10+00:00 Bitan Biswas bbiswas@nvidia.com 2022-06-27T11:41:19+00:00 urn:sha1:1cf8639be186f309a4a28febc3ba6d1e63c1bef3 For Tegra194 and Tegra234 devices there is a production fuse register that indicates if the device is a production device. Expose the production status of the chip via the sysfs for Tegra194 and Tegra234 devices. Note that '0' implies not production or unknown and '1' indicates the device is a production device. Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> [ Re-worked for upstream submission by Jon Hunter <jonathanh@nvidia.com> ] Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> 2022-05-09T08:46:14+00:00 Ashish Mhetre amhetre@nvidia.com 2022-05-06T13:23:12+00:00 urn:sha1:54a85e09f44c5fa322a2d186f50862d09f517225 Add support for logging memory controller errors on Tegra186, Tegra194 and Tegra234. On these SoCs, interrupts can occur on multiple channels. Add support required to read the status of interrupts across multiple channels, log and clear them. Also add new interrupts supported on these SoCs. Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220506132312.3910637-5-thierry.reding@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 2022-05-09T08:46:11+00:00 Ashish Mhetre amhetre@nvidia.com 2022-05-06T13:23:11+00:00 urn:sha1:a7cffa11fa9232eabf0c4f441dc53002978ab526 From Tegra186 onwards, the memory controller supports multiple channels. Add support for mapping the address spaces of these channels and specify the number of channels supported by Tegra186, Tegra194 and Tegra234. In case of old bindings, channels won't be present. If channels are not present then print a warning and continue so that backward compatibility will be preserved in driver. During error interrupts from memory controller, appropriate registers from these channels need to be accessed for logging error info. Signed-off-by: Ashish Mhetre <amhetre@nvidia.com> Reviewed-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20220506132312.3910637-4-thierry.reding@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 2022-02-25T13:10:09+00:00 Tom Rix trix@redhat.com 2022-02-07T13:09:51+00:00 urn:sha1:fcfaff508b9fa9ad6d8a17d4855e3ec7382886ae Remove the second 'or'. Signed-off-by: Tom Rix <trix@redhat.com> Signed-off-by: Thierry Reding <treding@nvidia.com> 2021-12-16T13:03:38+00:00 Dmitry Osipenko digetx@gmail.com 2021-11-30T23:23:09+00:00 urn:sha1:9131c6331726514f0d0364c41f8733cc5eec11ab Only couple drivers need to get the -ENODEV error code and majority of drivers need to explicitly initialize the performance state. Add new common helper which sets up OPP table for these drivers. Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> 2021-10-04T19:27:40+00:00 Dmitry Osipenko digetx@gmail.com 2021-09-12T20:29:04+00:00 urn:sha1:0d7281b27af9d9602a6d62a132f19932b1b0fd88 The PM stubs need to depend on ARCH_TEGRA in order to be usable for compile-testing of tegra-cpuidle driver. Add the dependency. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> 2021-10-04T19:27:21+00:00 Dmitry Osipenko digetx@gmail.com 2021-09-12T20:29:03+00:00 urn:sha1:aa54686e285c13bfbafc02e7cc3cf18f2fbca4b0 Add stubs needed for compile-testing of tegra-cpuidle driver. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> 2021-10-04T19:27:04+00:00 Dmitry Osipenko digetx@gmail.com 2021-09-12T20:29:02+00:00 urn:sha1:45e934407b7efa08cde651d5669d1984a3a4bc69 Add stubs needed for compile-testing of tegra-cpuidle driver. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com> 2021-08-18T13:23:38+00:00 Arnd Bergmann arnd@arndb.de 2021-08-18T13:23:38+00:00 urn:sha1:c4361dee2e6cffa32122e06c9df0a9c2e5c4dd51 soc/tegra: Changes for v5.15-rc1 Implements runtime PM support for the FUSE block and prepares the driver to work better in conjunction with the CPUIDLE driver. * tag 'tegra-for-5.15-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: soc/tegra: fuse: Enable fuse clock on suspend for Tegra124 soc/tegra: fuse: Add runtime PM support soc/tegra: fuse: Clear fuse->clk on driver probe failure soc/tegra: pmc: Prevent racing with cpuilde driver soc/tegra: bpmp: Remove unused including <linux/version.h> Link: https://lore.kernel.org/r/20210813162157.2820913-3-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> 2021-08-11T09:51:39+00:00 Dmitry Osipenko digetx@gmail.com 2021-07-18T21:27:05+00:00 urn:sha1:9c93ccfc86f2cdeab8a34408759abad594e439b9 Both PMC and cpuidle drivers are probed at the same init level and cpuidle depends on the PMC suspend mode. Add new default suspend mode that indicates whether PMC driver has been probed and reset the mode in a case of deferred probe of the PMC driver. Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>