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| author | Stephen Rothwell <sfr@canb.auug.org.au> | 2022-06-28 12:53:09 +1000 |
|---|---|---|
| committer | Stephen Rothwell <sfr@canb.auug.org.au> | 2022-06-28 12:53:09 +1000 |
| commit | 9e469064d6bf1f8c33fa8ddbd5896ecd14d44819 (patch) | |
| tree | a63cea3e6fd0ddae5be78f01af738d8b2ac2fed6 | |
| parent | 5b3487b4ff93bc073f3939919b93c02fa6817e2c (diff) | |
| parent | cfda05c1ddb8b375562b54dc86276cdc42d48297 (diff) | |
| download | linux-next-9e469064d6bf1f8c33fa8ddbd5896ecd14d44819.tar.gz linux-next-9e469064d6bf1f8c33fa8ddbd5896ecd14d44819.zip | |
Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git
23 files changed, 429 insertions, 357 deletions
diff --git a/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml b/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml index b5e26e41f88c..f04db802a732 100644 --- a/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml +++ b/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml @@ -29,6 +29,13 @@ properties: ranges: true + gpio-controller: + deprecated: true + + "#gpio-cells": + deprecated: true + const: 2 + additionalProperties: false patternProperties: @@ -67,8 +74,7 @@ patternProperties: required: - compatible - - "#address-cells" - - "#size-cells" + - reg examples: - | diff --git a/Documentation/devicetree/bindings/clock/efm32-clock.txt b/Documentation/devicetree/bindings/clock/efm32-clock.txt deleted file mode 100644 index 263d293f6a10..000000000000 --- a/Documentation/devicetree/bindings/clock/efm32-clock.txt +++ /dev/null @@ -1,11 +0,0 @@ -* Clock bindings for Energy Micro efm32 Giant Gecko's Clock Management Unit - -Required properties: -- compatible: Should be "efm32gg,cmu" -- reg: Base address and length of the register set -- interrupts: Interrupt used by the CMU -- #clock-cells: Should be <1> - -The clock consumer should specify the desired clock by having the clock ID in -its "clocks" phandle cell. The header efm32-clk.h contains a list of available -IDs. diff --git a/Documentation/devicetree/bindings/display/arm,pl11x.yaml b/Documentation/devicetree/bindings/display/arm,pl11x.yaml index b545c6d20325..6cc9045e5c68 100644 --- a/Documentation/devicetree/bindings/display/arm,pl11x.yaml +++ b/Documentation/devicetree/bindings/display/arm,pl11x.yaml @@ -159,25 +159,12 @@ examples: }; panel { - compatible = "arm,rtsm-display", "panel-dpi"; - power-supply = <&vcc_supply>; + compatible = "arm,rtsm-display"; port { clcd_panel: endpoint { remote-endpoint = <&clcd_pads>; }; }; - - panel-timing { - clock-frequency = <25175000>; - hactive = <640>; - hback-porch = <40>; - hfront-porch = <24>; - hsync-len = <96>; - vactive = <480>; - vback-porch = <32>; - vfront-porch = <11>; - vsync-len = <2>; - }; }; ... diff --git a/Documentation/devicetree/bindings/display/bridge/sii902x.txt b/Documentation/devicetree/bindings/display/bridge/sii902x.txt deleted file mode 100644 index 3bc760cc31cb..000000000000 --- a/Documentation/devicetree/bindings/display/bridge/sii902x.txt +++ /dev/null @@ -1,78 +0,0 @@ -sii902x HDMI bridge bindings - -Required properties: - - compatible: "sil,sii9022" - - reg: i2c address of the bridge - -Optional properties: - - interrupts: describe the interrupt line used to inform the host - about hotplug events. - - reset-gpios: OF device-tree gpio specification for RST_N pin. - - iovcc-supply: I/O Supply Voltage (1.8V or 3.3V) - - cvcc12-supply: Digital Core Supply Voltage (1.2V) - - HDMI audio properties: - - #sound-dai-cells: <0> or <1>. <0> if only i2s or spdif pin - is wired, <1> if the both are wired. HDMI audio is - configured only if this property is found. - - sil,i2s-data-lanes: Array of up to 4 integers with values of 0-3 - Each integer indicates which i2s pin is connected to which - audio fifo. The first integer selects i2s audio pin for the - first audio fifo#0 (HDMI channels 1&2), second for fifo#1 - (HDMI channels 3&4), and so on. There is 4 fifos and 4 i2s - pins (SD0 - SD3). Any i2s pin can be connected to any fifo, - but there can be no gaps. E.g. an i2s pin must be mapped to - fifo#0 and fifo#1 before mapping a channel to fifo#2. Default - value is <0>, describing SD0 pin beiging routed to hdmi audio - fifo #0. - - clocks: phandle and clock specifier for each clock listed in - the clock-names property - - clock-names: "mclk" - Describes SII902x MCLK input. MCLK can be used to produce - HDMI audio CTS values. This property follows - Documentation/devicetree/bindings/clock/clock-bindings.txt - consumer binding. - - If HDMI audio is configured the sii902x device becomes an I2S - and/or spdif audio codec component (e.g a digital audio sink), - that can be used in configuring a full audio devices with - simple-card or audio-graph-card binding. See their binding - documents on how to describe the way the sii902x device is - connected to the rest of the audio system: - Documentation/devicetree/bindings/sound/simple-card.yaml - Documentation/devicetree/bindings/sound/audio-graph-card.yaml - Note: In case of the audio-graph-card binding the used port - index should be 3. - -Optional subnodes: - - video input: this subnode can contain a video input port node - to connect the bridge to a display controller output (See this - documentation [1]). - -[1]: Documentation/devicetree/bindings/media/video-interfaces.txt - -Example: - hdmi-bridge@39 { - compatible = "sil,sii9022"; - reg = <0x39>; - reset-gpios = <&pioA 1 0>; - iovcc-supply = <&v3v3_hdmi>; - cvcc12-supply = <&v1v2_hdmi>; - - #sound-dai-cells = <0>; - sil,i2s-data-lanes = < 0 1 2 >; - clocks = <&mclk>; - clock-names = "mclk"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@0 { - reg = <0>; - bridge_in: endpoint { - remote-endpoint = <&dc_out>; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml b/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml new file mode 100644 index 000000000000..5a69547ad3d7 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/sil,sii9022.yaml @@ -0,0 +1,131 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/sil,sii9022.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Silicon Image sii902x HDMI bridge + +maintainers: + - Boris Brezillon <bbrezillon@kernel.org> + +properties: + compatible: + oneOf: + - items: + - enum: + - sil,sii9022-cpi # CEC Programming Interface + - sil,sii9022-tpi # Transmitter Programming Interface + - const: sil,sii9022 + - const: sil,sii9022 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + description: Interrupt line used to inform the host about hotplug events. + + reset-gpios: + maxItems: 1 + + iovcc-supply: + description: I/O Supply Voltage (1.8V or 3.3V) + + cvcc12-supply: + description: Digital Core Supply Voltage (1.2V) + + '#sound-dai-cells': + enum: [ 0, 1 ] + description: | + <0> if only I2S or S/PDIF pin is wired, + <1> if both are wired. + HDMI audio is configured only if this property is found. + If HDMI audio is configured, the sii902x device becomes an I2S and/or + S/PDIF audio codec component (e.g. a digital audio sink), that can be + used in configuring full audio devices with simple-card or + audio-graph-card bindings. See their binding documents on how to describe + the way the + sii902x device is connected to the rest of the audio system: + Documentation/devicetree/bindings/sound/simple-card.yaml + Documentation/devicetree/bindings/sound/audio-graph-card.yaml + Note: In case of the audio-graph-card binding the used port index should + be 3. + + sil,i2s-data-lanes: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 4 + uniqueItems: true + items: + enum: [ 0, 1, 2, 3 ] + description: + Each integer indicates which I2S pin is connected to which audio FIFO. + The first integer selects the I2S audio pin for the first audio FIFO#0 + (HDMI channels 1&2), the second for FIFO#1 (HDMI channels 3&4), and so + on. There are 4 FIFOs and 4 I2S pins (SD0 - SD3). Any I2S pin can be + connected to any FIFO, but there can be no gaps. E.g. an I2S pin must be + mapped to FIFO#0 and FIFO#1 before mapping a channel to FIFO#2. The + default value is <0>, describing SD0 pin being routed to HDMI audio + FIFO#0. + + clocks: + maxItems: 1 + description: MCLK input. MCLK can be used to produce HDMI audio CTS values. + + clock-names: + const: mclk + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Parallel RGB input port + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: HDMI output port + + port@3: + $ref: /schemas/graph.yaml#/properties/port + description: Sound input port + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + hdmi-bridge@39 { + compatible = "sil,sii9022"; + reg = <0x39>; + reset-gpios = <&pioA 1 0>; + iovcc-supply = <&v3v3_hdmi>; + cvcc12-supply = <&v1v2_hdmi>; + + #sound-dai-cells = <0>; + sil,i2s-data-lanes = < 0 1 2 >; + clocks = <&mclk>; + clock-names = "mclk"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + bridge_in: endpoint { + remote-endpoint = <&dc_out>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/panel/arm,rtsm-display.yaml b/Documentation/devicetree/bindings/display/panel/arm,rtsm-display.yaml new file mode 100644 index 000000000000..4ad484f09ba3 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/arm,rtsm-display.yaml @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/arm,rtsm-display.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Arm RTSM Virtual Platforms Display + +maintainers: + - Linus Walleij <linus.walleij@linaro.org> + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + const: arm,rtsm-display + + port: true + +required: + - compatible + - port + +additionalProperties: false + +... diff --git a/Documentation/devicetree/bindings/i2c/ibm,p8-occ-hwmon.txt b/Documentation/devicetree/bindings/hwmon/ibm,p8-occ-hwmon.txt index 5dc5d2e2573d..5dc5d2e2573d 100644 --- a/Documentation/devicetree/bindings/i2c/ibm,p8-occ-hwmon.txt +++ b/Documentation/devicetree/bindings/hwmon/ibm,p8-occ-hwmon.txt diff --git a/Documentation/devicetree/bindings/i2c/i2c-efm32.txt b/Documentation/devicetree/bindings/i2c/i2c-efm32.txt deleted file mode 100644 index 3b30e54ae3c7..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-efm32.txt +++ /dev/null @@ -1,33 +0,0 @@ -* Energymicro efm32 i2c controller - -Required properties : - - - reg : Offset and length of the register set for the device - - compatible : should be "energymicro,efm32-i2c" - - interrupts : the interrupt number - - clocks : reference to the module clock - -Recommended properties : - - - clock-frequency : maximal I2C bus clock frequency in Hz. - - energymicro,location : Decides the location of the USART I/O pins. - Allowed range : [0 .. 6] - -Example: - i2c0: i2c@4000a000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "energymicro,efm32-i2c"; - reg = <0x4000a000 0x400>; - interrupts = <9>; - clocks = <&cmu clk_HFPERCLKI2C0>; - clock-frequency = <100000>; - energymicro,location = <3>; - - eeprom@50 { - compatible = "microchip,24c02"; - reg = <0x50>; - pagesize = <16>; - }; - }; - diff --git a/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt deleted file mode 100644 index e0062aebf025..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt +++ /dev/null @@ -1,61 +0,0 @@ -RDA Micro RDA8810PL Interrupt Controller - -The interrupt controller in RDA8810PL SoC is a custom interrupt controller -which supports up to 32 interrupts. - -Required properties: - -- compatible: Should be "rda,8810pl-intc". -- reg: Specifies base physical address of the registers set. -- interrupt-controller: Identifies the node as an interrupt controller. -- #interrupt-cells: Specifies the number of cells needed to encode an - interrupt source. The value shall be 2. - -The interrupt sources are as follows: - -ID Name ------------- -0: PULSE_DUMMY -1: I2C -2: NAND_NFSC -3: SDMMC1 -4: SDMMC2 -5: SDMMC3 -6: SPI1 -7: SPI2 -8: SPI3 -9: UART1 -10: UART2 -11: UART3 -12: GPIO1 -13: GPIO2 -14: GPIO3 -15: KEYPAD -16: TIMER -17: TIMEROS -18: COMREG0 -19: COMREG1 -20: USB -21: DMC -22: DMA -23: CAMERA -24: GOUDA -25: GPU -26: VPU_JPG -27: VPU_HOST -28: VOC -29: AUIFC0 -30: AUIFC1 -31: L2CC - -Example: - apb@20800000 { - compatible = "simple-bus"; - ... - intc: interrupt-controller@0 { - compatible = "rda,8810pl-intc"; - reg = <0x0 0x1000>; - interrupt-controller; - #interrupt-cells = <2>; - }; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.yaml new file mode 100644 index 000000000000..96d6285d0087 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/rda,8810pl-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RDA Micro RDA8810PL interrupt controller + +maintainers: + - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + const: rda,8810pl-intc + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + +additionalProperties: false + +examples: + - | + intc: interrupt-controller@0 { + compatible = "rda,8810pl-intc"; + reg = <0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + }; +... diff --git a/Documentation/devicetree/bindings/perf/arm,ccn.yaml b/Documentation/devicetree/bindings/perf/arm,ccn.yaml new file mode 100644 index 000000000000..0b0bb2091016 --- /dev/null +++ b/Documentation/devicetree/bindings/perf/arm,ccn.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/arm,ccn.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM CCN (Cache Coherent Network) Performance Monitors + +maintainers: + - Robin Murphy <robin.murphy@arm.com> + +properties: + compatible: + enum: + - arm,ccn-502 + - arm,ccn-504 + - arm,ccn-508 + - arm,ccn-512 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + ccn@20000000 { + compatible = "arm,ccn-504"; + reg = <0x20000000 0x1000000>; + interrupts = <0 181 4>; + }; +... diff --git a/Documentation/devicetree/bindings/perf/arm-ccn.txt b/Documentation/devicetree/bindings/perf/arm-ccn.txt deleted file mode 100644 index 1c53b5aa3317..000000000000 --- a/Documentation/devicetree/bindings/perf/arm-ccn.txt +++ /dev/null @@ -1,23 +0,0 @@ -* ARM CCN (Cache Coherent Network) - -Required properties: - -- compatible: (standard compatible string) should be one of: - "arm,ccn-502" - "arm,ccn-504" - "arm,ccn-508" - "arm,ccn-512" - -- reg: (standard registers property) physical address and size - (16MB) of the configuration registers block - -- interrupts: (standard interrupt property) single interrupt - generated by the control block - -Example: - - ccn@2000000000 { - compatible = "arm,ccn-504"; - reg = <0x20 0x00000000 0 0x1000000>; - interrupts = <0 181 4>; - }; diff --git a/Documentation/devicetree/bindings/serial/efm32-uart.txt b/Documentation/devicetree/bindings/serial/efm32-uart.txt deleted file mode 100644 index 4f8d8fde0c1c..000000000000 --- a/Documentation/devicetree/bindings/serial/efm32-uart.txt +++ /dev/null @@ -1,20 +0,0 @@ -* Energymicro efm32 UART - -Required properties: -- compatible : Should be "energymicro,efm32-uart" -- reg : Address and length of the register set -- interrupts : Should contain uart interrupt - -Optional properties: -- energymicro,location : Decides the location of the USART I/O pins. - Allowed range : [0 .. 5] - Default: 0 - -Example: - -uart@4000c400 { - compatible = "energymicro,efm32-uart"; - reg = <0x4000c400 0x400>; - interrupts = <15>; - energymicro,location = <0>; -}; diff --git a/Documentation/devicetree/bindings/serio/ps2-gpio.txt b/Documentation/devicetree/bindings/serio/ps2-gpio.txt deleted file mode 100644 index 7b7bc9cdf986..000000000000 --- a/Documentation/devicetree/bindings/serio/ps2-gpio.txt +++ /dev/null @@ -1,23 +0,0 @@ -Device-Tree binding for ps/2 gpio device - -Required properties: - - compatible = "ps2-gpio" - - data-gpios: the data pin - - clk-gpios: the clock pin - - interrupts: Should trigger on the falling edge of the clock line. - -Optional properties: - - write-enable: Indicates whether write function is provided - to serio device. Possibly providing the write fn will not work, because - of the tough timing requirements. - -Example nodes: - -ps2@0 { - compatible = "ps2-gpio"; - interrupt-parent = <&gpio>; - interrupts = <23 IRQ_TYPE_EDGE_FALLING>; - data-gpios = <&gpio 24 GPIO_ACTIVE_HIGH>; - clk-gpios = <&gpio 23 GPIO_ACTIVE_HIGH>; - write-enable; -}; diff --git a/Documentation/devicetree/bindings/serio/ps2-gpio.yaml b/Documentation/devicetree/bindings/serio/ps2-gpio.yaml new file mode 100644 index 000000000000..a63d9172346f --- /dev/null +++ b/Documentation/devicetree/bindings/serio/ps2-gpio.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/serio/ps2-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bindings for GPIO based PS/2 + +maintainers: + - Danilo Krummrich <danilokrummrich@dk-develop.de> + +properties: + compatible: + const: ps2-gpio + + data-gpios: + description: + the gpio used for the data signal - this should be flagged as + active high using open drain with (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN) + from <dt-bindings/gpio/gpio.h> since the signal is open drain by + definition + maxItems: 1 + + clk-gpios: + description: + the gpio used for the clock signal - this should be flagged as + active high using open drain with (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN) + from <dt-bindings/gpio/gpio.h> since the signal is open drain by + definition + maxItems: 1 + + interrupts: + description: + The given interrupt should trigger on the falling edge of the clock line. + maxItems: 1 + + write-enable: + type: boolean + description: + Indicates whether write function is provided to serio device. Possibly + providing the write function will not work, because of the tough timing + requirements. + +required: + - compatible + - data-gpios + - clk-gpios + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/gpio/gpio.h> + #include <dt-bindings/interrupt-controller/irq.h> + + ps2 { + compatible = "ps2-gpio"; + interrupt-parent = <&gpio>; + interrupts = <23 IRQ_TYPE_EDGE_FALLING>; + data-gpios = <&gpio 24 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + clk-gpios = <&gpio 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + write-enable; + }; diff --git a/Documentation/devicetree/bindings/spi/efm32-spi.txt b/Documentation/devicetree/bindings/spi/efm32-spi.txt deleted file mode 100644 index e0fa61a1be0c..000000000000 --- a/Documentation/devicetree/bindings/spi/efm32-spi.txt +++ /dev/null @@ -1,39 +0,0 @@ -* Energy Micro EFM32 SPI - -Required properties: -- #address-cells: see spi-bus.txt -- #size-cells: see spi-bus.txt -- compatible: should be "energymicro,efm32-spi" -- reg: Offset and length of the register set for the controller -- interrupts: pair specifying rx and tx irq -- clocks: phandle to the spi clock -- cs-gpios: see spi-bus.txt - -Recommended properties : -- energymicro,location: Value to write to the ROUTE register's LOCATION - bitfield to configure the pinmux for the device, see - datasheet for values. - If this property is not provided, keeping what is - already configured in the hardware, so its either the - reset default 0 or whatever the bootloader did. - -Example: - -spi1: spi@4000c400 { /* USART1 */ - #address-cells = <1>; - #size-cells = <0>; - compatible = "energymicro,efm32-spi"; - reg = <0x4000c400 0x400>; - interrupts = <15 16>; - clocks = <&cmu 20>; - cs-gpios = <&gpio 51 1>; // D3 - energymicro,location = <1>; - - ks8851@0 { - compatible = "ks8851"; - spi-max-frequency = <6000000>; - reg = <0>; - interrupt-parent = <&boardfpga>; - interrupts = <4>; - }; -}; diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml new file mode 100644 index 000000000000..e9199190198d --- /dev/null +++ b/Documentation/devicetree/bindings/sram/qcom,imem.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sram/qcom,imem.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm IMEM memory region + +maintainers: + - Bjorn Andersson <bjorn.andersson@linaro.org> + +description: + Qualcomm IMEM is dedicated memory region for various debug features and DMA + transactions. + +properties: + compatible: + items: + - enum: + - qcom,apq8064-imem + - qcom,msm8974-imem + - qcom,qcs404-imem + - qcom,sc7180-imem + - qcom,sc7280-imem + - qcom,sdm630-imem + - qcom,sdm845-imem + - qcom,sdx55-imem + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + ranges: true + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + reboot-mode: + $ref: /schemas/power/reset/syscon-reboot-mode.yaml# + +patternProperties: + "^pil-reloc@[0-9a-f]+$": + $ref: /schemas/remoteproc/qcom,pil-info.yaml# + description: Peripheral image loader relocation region + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + sram@146bf000 { + compatible = "qcom,sdm845-imem", "syscon", "simple-mfd"; + reg = <0 0x146bf000 0 0x1000>; + ranges = <0 0 0x146bf000 0x1000>; + + #address-cells = <1>; + #size-cells = <1>; + + pil-reloc@94c { + compatible = "qcom,pil-reloc-info"; + reg = <0x94c 0xc8>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml b/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml index 930188bc5e6a..071f2d676196 100644 --- a/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml +++ b/Documentation/devicetree/bindings/sram/qcom,ocmem.yaml @@ -72,10 +72,10 @@ patternProperties: examples: - | - #include <dt-bindings/clock/qcom,rpmcc.h> - #include <dt-bindings/clock/qcom,mmcc-msm8974.h> + #include <dt-bindings/clock/qcom,rpmcc.h> + #include <dt-bindings/clock/qcom,mmcc-msm8974.h> - ocmem: ocmem@fdd00000 { + sram@fdd00000 { compatible = "qcom,msm8974-ocmem"; reg = <0xfdd00000 0x2000>, @@ -93,6 +93,6 @@ examples: ranges = <0 0xfec00000 0x100000>; gmu-sram@0 { - reg = <0x0 0x100000>; + reg = <0x0 0x100000>; }; - }; + }; diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 7a326168d1d2..530ea69821a7 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -141,6 +141,8 @@ patternProperties: description: ASIX Electronics Corporation "^aspeed,.*": description: ASPEED Technology Inc. + "^asrock,.*": + description: ASRock Inc. "^asus,.*": description: AsusTek Computer Inc. "^atheros,.*": @@ -198,12 +200,14 @@ patternProperties: description: Broadcom Corporation "^bsh,.*": description: BSH Hausgeraete GmbH + "^bticino,.*": + description: Bticino International "^buffalo,.*": description: Buffalo, Inc. "^bur,.*": description: B&R Industrial Automation GmbH - "^bticino,.*": - description: Bticino International + "^bytedance,.*": + description: ByteDance Ltd. "^calamp,.*": description: CalAmp Corp. "^calaosystems,.*": @@ -549,6 +553,8 @@ patternProperties: description: Shenzhen Hugsun Technology Co. Ltd. "^hwacom,.*": description: HwaCom Systems Inc. + "^hxt,.*": + description: HXT Semiconductor "^hycon,.*": description: Hycon Technology Corp. "^hydis,.*": @@ -583,6 +589,8 @@ patternProperties: description: Infineon Technologies "^inforce,.*": description: Inforce Computing + "^ingrasys,.*": + description: Ingrasys Technology Inc. "^ivo,.*": description: InfoVision Optoelectronics Kunshan Co. Ltd. "^ingenic,.*": @@ -603,6 +611,8 @@ patternProperties: description: Inter Control Group "^invensense,.*": description: InvenSense Inc. + "^inventec,.*": + description: Inventec "^inversepath,.*": description: Inverse Path "^iom,.*": @@ -1015,6 +1025,8 @@ patternProperties: description: Shenzhen QiShenglong Industrialist Co., Ltd. "^qnap,.*": description: QNAP Systems, Inc. + "^quanta,.*": + description: Quanta Computer Inc. "^radxa,.*": description: Radxa "^raidsonic,.*": diff --git a/MAINTAINERS b/MAINTAINERS index d4da1c5812bf..9c6c4e42c69e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2593,7 +2593,7 @@ L: linux-unisoc@lists.infradead.org (moderated for non-subscribers) S: Maintained F: Documentation/devicetree/bindings/arm/rda.yaml F: Documentation/devicetree/bindings/gpio/gpio-rda.yaml -F: Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt +F: Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.yaml F: Documentation/devicetree/bindings/serial/rda,8810pl-uart.yaml F: Documentation/devicetree/bindings/timer/rda,8810pl-timer.yaml F: arch/arm/boot/dts/rda8810pl-* diff --git a/drivers/of/kexec.c b/drivers/of/kexec.c index 8d374cc552be..91b04b04eec4 100644 --- a/drivers/of/kexec.c +++ b/drivers/of/kexec.c @@ -126,6 +126,7 @@ int ima_get_kexec_buffer(void **addr, size_t *size) { int ret, len; unsigned long tmp_addr; + unsigned long start_pfn, end_pfn; size_t tmp_size; const void *prop; @@ -140,6 +141,22 @@ int ima_get_kexec_buffer(void **addr, size_t *size) if (ret) return ret; + /* Do some sanity on the returned size for the ima-kexec buffer */ + if (!tmp_size) + return -ENOENT; + + /* + * Calculate the PFNs for the buffer and ensure + * they are with in addressable memory. + */ + start_pfn = PHYS_PFN(tmp_addr); + end_pfn = PHYS_PFN(tmp_addr + tmp_size - 1); + if (!page_is_ram(start_pfn) || !page_is_ram(end_pfn)) { + pr_warn("IMA buffer at 0x%lx, size = 0x%zx beyond memory\n", + tmp_addr, tmp_size); + return -EINVAL; + } + *addr = __va(tmp_addr); *size = tmp_size; diff --git a/include/dt-bindings/clock/efm32-cmu.h b/include/dt-bindings/clock/efm32-cmu.h deleted file mode 100644 index 4b48d15fe194..000000000000 --- a/include/dt-bindings/clock/efm32-cmu.h +++ /dev/null @@ -1,43 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef __DT_BINDINGS_CLOCK_EFM32_CMU_H -#define __DT_BINDINGS_CLOCK_EFM32_CMU_H - -#define clk_HFXO 0 -#define clk_HFRCO 1 -#define clk_LFXO 2 -#define clk_LFRCO 3 -#define clk_ULFRCO 4 -#define clk_AUXHFRCO 5 -#define clk_HFCLKNODIV 6 -#define clk_HFCLK 7 -#define clk_HFPERCLK 8 -#define clk_HFCORECLK 9 -#define clk_LFACLK 10 -#define clk_LFBCLK 11 -#define clk_WDOGCLK 12 -#define clk_HFCORECLKDMA 13 -#define clk_HFCORECLKAES 14 -#define clk_HFCORECLKUSBC 15 -#define clk_HFCORECLKUSB 16 -#define clk_HFCORECLKLE 17 -#define clk_HFCORECLKEBI 18 -#define clk_HFPERCLKUSART0 19 -#define clk_HFPERCLKUSART1 20 -#define clk_HFPERCLKUSART2 21 -#define clk_HFPERCLKUART0 22 -#define clk_HFPERCLKUART1 23 -#define clk_HFPERCLKTIMER0 24 -#define clk_HFPERCLKTIMER1 25 -#define clk_HFPERCLKTIMER2 26 -#define clk_HFPERCLKTIMER3 27 -#define clk_HFPERCLKACMP0 28 -#define clk_HFPERCLKACMP1 29 -#define clk_HFPERCLKI2C0 30 -#define clk_HFPERCLKI2C1 31 -#define clk_HFPERCLKGPIO 32 -#define clk_HFPERCLKVCMP 33 -#define clk_HFPERCLKPRS 34 -#define clk_HFPERCLKADC0 35 -#define clk_HFPERCLKDAC0 36 - -#endif /* __DT_BINDINGS_CLOCK_EFM32_CMU_H */ diff --git a/include/linux/of.h b/include/linux/of.h index f0a5d6b10c5a..d74fd82a6963 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -207,7 +207,7 @@ static inline void of_node_clear_flag(struct device_node *n, unsigned long flag) } #if defined(CONFIG_OF_DYNAMIC) || defined(CONFIG_SPARC) -static inline int of_property_check_flag(struct property *p, unsigned long flag) +static inline int of_property_check_flag(const struct property *p, unsigned long flag) { return test_bit(flag, &p->_flags); } @@ -814,7 +814,8 @@ static inline void of_node_clear_flag(struct device_node *n, unsigned long flag) { } -static inline int of_property_check_flag(struct property *p, unsigned long flag) +static inline int of_property_check_flag(const struct property *p, + unsigned long flag) { return 0; } |
