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2026-07-19hwmon: (pmbus/max34440) block unsupported VIN and IIN limit registersAlexis Czezar Torreno
MAX34451 and ADPM chips do not support standard PMBus VIN/IIN limit registers, manufacturer specific min/max registers, or undercurrent or undertemperature fault limits. STATUS_BYTE and STATUS_OTHER are also not available. Accessing these non-existent registers during driver initialization triggers a CML error and asserts ALERT. Handled by blocking these functions during read/write. Fixes: 7a001dbab4ad ("hwmon: (pmbus/max34440) Add support for MAX34451.") Fixes: 629cf8f6c23a ("hwmon: (pmbus/max34440) Add support for ADPM12160") Fixes: 2e0b52f1ae88 ("hwmon: (pmbus/max34440): add support adpm12200") Fixes: 479bfeba2eb6 ("hwmon: (pmbus/max34440): add support adpm12250") Signed-off-by: Alexis Czezar Torreno <alexisczezar.torreno@analog.com> Link: https://lore.kernel.org/r/20260716-max34451_fixes-v1-1-a941b27eaecb@analog.com Signed-off-by: Guenter Roeck <linux@roeck-us.net>
2026-07-19arm64: dts: apple: t60xx: jxxx: Add device-specific SMC hwmon sensorsJames Calligeros
Add the device-specific hwmon sensors for select T60xx-based devices Signed-off-by: James Calligeros <jcalligeros99@gmail.com> Link: https://patch.msgid.link/20260714-smc-subdev-dt-v2-12-13fa78873121@gmail.com Signed-off-by: Sven Peter <sven@kernel.org>
2026-07-19arm64: dts: apple: t8112: jxxx: Add device-specific SMC hwmon sensorsJames Calligeros
Add the device-specific hwmon sensors for select T8112-based devices Signed-off-by: James Calligeros <jcalligeros99@gmail.com> Link: https://patch.msgid.link/20260714-smc-subdev-dt-v2-11-13fa78873121@gmail.com Signed-off-by: Sven Peter <sven@kernel.org>
2026-07-19arm64: dts: apple: t8103: jxxx: Add device-specific SMC hwmon sensorsJames Calligeros
Add the device-specific hwmon sensors for select T8103-based devices Signed-off-by: James Calligeros <jcalligeros99@gmail.com> Link: https://patch.msgid.link/20260714-smc-subdev-dt-v2-10-13fa78873121@gmail.com Signed-off-by: Sven Peter <sven@kernel.org>
2026-07-19arm64: dts: apple: t602x: Add common SMC hwmon sensorsJames Calligeros
Add the SMC hwmon sensors common to all SoCs Signed-off-by: James Calligeros <jcalligeros99@gmail.com> Link: https://patch.msgid.link/20260714-smc-subdev-dt-v2-9-13fa78873121@gmail.com Signed-off-by: Sven Peter <sven@kernel.org>
2026-07-19arm64: dts: apple: t600x: Add common SMC hwmon sensorsJames Calligeros
Add the SMC hwmon sensors common to all SoCs Signed-off-by: James Calligeros <jcalligeros99@gmail.com> Link: https://patch.msgid.link/20260714-smc-subdev-dt-v2-8-13fa78873121@gmail.com Signed-off-by: Sven Peter <sven@kernel.org>
2026-07-19arm64: dts: apple: t8112: Add common SMC hwmon sensorsJames Calligeros
Add the SMC hwmon sensors common to all SoCs Signed-off-by: James Calligeros <jcalligeros99@gmail.com> Link: https://patch.msgid.link/20260714-smc-subdev-dt-v2-7-13fa78873121@gmail.com Signed-off-by: Sven Peter <sven@kernel.org>
2026-07-19arm64: dts: apple: t8103: Add common SMC hwmon sensorsJames Calligeros
Add the SMC hwmon sensors common to all SoCs Signed-off-by: James Calligeros <jcalligeros99@gmail.com> Link: https://patch.msgid.link/20260714-smc-subdev-dt-v2-6-13fa78873121@gmail.com Signed-off-by: Sven Peter <sven@kernel.org>
2026-07-19arm64: dts: apple: Add common SMC hwmon infrastructureJames Calligeros
Apple's System Management Controller exposes the readings from numerous sensors scattered around the SoC and elsewhere in the machine. Some of these sensors are reliably common on all devices, whereas others are exposed at SMC keys specific to either the SoC or even the particular device. To account for this and expose the right sensors for the right device without tedious Devicetree duplication, we can include fragments of increasing specificity in the per-device .dts files such that the individual keys (of which there are potentially hundreds) do not need to be copied in for every device. Add the initial set of SMC hwmon sensors that are common to multiple devices so that they can be included in the per-device Devicetrees. Co-developed-by: Janne Grunau <j@jannau.net> Signed-off-by: Janne Grunau <j@jannau.net> Signed-off-by: James Calligeros <jcalligeros99@gmail.com> Link: https://patch.msgid.link/20260714-smc-subdev-dt-v2-5-13fa78873121@gmail.com Signed-off-by: Sven Peter <sven@kernel.org>
2026-07-19arm64: dts: apple: t602x: Add SMC hwmon nodeJames Calligeros
Add the SMC hwmon subdevice Signed-off-by: James Calligeros <jcalligeros99@gmail.com> Link: https://patch.msgid.link/20260714-smc-subdev-dt-v2-4-13fa78873121@gmail.com Signed-off-by: Sven Peter <sven@kernel.org>
2026-07-19arm64: dts: apple: t600x: Add SMC hwmon nodeJames Calligeros
Add the SMC hwmon subdevice Signed-off-by: James Calligeros <jcalligeros99@gmail.com> Link: https://patch.msgid.link/20260714-smc-subdev-dt-v2-3-13fa78873121@gmail.com Signed-off-by: Sven Peter <sven@kernel.org>
2026-07-19arm64: dts: apple: t8103: Add SMC hwmon nodeJames Calligeros
Add the SMC hwmon subdevice Signed-off-by: James Calligeros <jcalligeros99@gmail.com> Link: https://patch.msgid.link/20260714-smc-subdev-dt-v2-2-13fa78873121@gmail.com Signed-off-by: Sven Peter <sven@kernel.org>
2026-07-19arm64: dts: apple: t8112: Add SMC hwmon nodeJames Calligeros
Add the SMC hwmon subdevice Signed-off-by: James Calligeros <jcalligeros99@gmail.com> Link: https://patch.msgid.link/20260714-smc-subdev-dt-v2-1-13fa78873121@gmail.com Signed-off-by: Sven Peter <sven@kernel.org>
2026-07-19gfs2: Remove the glock lru list and shrinkerAndreas Gruenbacher
We are no longer keeping unreferences glocks around, so remove the now-obsolete glock lru list and shrinker. Signed-off-by: Andreas Gruenbacher <agruenba@redhat.com>
2026-07-19gfs2: Skip dlm unlocks earlierAndreas Gruenbacher
When we were still caching unreferenced glocks, evicting all the cached inodes in gfs2_kill_sb() did put the unreferenced glocks onto the glock lru list, and they would be freed in gfs2_gl_hash_clear(). We could set the SDF_SKIP_DLM_UNLOCK flag in gfs2_gl_hash_clear() to indicate to gdlm_put_lock() to skip unlocking glocks explicitly when possible. Now, glocks are demoted and dropped immediately though, so to allow gdlm_put_lock() to skip unnecessary unlocking, we need to set some "unmount" flag before calling gfs2_evict_inodes(). We can use the existing SDF_KILL flag for that if we set it before calling gfs2_evict_inodes() in gfs2_kill_sb(). Signed-off-by: Andreas Gruenbacher <agruenba@redhat.com>
2026-07-19gfs2: Don't cache unreferenced glocksAndreas Gruenbacher
Currently, gfs2 caches unreferenced glocks until memory pressure sets in or the filesystem is unmounted. This was supposedly done to avoid excessive log flushing: when a glock still has outstanding revokes, freeing it requires an extra log flush, and we want to avoid too many of those extra log flushes. Since commit 9287c6452d2b1 ("gfs2: Fix occasional glock use-after-free"), outstanding revokes are accounted for in the glock reference count and glocks with outstanding revokes will never be freed anymore, so this is no longer an issue. This also means that we won't need a glock LRU list anymore, but we leave removing that list to a later patch for better readability. It might seem that glocks that are not referenced anymore can be dropped immediately without unlocking them first, but that isn't true for inode glocks that have an address space attached (the "gfs2_glock(aspace)" slab cache): that address space is only truncated when the associated glock is unlocked. So unlock those glocks when they become unreferenced. Signed-off-by: Andreas Gruenbacher <agruenba@redhat.com>
2026-07-19gfs2: Enable automatic glock hash table shrinkingAndreas Gruenbacher
All of the examiner functions passed to glock_hash_walk() can deal with glock hash table resizes and the resulting repeat visiting of glocks, so we can allow automatic glock hash table shrinking. Signed-off-by: Andreas Gruenbacher <agruenba@redhat.com>
2026-07-19alpha: enable lockdep hardirq state trackingMagnus Lindholm
Alpha masks interrupts through the PAL IPL state, so lockdep cannot infer hardirq state transitions from generic code alone. Add explicit hardirq on/off annotations to the low-level entry and return paths so lockdep's IRQ state follows the hardware IPL state. Annotate the PAL IPL transitions and the shared return-to-user/kernel paths where interrupts become enabled or disabled. With the preceding irqflags, raw-lock, sysfs, and ftrace return-address preparations in place, select LOCKDEP_SUPPORT and TRACE_IRQFLAGS_SUPPORT for Alpha. This keeps CONFIG_PROVE_LOCKING usable on Alpha instead of disabling debug_locks due to IRQ-state mismatches. Reviewed-by: Matt Turner <mattst88@gmail.com> Tested-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Magnus Lindholm <linmag7@gmail.com> Link: https://lore.kernel.org/r/20260706170019.2941459-7-linmag7@gmail.com Signed-off-by: Magnus Lindholm <linmag7@gmail.com>
2026-07-19alpha: use raw spinlocks for low-level platform locksMagnus Lindholm
Some Alpha platform locks are used as low-level hardware serialization locks in interrupt-controller and chipset access paths. These paths can run while IRQ state is being changed or while lockdep is tracking that state, so regular spinlock instrumentation is not appropriate once lockdep is enabled. Convert the affected Tsunami and Rawhide platform locks to raw_spinlock_t. This keeps the locks as simple hardware serialization locks and avoids lockdep recursion or IRQ-state mismatches when CONFIG_PROVE_LOCKING is enabled. This is a preparatory change for enabling lockdep hardirq state tracking on Alpha. Reviewed-by: Matt Turner <mattst88@gmail.com> Tested-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Magnus Lindholm <linmag7@gmail.com> Link: https://lore.kernel.org/r/20260706170019.2941459-6-linmag7@gmail.com Signed-off-by: Magnus Lindholm <linmag7@gmail.com>
2026-07-19alpha: provide ftrace return address support for lockdepMagnus Lindholm
Lockdep uses ftrace_return_address() to report useful call sites for lock acquisition and IRQ-state tracking diagnostics. Provide the Alpha architecture hook using the compiler return-address builtin when frame pointers are available. Return zero when frame pointers are disabled, matching the existing fallback behavior of architectures that cannot provide a reliable return address. This is a preparatory change for enabling lockdep support on Alpha. Reviewed-by: Matt Turner <mattst88@gmail.com> Tested-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Magnus Lindholm <linmag7@gmail.com> Link: https://lore.kernel.org/r/20260706170019.2941459-5-linmag7@gmail.com Signed-off-by: Magnus Lindholm <linmag7@gmail.com>
2026-07-19alpha: make irqflags helpers operate on IPL stateMagnus Lindholm
Alpha interrupt masking is controlled by the PAL IPL value, not by the full processor status word. Make arch_local_save_flags() return the current IPL directly, and make arch_local_irq_restore() and arch_irqs_disabled_flags() treat their argument as IPL state. Mask the low IPL bits in the restore and test helpers so callers which still pass a saved PS value continue to behave as expected. This prepares the irqflags helpers for lockdep IRQ-state tracking, where the saved flags value is used to determine whether hard IRQs are enabled or disabled. Reviewed-by: Matt Turner <mattst88@gmail.com> Tested-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Magnus Lindholm <linmag7@gmail.com> Link: https://lore.kernel.org/r/20260706170019.2941459-4-linmag7@gmail.com Signed-off-by: Magnus Lindholm <linmag7@gmail.com>
2026-07-19alpha: add ARCH_STACKWALK-based stacktrace supportMagnus Lindholm
Implement arch_stack_walk() for Alpha using a simple kernel stack scanning walker. Start from regs+1 for current tasks to skip pt_regs and use pcb.ksp for blocked tasks. Filter candidates with __kernel_text_address() and stop at stack bounds via kstack_end(). Enable CONFIG_STACKTRACE_SUPPORT and CONFIG_ARCH_STACKWALK so generic stacktrace users (dump_stack(), /proc/*/stack, SysRq backtraces, etc.) work on Alpha. This provides functional in-kernel stack traces without requiring frame pointer unwinding. Reviewed-by: Matt Turner <mattst88@gmail.com> Tested-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Magnus Lindholm <linmag7@gmail.com> Link: https://lore.kernel.org/r/20260706170019.2941459-3-linmag7@gmail.com Signed-off-by: Magnus Lindholm <linmag7@gmail.com>
2026-07-19alpha: enable regset-based ptrace and core dumpsMagnus Lindholm
Add a user_regset_view for Alpha and switch ELF core dumping to CORE_DUMP_USE_REGSET. General-purpose registers are exported in ELF gregs layout, including callee-saved registers and a correct user stack pointer. The user stack pointer is not preserved in pt_regs on Alpha, so expose it from the PCB, or via rdusp() for the current task, when building the ELF register image. This makes the user stack pointer consistent for core dumps, ptrace regsets, and PTRACE_GET_SYSCALL_INFO. Implement regset get/set callbacks for both NT_PRSTATUS and NT_PRFPREG. The callbacks translate between Alpha's pt_regs/thread state and the ELF-visible register layouts, while the common ptrace regset code handles PTRACE_GETREGSET and PTRACE_SETREGSET iovec semantics. This avoids duplicating subtle short-buffer and oversized-buffer behavior in arch_ptrace(). With these changes Alpha satisfies the requirements for HAVE_ARCH_TRACEHOOK and selects it, enabling generic tracehook and ptrace syscall-info code paths without changing the existing syscall entry ABI. Reviewed-by: Matt Turner <mattst88@gmail.com> Tested-by: Matt Turner <mattst88@gmail.com> Signed-off-by: Magnus Lindholm <linmag7@gmail.com> Link: https://lore.kernel.org/r/20260706170019.2941459-2-linmag7@gmail.com Signed-off-by: Magnus Lindholm <linmag7@gmail.com>
2026-07-19x86/mce: Work around build warning after MSR-interface switchJuergen Gross
The recent switch to 64-bit MSR interfaces introduced a build warning. Work it around with a __maybe_unused annotation. After the full conversion of the APIs we'll be able to address this more robustly by making sure the APIs consume all the values as far the compiler is concerned, so that the compiler doesn't emit such nuisance warnings. [ mingo: Updated the changelog. ] Fixes: cff219368bd0 ("x86/mce: Stop using 32-bit MSR interfaces") Closes: https://lore.kernel.org/oe-kbuild-all/202607031726.ZOwu4snu-lkp@intel.com/ Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Juergen Gross <jgross@suse.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Link: https://patch.msgid.link/20260703105555.1758819-1-jgross@suse.com
2026-07-19ALSA: sparc/dbri: Fix "possible condition with no effect" warningwangdicheng
Fix a compiler warning about a condition with no effect: sound/sparc/dbri.c:1843:1-3: WARNING: possible condition with no effect (if == else) When DBRI_DEBUG is not defined, dprintk expands to an empty do-while statement, making both branches of the if-else no-ops. Guard the entire debug block with #ifdef DBRI_DEBUG to eliminate the warning and keep the rval reference consistent with its declaration scope. Signed-off-by: wangdicheng <wangdicheng@kylinos.cn> Link: https://patch.msgid.link/20260717091542.721877-3-wangdich9700@163.com Signed-off-by: Takashi Iwai <tiwai@suse.de>
2026-07-18Merge tag 's390-7.2-5' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux Pull s390 fixes from Vasily Gorbik: - Fix checksum lib on machines without the vector facility where the non-vector fallback made csum_partial() calculate the checksum from address 0 instead of the provided buffer - Fix cpum_cf perf event initialization missing speculation barrier for user controlled event numbers used as generic event array indexes * tag 's390-7.2-5' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: s390/perf_cpum_cf: Add missing array_index_nospec() to __hw_perf_event_init() s390/checksum: Fix csum_partial() without vector facility
2026-07-18Merge tag 'arc-7.2-fixes' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC fixes from Vineet Gupta: - Misc fixes and config updates * tag 'arc-7.2-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: configs: Drop redundant I2C_DESIGNWARE_PLATFORM arc: validate DT CPU map strings before parsing them
2026-07-18iio: resolver: ad2s1200: use dev_err_probe()Vojtěch Krátký
Use dev_err_probe() instead of dev_err() to simplify the error path and cleanly handle deferred probing. Signed-off-by: Vojtěch Krátký <vo.kratky@seznam.cz> Signed-off-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
2026-07-18arm64: dts: qcom: glymur: Add CX power domain to GCCAbel Vesa
The GCC GDSCs on Glymur are backed by the RPMh CX power domain. Without describing that parent domain, consumers of GCC-provided GDSCs can enable their local domain without causing the required CX vote to be held. Add the CX power-domain reference to the GCC node so votes from GCC GDSC consumers can propagate to RPMh CX. Fixes: 41b6e8db400c ("arm64: dts: qcom: Introduce Glymur base dtsi") Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260715-glymur-fix-gcc-cx-scaling-v3-3-72eb5adad156@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-18dt-bindings: remoteproc: qcom: move glymur SoCCP pas to standaloneAnanthu C V
SHM bridge creation is required to enable memory protection for both remoteproc metadata and its memory region on Qualcomm SoCs like Glymur running non-Gunyah based Hypervisors, unlike Kaanapali. Having Glymur fall back to the Kaanapali binding is therefore incorrect and breaks subsystem restart on Glymur. Fix this by decoupling Glymur SoCCP PAS from Kaanapali and registering it as its own binding. Fixes: 8b54bacadc0c ("dt-bindings: remoteproc: qcom: Document pas for SoCCP on Kaanapali and Glymur platforms") Signed-off-by: Ananthu C V <ananthu.cv@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260709-glymur-soccp-v6-1-16f70227547d@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-18dt-bindings: iio: dac: fix spelling of 'reference' in adi,ad5791Yahya Toubali
Fix misspelling of 'reference' (was 'referance') in the vrefp-supply and vrefn-supply descriptions. Signed-off-by: Yahya Toubali <yahya@yahyatoubali.me> Signed-off-by: Jonathan Cameron <jonathan.cameron@oss.qualcomm.com>
2026-07-18arm64: dts: qcom: glymur: Drop fake PCIe phy 3BKrzysztof Kozlowski
According to user manual / programming guide there is no separate PCIe phy 3A and 3B, but one 8-lane QMP PCIe Gen5 PHY which consists of two 4-lane blocks. This is also visible in memory map, where the 0xf00000 is marked as the main block with additional sub blocks for each 4-lane phys. Describing the sub phys without the rest is not correct from hardware description, even if it works. Link: https://lore.kernel.org/r/20260420-optimistic-unnatural-stingray-80da35@quoll/ Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260609141608.354186-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-18arm64: dts: qcom: glymur: add TRNG nodeHarshal Dev
Glymur has a True Random Number Generator, add the node with the correct compatible set. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Harshal Dev <harshal.dev@oss.qualcomm.com> Tested-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260424-glymur_trng_enablement-v2-2-0603cbe68440@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-18clk: qcom: camcc-glymur: Add const qualifier for driver_data & CBCRs listJagadeesh Kona
The qcom_cc_driver_data and critical CBCRs list are never modified by common code and are expected to be const. Hence add const qualifier for these fields. Signed-off-by: Jagadeesh Kona <jagadeesh.kona@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260714-glymur_camcc_const_fixes-v1-1-c635123ebbeb@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-18arm64: dts: qcom: glymur: enable ETR and CTCU devicesJie Gan
Embedded Trace Router(ETR) is working as a DDR memory sink to collect tracing data from source device and the CTCU device serves as the control unit for the ETR device. Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260714-add-ctcu-etr-for-glymur-v1-1-791de63c0713@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-18arm64: dts: qcom: glymur: Add PCIe port compatibles and portsKonrad Dybcio
Centrally define the endpoints to let device DTs that describe PCIe devices and/or M.2 connectors refer to them without error-prone duplication. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260716-topic-smb2370_port2-v1-2-83d02b2ba4b0@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-18arm64: dts: qcom: smb2370: Disable SMB2370_2 by defaultKonrad Dybcio
It's absent on laptops that only have 2 type-C ports (the majority so far, including the CRD). Keep it disabled by default, following established practice from the previous generation. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260716-topic-smb2370_port2-v1-1-83d02b2ba4b0@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-18wifi: iwlwifi: mld: move BIOS reading code to where it belongsMiri Korenblit
We have a dedicated function to fetch all the BIOS tables when the opmode starts, and yet we read a couple of tables directly from iwl_op_mode_mld_start, which is already a large function that does multiple things. Move the reading of the sgom, puncturing, and RFI enablement to the dedicated iwl_mld_get_bios_tables. Link: https://patch.msgid.link/20260717172958.b19a33e0b507.I73f6b5e6a81d0f411f12589ceb30afa655c0a16b@changeid Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
2026-07-18wifi: iwlwifi: mld: add debug log after AP type commandPagadala Yesu Anjaneyulu
Add a radio debug trace when MCC_ALLOWED_AP_TYPE_CMD is sent successfully during AP type table initialization. This improves bring-up visibility without changing runtime behavior. Failures are still reported through the existing error log path. Signed-off-by: Pagadala Yesu Anjaneyulu <pagadala.yesu.anjaneyulu@intel.com> Link: https://patch.msgid.link/20260717172958.18e1fc5ec109.I76dd832f62d00a8f358f8e4a705f25184ac53da2@changeid Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
2026-07-18wifi: iwlwifi: mld: support update_mcc notification v2Pagadala Yesu Anjaneyulu
New firmware will support version 2 of the update_mcc notification. The extra field is used for a new feature, but we does not support it. Keep the existing payload definition compatible with both versions and register version 2 in the MLD notification version table so the driver accepts the newer notification without changing the behavior. This preserves version 1 support and adds compatibility with firmware that sends version 2. Signed-off-by: Pagadala Yesu Anjaneyulu <pagadala.yesu.anjaneyulu@intel.com> Link: https://patch.msgid.link/20260717172958.9c5a940d37dc.I955800c2377b802ffb99003349552cc4036ca4bd@changeid Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
2026-07-18wifi: iwlwifi: fw: move SAR defines from acpi.h to regulatory.hAvinash Bhatt
IWL_SAR_ENABLE_MSK and IWL_REDUCE_POWER_FLAGS_POS describe the layout of the shared WRDS/SAR table format. They are not ACPI-specific: the same bit positions are used regardless of whether the data originates from ACPI, UEFI, or another BIOS source. IWL_SAR_ENABLE_MSK was already duplicated in regulatory.h; remove it from acpi.h to eliminate the duplication. Move IWL_REDUCE_POWER_FLAGS_POS to regulatory.h alongside IWL_SAR_ENABLE_MSK so that both SAR field descriptors live in the shared regulatory header, accessible to all BIOS configuration sources. No functional change. Signed-off-by: Avinash Bhatt <avinash.bhatt@intel.com> Link: https://patch.msgid.link/20260717172958.32e5dcde4b90.I420c58b05ab6ab011c4c771ca9e4eb62740de549@changeid Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
2026-07-18wifi: iwlwifi: mld: drop connection on D3 resume failureAyala Beker
When FW crashes on D3 exit, iwl_mld_nic_error() sets STATUS_RESET_PENDING and queues restart wk, but mac80211's resume callback synchronously calls iwl_trans_stop_device() which clears the flag. As a result restart wk skips sw_reset, and the FW error recovery buffer is never read. The new FW boots with empty BA state and initial sequence numbers, while the AP still holds its A-MPDU RX reorder window. This causes MPDUs to be dropped as IWL_RX_MPDU_REORDER_BA_OLD_SN until ADDBA is renegotiated. We don't know how long the firmware has been in an error state or whether the AP still considers us associated, so keeping the connection alive is not worth it. Call ieee80211_resume_disconnect() when iwl_mld_wait_d3_notif() fails, and let userspace reassociate. Signed-off-by: Ayala Beker <ayala.beker@intel.com> Reviewed-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Link: https://patch.msgid.link/20260717172958.3e10c8498f53.Icf5644b42d79e984ecc16abfa873bd37f611e778@changeid Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
2026-07-18wifi: iwlwifi: mvm: ignore sync frames when sync is disabledEmmanuel Grumbach
Gate time-sync frame interception on the active flag so frames are not queued after time-sync teardown. Assisted-by: GitHubCopilot:GPT-5.3-Codex Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Link: https://patch.msgid.link/20260717172958.ac73ee199a25.Ic1489244f9b02da93060f0a0e5b300a73527f265@changeid Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
2026-07-18wifi: iwlwifi: mld: initialize scan-abort statusEmmanuel Grumbach
Initialize abort status before issuing the abort command so debug logging never reads an uninitialized value on error paths. Assisted-by: GitHubCopilot:GPT-5.3-Codex Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Link: https://patch.msgid.link/20260717172958.9d804f466534.I4e10270bd1dde4a80940a47ef5d383729cc66cb1@changeid Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
2026-07-18wifi: iwlwifi: mld: validate wake packet crypto overheadEmmanuel Grumbach
Wake packet parsing only accounted for FCS and missed per-key IV/ICV overhead for protected data frames. Prevent size underflow and bad packet trimming when notifications are malformed or truncated. Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Link: https://patch.msgid.link/20260717172958.e06595623533.Ie09494b7e34e5872b750fd90e325648ee469d0da@changeid Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
2026-07-18wifi: iwlwifi: validate SEC_RT TLV minimum sizeEmmanuel Grumbach
Reject firmware section TLVs that are shorter than the offset field before subtracting sizeof(offset) from the section size. This prevents size underflow for malformed TLVs. Assisted-by: GitHubCopilot:GPT-5.3-Codex Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Link: https://patch.msgid.link/20260717173215.17b040b27edc.I6b32d1e9ad707417e2e604f08a63582456209372@changeid Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
2026-07-18wifi: iwlwifi: uefi: bound PPAG revision bitmap shiftEmmanuel Grumbach
Validate revision is below 32 before BIT(revision) in PPAG parsing. Assisted-by: GitHubCopilot:GPT-5.3-Codex Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Link: https://patch.msgid.link/20260717173215.d116dd2efdc1.I3c6cae5cb9d0acc2d94544bc755b0754a91b10ba@changeid Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
2026-07-18wifi: iwlwifi: acpi: validate WGDS table revision indexEmmanuel Grumbach
Check tbl_rev bounds before BIT(tbl_rev) to avoid undefined shifts when firmware reports an invalid revision value. Assisted-by: GitHubCopilot:GPT-5.3-Codex Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Link: https://patch.msgid.link/20260717173215.52a01f841f2a.Ic0131eaac31d9ff71b169138d9b0865cb39b44a9@changeid Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
2026-07-18wifi: iwlwifi: dbg-tlv: bound aligned TLV walk lengthEmmanuel Grumbach
Validate ALIGN(tlv_len, 4) before advancing through external debug TLVs to prevent parser length underflow. Assisted-by: GitHubCopilot:GPT-5.3-Codex Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Link: https://patch.msgid.link/20260717173215.e08d6550c6ec.Iad64190a7d5cded553aff41973120396aef1b557@changeid Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
2026-07-18wifi: iwlwifi: bound aligned TLV advance in FW parserEmmanuel Grumbach
Validate ALIGN(tlv_len, 4) against remaining parser length before consuming bytes from the firmware image. This avoids length underflow on malformed TLVs. Assisted-by: GitHubCopilot:GPT-5.3-Codex Signed-off-by: Emmanuel Grumbach <emmanuel.grumbach@intel.com> Link: https://patch.msgid.link/20260717173215.393c286488f9.Ia39144dc3ca334325ee4eacb7420901e2446fc23@changeid Signed-off-by: Miri Korenblit <miriam.rachel.korenblit@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-06 06:19:52 +0000