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2025-08-29dt-bindings: display/msm/gpu: account for 7xx GPUs in clocks conditionsDmitry Baryshkov
Handle two cases for Adreno 7xx: - Adreno 702 follows A610 and A619 example and has clocks in the GPU node. - Newer 7xx GPUs use a different pattern for the compatibles and did not match currently. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/661351/ Link: https://lore.kernel.org/r/20250628-rework-msm-gpu-schema-v1-1-89f818c51b6a@oss.qualcomm.com
2025-08-28ASoC: renesas: msiof: Make small adjustments to avoidMark Brown
Merge series from Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>: Current Renesas MSIOF get unknown error when first used. This patch-set will fixup this issue.
2025-08-28dt-bindings: cache: ax45mp: add 2048 as a supported cache-sets valueConor Dooley
The QiLai implementation of this cache controller uses a cache-sets of 2048, and mandates it in an if/else block - but the definition of the property only permits 1024. Add 2048 as an option, and deny its use outside of the QiLai. Fixes: 51b081cdb9237 ("dt-bindings: cache: add QiLai compatible to ax45mp") Reviewed-by: Ben Zong-You Xie <ben717@andestech.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-08-28dt-bindings: PCI: ti,am65: Extend for use with PVUJan Kiszka
The Peripheral Virtualization Unit (PVU) on the AM65 SoC is capable of restricting DMA from PCIe devices to specific regions of host memory. Add the optional property "memory-regions" to point to such regions of memory when PVU is used. Since the PVU deals with system physical addresses, utilizing the PVU with PCIe devices also requires setting up the VMAP registers to map the Requester ID of the PCIe device to the CBA Virtual ID, which in turn is mapped to the system physical address. Hence, describe the VMAP registers which are optional unless the PVU shall be used for PCIe. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Li Hua Qian <huaqian.li@siemens.com> [mani: Expanded PVU in description] Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250728023701.116963-3-huaqian.li@siemens.com
2025-08-28dt-bindings: arm: stm32: add required #clock-cells propertyRaphael Gallais-Pou
On STM32MP25 SoC, the syscfg peripheral provides a clock to the display subsystem through a multiplexer. Since it only provides a single clock, the cell value is 0. Doing so allows the clock consumers to reach the peripheral and gate the clock accordingly. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Yannick Fertre <yannick.fertre@foss.st.com> Acked-by: Christophe Roullier <christophe.roullier@foss.st.com> Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-6-9c825e28f733@foss.st.com Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-08-28dt-bindings: display: st,stm32mp25-lvds: add power-domains propertyRaphael Gallais-Pou
STM32 LVDS peripheral may be in a power domain. Allow an optional single 'power-domains' entry for STM32 LVDS devices. Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Yannick Fertre <yannick.fertre@foss.st.com> Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-5-9c825e28f733@foss.st.com Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-08-28dt-bindings: display: st,stm32mp25-lvds: add access-controllers propertyRaphael Gallais-Pou
access-controllers is an optional property that allows a peripheral to refer to one or more domain access controller(s). This property is added when the peripheral is under the STM32 firewall controller. It allows an accurate representation of the hardware, where the peripheral is connected to a firewall bus. The firewall can then check the peripheral accesses before allowing its device to probe. Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Yannick Fertre <yannick.fertre@foss.st.com> Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-4-9c825e28f733@foss.st.com Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-08-28dt-bindings: display: st: add new compatible to LVDS deviceRaphael Gallais-Pou
Update the compatible to accept both "st,stm32mp255-lvds" and st,stm32mp25-lvds" respectively. Default will fall back to "st,stm32mp25-lvds". Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Yannick Fertre <yannick.fertre@foss.st.com> Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-3-9c825e28f733@foss.st.com Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-08-28dt-bindings: display: st,stm32-ltdc: add access-controllers propertyRaphael Gallais-Pou
access-controllers is an optional property that allows a peripheral to refer to one or more domain access controller(s). This property is added when the peripheral is under the STM32 firewall controller. It allows an accurate representation of the hardware, where the peripheral is connected to a firewall bus. The firewall can then check the peripheral accesses before allowing its device to probe. Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Yannick Fertre <yannick.fertre@foss.st.com> Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-2-9c825e28f733@foss.st.com Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-08-28dt-bindings: display: st: add two new compatibles to LTDC deviceRaphael Gallais-Pou
The new STMicroelectronics SoC features a display controller similar to the one used in previous SoCs. Because there is additional registers, and different mandatory clocks it is incompatible with existing IPs. On STM32MP251, the device only needs two clocks while on STM32MP255 it needs four. Add the new names to the list of compatible string and handle each quirks accordingly. Acked-by: Philippe Cornu <philippe.cornu@foss.st.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250822-drm-misc-next-v5-1-9c825e28f733@foss.st.com Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-08-28dt-bindings: display: rockchip: Add schema for RK3588 DPTX ControllerAndy Yan
The Rockchip RK3588 SoC integrates the Synopsys DesignWare DPTX controller. And this DPTX controller need share a USBDP PHY with the USB 3.0 OTG controller during operation. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250822063959.692098-2-andyshrk@163.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-08-28dt-bindings: net: pse-pd: Add bindings for Si3474 PSE controllerPiotr Kubik
Add the Si3474 I2C Power Sourcing Equipment controller device tree bindings documentation. Signed-off-by: Piotr Kubik <piotr.kubik@adtran.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Kory Maincent <kory.maincent@bootlin.com> Link: https://patch.msgid.link/71a67c6f-6fce-49c7-96ec-554602dbd4f1@adtran.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-08-28dt-bindings: Remove outdated cpufreq-dt.txtFrank Li
The information present in this file is outdated and doesn't serve any purpose with the current design of the driver. Remove the outdated file. Signed-off-by: Frank Li <Frank.Li@nxp.com> [ Viresh: Rewrite commit log ] Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2025-08-28dt-bindings: ata: imx: Document 'target-supply'Fabio Estevam
The 'target-supply' property is used by some i.MX devicetree files. Document it to fix the following dt-schema warning: 'target-supply' does not match any of the regexes: '^pinctrl-[0-9]+$' Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2025-08-28dt-bindings: ata: highbank: Minor whitespace cleanup in exampleKrzysztof Kozlowski
The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2025-08-27dt-bindings: nfc: ti,trf7970a: Restrict the ti,rx-gain-reduction-db valuesFabio Estevam
Instead of stating the supported values for the ti,rx-gain-reduction-db property in free text format, add an enum entry that can help validating the devicetree files. Signed-off-by: Fabio Estevam <festevam@gmail.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250826141736.712827-1-festevam@gmail.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-08-27dt-bindings: PCI: qcom,pcie-sm8550: Add SM8750 compatibleKrishna Chaitanya Chundru
PCIe controller present in SM8750 SoC is backwards compatible with the controller present in SM8550 SoC. Hence, add the compatible with SM8550 fallback. Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com> [mani: reworded description] Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250826-pakala-v3-1-721627bd5bb0@oss.qualcomm.com
2025-08-27dt-bindings: PCI: Add STM32MP25 PCIe Root Complex bindingsChristian Bruel
Document the bindings for STM32MP25 PCIe Controller configured in root complex mode with one root port. Supports 4 INTx and MSI interrupts from the ARM GICv2m controller. STM32 PCIe may be in a power domain which is the case for the STM32MP25 based boards. Supports WAKE# from wake-gpios Signed-off-by: Christian Bruel <christian.bruel@foss.st.com> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://patch.msgid.link/20250820075411.1178729-4-christian.bruel@foss.st.com
2025-08-27dt-bindings: panel: lvds: Append ampire,amp19201200b5tzqw-t03 in panel-lvdsRaphael Gallais-Pou
List Ampire AMP19201200B5TZQW-T03 in the LVDS panel enumeration. Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250826-drm-misc-next-v1-1-980d0a0592b9@foss.st.com Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
2025-08-27dt-bindings: PCI: Correct example indentationKrzysztof Kozlowski
DTS example in the bindings should be indented with 2- or 4-spaces, so correct a mixture of different styles to keep consistent 4-spaces. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Manivannan Sadhasivam <mani@kernel.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250818142138.129327-2-krzysztof.kozlowski@linaro.org
2025-08-26dt-bindings: gpio: Minor whitespace cleanup in exampleKrzysztof Kozlowski
The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Yixun Lan <dlan@gentoo.org> Link: https://lore.kernel.org/r/20250821083213.46642-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-08-26dt-bindings: gpio: Move fsl,mxs-pinctrl.txt into gpio-mxs.yamlFrank Li
Move mxs-pinctrl part into gpio-mxs.yaml and add pinctrl examples to fix below CHECK_DTB warning: arch/arm/boot/dts/nxp/mxs/imx28-xea.dtb: pinctrl@80018000 (fsl,imx28-pinctrl): 'auart0-2pins@0', 'auart0@0', ... 'usb1@1' do not match any of the regexes: 'gpio@[0-9]+$', 'pinctrl-[0-9]+' Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250820164946.3782702-1-Frank.Li@nxp.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-08-25Merge tag 'devicetree-fixes-for-6.17-1' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree fixes from Rob Herring: - Fix a memory leak for of_pci_add_properties() failure case. Then fix the introduced UAF. - Add missing IORESOURCE_MEM flag on of_reserved_mem_region_to_resource() - Add already in use vendor prefix "eswin" - Clarify "of of" comment in of_match_device(). After many years of drive-by patches dropping the 2nd "of" (which referred to OpenFirmware), a correct patch finally arrived * tag 'devicetree-fixes-for-6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: of: dynamic: Fix use after free in of_changeset_add_prop_helper() dt-bindings: vendor-prefixes: add eswin of: reserved_mem: Add missing IORESOURCE_MEM flag on resources of: dynamic: Fix memleak when of_pci_add_properties() failed of: Clarify OF device context in of_match_device() comment
2025-08-25dt-bindings: net: Drop vim style annotationKrzysztof Kozlowski
Bindings files should not carry markings of editor setup, so drop vim style annotation. No functional impact. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Gabriel Somlo <gsomlo@gmail.com> Link: https://patch.msgid.link/20250821083038.46274-4-krzysztof.kozlowski@linaro.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-08-25dt-bindings: net: litex,liteeth: Correct example indentationKrzysztof Kozlowski
DTS example in the bindings should be indented with 2- or 4-spaces, so correct a mixture of different styles to keep consistent 4-spaces. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Gabriel Somlo <gsomlo@gmail.com> Link: https://patch.msgid.link/20250821083038.46274-3-krzysztof.kozlowski@linaro.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-08-25dt-bindings: display/msm: qcom,mdp5: drop lut clockDmitry Baryshkov
None of MDP5 platforms have a LUT clock on the display-controller, it was added by the mistake. Drop it, fixing DT warnings on MSM8976 / MSM8956 platforms. Technically it's an ABI break, but no other platforms are affected. Fixes: 385c8ac763b3 ("dt-bindings: display/msm: convert MDP5 schema to YAML format") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Patchwork: https://patchwork.freedesktop.org/patch/667822/ Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
2025-08-25dt-bindings: gpio-mmio: Add MMIO for IXP4xx expansion busLinus Walleij
This expansion is a simple MMIO-mapped GPIO device but the bus has a number of additional properties that we need to bring in using a reference to the bus child node schema. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250822-ixp4xx-eb-mmio-gpio-v2-2-bd2edd4a9c74@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-08-25dt-bindings: gpio-mmio: Support hogsLinus Walleij
We use hogs on some MMIO GPIO controllers so make sure the bindings support this using a pattern property. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20250822-ixp4xx-eb-mmio-gpio-v2-1-bd2edd4a9c74@linaro.org Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-08-25dt-bindings: iio: adi,ltc2664: Minor whitespace cleanup in exampleKrzysztof Kozlowski
The DTS code coding style expects exactly one space around '=' character. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250821083150.46554-2-krzysztof.kozlowski@linaro.org Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-25dt-bindings: iio: adc: max1238: Add #io-channel-cells propertyFrank Li
Add #io-channel-cells property with a constant value of 1 because it is multi-channel ADC. Fix below CHECK_DTBS warnings: arch/arm/boot/dts/nxp/ls/ls1021a-iot.dtb: adc@35 (maxim,max1239): '#io-channel-cells' does not match any of the regexes: '^pinctrl-[0-9]+$' from schema $id: http://devicetree.org/schemas/iio/adc/maxim,max1238.yaml# Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250818200014.3700738-1-Frank.Li@nxp.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-25dt-bindings: iio: mcp9600: Add microchip,mcp9601 and add constraintsBen Collins
Add microchip,mcp9601 compatible in addition to the original microchip,mcp9600 to designate support between these two chips. The current dt-binding has open-circuit and short-circuit as interrupt names, but these are only supported in mcp9601. The OC and SC detection requires that mcp9601 VSENSE be wired up, which not only enables the OC SC interrupts, but also the OC and SC status register bits. Add a microchip,vsense boolean to show the chip is wired for this support. Add constraints so this feature only applies if the mcp9601 compatible is selected. Signed-off-by: Ben Collins <bcollins@watter.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250822-upstream-changes-v8-2-40bb1739e3e2@watter.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-25dt-bindings: pinctrl: qcom,sc7280-lpass-lpi-pinctrl: Document the clock propertyMohammad Rafi Shaik
Document the clock property in sc7280 LPASS LPI pinctrl node. Clock settings required for Audioreach solution. The existing SC7280 platform only supports non-ADSP audio solutions. To enable audio functionality on ADSP with the AudioReach solution. additional core and audio hardware clocks must be configured. Without these clocks, the ADSP will crash. Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Co-developed-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/20250821044914.710044-3-quic_pkumpatl@quicinc.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-08-25dt-bindings: iio: mcp9600: Set default 3 for thermocouple-typeBen Collins
As is already documented in this file, Type-K is the default, so make that explicit in the dt-bindings. Signed-off-by: Ben Collins <bcollins@watter.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250822-upstream-changes-v8-1-40bb1739e3e2@watter.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-25MAINTAINERS: Update xilinx-ams driver maintainersSalih Erim
Anand left AMD/Xilinx some time ago. Salih and Connall are new maintainers of xilinx-ams driver. Signed-off-by: Salih Erim <salih.erim@amd.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Michal Simek <michal.simek@amd.com> Acked-by: O'Griofa, Conall <conall.ogriofa@amd.com> Link: https://patch.msgid.link/20250820100519.2272509-1-salih.erim@amd.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2025-08-25Merge 6.17-rc3 into char-misc-nextGreg Kroah-Hartman
We need the char/misc/iio fixes in here as well to build on. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-25Merge 6.17-rc3 into usb-nextGreg Kroah-Hartman
We need the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-24dt-bindings: arm: rockchip: Add HINLINK H66K / H68KChukun Pan
The HINLINK H66K/H68K are 2.5GbE SBC based on the RK3568 SoC. Add devicetree binding documentation for them. Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250818100009.170202-3-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24dt-bindings: vendor-prefixes: Add HINLINKChukun Pan
Add vendor prefix for HINLINK, which is an SBC manufacturer. Link: https://www.hinlink.cn/ Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250818100009.170202-2-amadeus@jmu.edu.cn Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-23dt-bindings: mailbox: apple,mailbox: Add ASC mailboxes on Apple A11 and T2Nick Chan
Add bindings for ASC mailboxes as found on Apple A11 and T2 SoCs. These mailboxes are used for coprocessors including Secure Enclave Processor (SEP), the NVMe coprocessor and the system management controller. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Nick Chan <towinchenmi@gmail.com> Link: https://lore.kernel.org/r/20250821-t8015-nvme-v3-1-14a4178adf68@gmail.com Signed-off-by: Sven Peter <sven@kernel.org>
2025-08-22dt-bindings: soc: rockchip: add rk3576 mipi dcphy sysconHeiko Stuebner
RK3576 CSI and DSI support requires the GRF for its DC-PHY. The "general register files" provide additional setting-bits outside the regular ip-block reg-space. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250707164906.1445288-8-heiko@sntech.de
2025-08-22dt-bindings: display: rockchip: Add rk3576 to RK3588 DW DSI2 controller schemaHeiko Stuebner
The rk3576 controller is based on the same newer Synopsis IP as the one found in the rk3588. Its external setting bits in the GRF are different though, so it needs its own distinct compatible. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250707164906.1445288-9-heiko@sntech.de
2025-08-22dt-bindings: display: ili9881c: Add Bestar BSD1218-A101KL68 LCD panelHeiko Stuebner
Document the compatible value for Bestar BSD1218-A101KL68 LCD panels that are based around the ili9881c controller. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250707164906.1445288-6-heiko@sntech.de
2025-08-22dt-bindings: vendor-prefixes: Add prefix for Shenzhen Bestar ElectronicHeiko Stuebner
Add the prefix for Bestar, named in full both on Panelook.com and their display datasheets as Shenzhen Bestar Electronic Technology Co., Ltd. which produces at least DSI displays and maybe more. Acked-by: "Rob Herring (Arm)" <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250707164906.1445288-5-heiko@sntech.de
2025-08-22dt-bindings: display: simple-bridge: Add ra620 compatibleAndy Yan
RA620 is a DP to HDMI bridge converter from RADXA, which first found be used on ROCK 5 ITX. This chip can be used without involving software. Signed-off-by: Andy Yan <andy.yan@rock-chips.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250822063959.692098-6-andyshrk@163.com Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
2025-08-22dt-bindings: mmc: sdhci-pxa: add state_uhs pinctrlDuje Mihanović
On the pxav3 controller, increasing the drive strength of the data pins might be required to maintain stability on fast bus clocks (above 100 MHz). Add a state_uhs pinctrl to allow this. Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz> Link: https://lore.kernel.org/r/20250821-pxav3-uhs-v4-1-bb588314f3c3@dujemihanovic.xyz Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2025-08-22dt-bindings: arm: fsl: add i.MX91 11x11 evk boardPengfei Li
Add the board imx91-11x11-evk in the binding document. Signed-off-by: Pengfei Li <pengfei.li_1@nxp.com> Signed-off-by: Joy Zou <joy.zou@nxp.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-08-22dt-bindings: arm: fsl: add TQMLS1012ALMatthias Schiffer
TQMLS1012AL is a SOM using NXP LS1012A CPU. MBLS1012AL is a carrier reference design. [1] https://www.tq-group.com/en/products/tq-embedded/qoriq-layerscape/tqmls1012al Signed-off-by: Matthias Schiffer <matthias.schiffer@tq-group.com> Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-08-21dt-bindings: input: convert lpc32xx-key.txt to yaml formatFrank Li
Convert lpc32xx-key.txt to yaml format. Additional changes: - set maximum of key-row(column) to 4. - add ref to matrix-keymap.yaml. Reviewed-by: Vladimir Zapolskiy <vz@mleia.com> Signed-off-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250818183814.3603308-1-Frank.Li@nxp.com Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
2025-08-21Merge tag 'regulator-fix-v6.17-rc2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator Pull regulator fixes from Mark Brown: "A couple of fairly minor device specific fixes that came in over the past week or so, plus the addition of an actual maintainer for the IR38060" * tag 'regulator-fix-v6.17-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: regulator: tps65219: regulator: tps65219: Fix error codes in probe() regulator: pca9450: Use devm_register_sys_off_handler regulator: dt-bindings: infineon,ir38060: Add Guenter as maintainer from IBM
2025-08-21dt-bindings: vendor-prefixes: add eswinPritesh Patel
Add new vendor string to dt bindings. This new vendor string is used by - ESWIN EIC770X SoC - HiFive Premier P550 board which uses EIC7700 SoC. Link: https://www.eswin.com/en/ Signed-off-by: Pritesh Patel <pritesh.patel@einfochips.com> Reviewed-by: Samuel Holland <samuel.holland@sifive.com> Signed-off-by: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250616112316.3833343-4-pinkesh.vaghela@einfochips.com Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-22 08:07:08 +0000