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2025-08-14dt-bindings: arm/cpus: Add missing Applied Micro CPU compatiblesRob Herring (Arm)
"apm,potenza" and "apm,strega" CPU compatibles have been in use for some time. Link: https://lore.kernel.org/r/20250812181428.69490-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-14Merge tag 'net-6.17-rc2' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net Pull networking fixes from Paolo Abeni: "Including fixes from Netfilter and IPsec. Current release - regressions: - netfilter: nft_set_pipapo: - don't return bogus extension pointer - fix null deref for empty set Current release - new code bugs: - core: prevent deadlocks when enabling NAPIs with mixed kthread config - eth: netdevsim: Fix wild pointer access in nsim_queue_free(). Previous releases - regressions: - page_pool: allow enabling recycling late, fix false positive warning - sched: ets: use old 'nbands' while purging unused classes - xfrm: - restore GSO for SW crypto - bring back device check in validate_xmit_xfrm - tls: handle data disappearing from under the TLS ULP - ptp: prevent possible ABBA deadlock in ptp_clock_freerun() - eth: - bnxt: fill data page pool with frags if PAGE_SIZE > BNXT_RX_PAGE_SIZE - hv_netvsc: fix panic during namespace deletion with VF Previous releases - always broken: - netfilter: fix refcount leak on table dump - vsock: do not allow binding to VMADDR_PORT_ANY - sctp: linearize cloned gso packets in sctp_rcv - eth: - hibmcge: fix the division by zero issue - microchip: fix KSZ8863 reset problem" * tag 'net-6.17-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (54 commits) net: usb: asix_devices: add phy_mask for ax88772 mdio bus net: kcm: Fix race condition in kcm_unattach() selftests: net/forwarding: test purge of active DWRR classes net/sched: ets: use old 'nbands' while purging unused classes bnxt: fill data page pool with frags if PAGE_SIZE > BNXT_RX_PAGE_SIZE netdevsim: Fix wild pointer access in nsim_queue_free(). net: mctp: Fix bad kfree_skb in bind lookup test netfilter: nf_tables: reject duplicate device on updates ipvs: Fix estimator kthreads preferred affinity netfilter: nft_set_pipapo: fix null deref for empty set selftests: tls: test TCP stealing data from under the TLS socket tls: handle data disappearing from under the TLS ULP ptp: prevent possible ABBA deadlock in ptp_clock_freerun() ixgbe: prevent from unwanted interface name changes devlink: let driver opt out of automatic phys_port_name generation net: prevent deadlocks when enabling NAPIs with mixed kthread config net: update NAPI threaded config even for disabled NAPIs selftests: drv-net: don't assume device has only 2 queues docs: Fix name for net.ipv4.udp_child_hash_entries riscv: dts: thead: Add APB clocks for TH1520 GMACs ...
2025-08-14dt-bindings: arm: Drop obsolete cavium-thunder2.txtRob Herring (Arm)
The binding is already converted to schema and is located in Documentation/devicetree/bindings/arm/bcm/brcm,vulcan-soc.yaml. Link: https://lore.kernel.org/r/20250806212812.1634740-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-14dt-bindings: arm: Convert cavium,thunder-88xx to DT schemaRob Herring (Arm)
Convert Cavium Thunder-88xx boards to DT schema format. There's not any defined board compatibles in this case. Link: https://lore.kernel.org/r/20250806212741.1633917-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-14dt-bindings: display: Drop duplicate ti,opa362 bindingRob Herring (Arm)
The "ti,opa362" binding is already supported in simple-bridge.yaml, so remove the old binding doc. Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com> Link: https://lore.kernel.org/r/20250807214508.4174167-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
2025-08-14dt-bindings: reset: add compatible for bcm63xx ephy controlKyle Hendry
Add compatible string for bcm63xx ephy control. Signed-off-by: Kyle Hendry <kylehendrydev@gmail.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250715234605.36216-3-kylehendrydev@gmail.com Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2025-08-14dt-bindings: serial: 8250: allow "main" and "uart" as clock namesAlex Elder
There are two compatible strings defined in "8250.yaml" that require two clocks to be specified, along with their names: - "spacemit,k1-uart", used in "spacemit/k1.dtsi" - "nxp,lpc1850-uart", used in "lpc/lpc18xx.dtsi" When only one clock is used, the name is not required. However there are two places that do specify a name: - In "mediatek/mt7623.dtsi", the clock for the "mediatek,mtk-btif" compatible serial device is named "main" - In "qca/ar9132.dtsi", the clock for the "ns8250" compatible serial device is named "uart" In commit d2db0d7815444 ("dt-bindings: serial: 8250: allow clock 'uartclk' and 'reg' for nxp,lpc1850-uart"), Frank Li added the restriction that two named clocks be used for the NXP platform mentioned above. Change that logic, so that an additional condition for (only) the SpacemiT platform similarly restricts the two clocks to have the names "core" and "bus". Finally, add "main" and "uart" as allowed names when a single clock is specified. Fixes: 2c0594f9f0629 ("dt-bindings: serial: 8250: support an optional second clock") Cc: stable <stable@kernel.org> Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202507160314.wrC51lXX-lkp@intel.com/ Signed-off-by: Alex Elder <elder@riscstar.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250813031338.2328392-1-elder@riscstar.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-14dt-bindings: serial: 8250: move a constraintAlex Elder
A block that required a "spacemit,k1-uart" compatible node to specify two clocks was placed in the wrong spot in the binding. Conor Dooley pointed out it belongs earlier in the file, as part of the initial "allOf". Fixes: 2c0594f9f0629 ("dt-bindings: serial: 8250: support an optional second clock") Cc: stable <stable@kernel.org> Reported-by: Conor Dooley <conor@kernel.org> Closes: https://lore.kernel.org/lkml/20250729-reshuffle-contented-e6def76b540b@spud/ Signed-off-by: Alex Elder <elder@riscstar.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250813032151.2330616-1-elder@riscstar.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-14dt-bindings: serial: brcm,bcm7271-uart: Constrain clocksKrzysztof Kozlowski
Lists should have fixed constraints, because binding must be specific in respect to hardware, thus add missing constraints to number of clocks. Cc: stable <stable@kernel.org> Fixes: 88a499cd70d4 ("dt-bindings: Add support for the Broadcom UART driver") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250812121630.67072-2-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-13dt-bindings: clock: adi,axi-clkgen: add clock-output-names propertyDavid Lechner
Add an optional `clock-output-names` property to the ADI AXI Clock Generator binding. This is already being used in the Linux driver and real-world dtbs, so we should document it to allow for correct binding validation. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20250811-dt-bindings-clk-axi-clkgen-add-clock-output-names-property-v1-1-f02727736aa7@baylibre.com Reviewed-by: Nuno Sá <nuno.sa@analog.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-08-13dt-bindings: clock: Remove unused fujitsu,mb86s70-crg11 bindingRob Herring (Arm)
The fujitsu,mb86s70-crg11 binding is unused. The driver for it was removed in 2017. It's not used for Synquacer DT either like some other mb86s70 bindings are. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250804175304.3423965-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-08-13dt-bindings: clock: Convert silabs,si570 to DT schemaRob Herring (Arm)
Convert the Silicon Labs SI570 binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250804222010.4082782-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-08-13dt-bindings: clock: Convert silabs,si5341 to DT schemaRob Herring (Arm)
Convert the Silicon Labs SI5341 binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250804222034.4083410-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-08-13dt-bindings: clock: Convert silabs,si514/544 to DT schemaRob Herring (Arm)
Convert the Silicon Labs SI514 and SI544 bindings to DT schema format. Combine the bindings into a single schema as they are the same. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250804222042.4083656-1-robh@kernel.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2025-08-13dt-bindings: usb: Drop duplicate nvidia,tegra20-ehci.txtRob Herring (Arm)
The nvidia,tegra20-ehci binding is already documented in ci-hdrc-usb2.yaml, so drop the old text binding. Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250807214351.4172243-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-13dt-bindings: usb: renesas,usbhs: Add RZ/T2H and RZ/N2H supportLad Prabhakar
Document the USBHS controller for the Renesas RZ/T2H (r9a09g077) and RZ/N2H (r9a09g087) SoCs. While the USBHS block is similar to the one found on the RZ/G2L SoC, it differs slightly in terms of interrupt configuration, clock/reset requirements, and register bit definitions. Due to these differences, a new compatible string `renesas,usbhs-r9a09g077` is introduced for the RZ/T2H SoC. The USBHS controller on the RZ/N2H (r9a09g087) SoC is identical to that on the RZ/T2H, so it uses the `renesas,usbhs-r9a09g077` compatible string as a fallback. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250805114730.2491238-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2025-08-13dt-bindings: arm: Convert ti,keystone to DT schemaRob Herring (Arm)
Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Andrew Davis <afd@ti.com> Link: https://lore.kernel.org/r/20250806212824.1635084-1-robh@kernel.org Signed-off-by: Nishanth Menon <nm@ti.com>
2025-08-13regulator: dt-bindings: Add Richtek RT5133 SupportJeff Chang
Add bindings for Richtek RT5133 IC Controlled PMIC Signed-off-by: Jeff Chang <jeff_chang@richtek.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250813020910.2977555-1-jeff_chang@richtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-13dt-bindings: memory: Update brcmstb-memc-ddr binding with older chipsFlorian Fainelli
The older MIPS-based chips incorporated a memory controller with the revision A.0.0, update the binding to list that compatible. Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250729205213.3392481-2-florian.fainelli@broadcom.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-08-13dt-bindings: phy: qcom,snps-eusb2-repeater: Add compatible for PMIV0104Luca Weiss
Add a dt-bindings compatible string for the Qualcomm's PMIV0104 PMIC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20250709-sm7635-eusb-repeater-v2-3-b6eff075c097@fairphone.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-13dt-bindings: phy: qcom,snps-eusb2-repeater: Document qcom,tune-res-fsdifLuca Weiss
Document the FS Differential TX Output Resistance Tuning value found on the eUSB2 repeater on Qualcomm PMICs. The tuning values have special meanings, being different offsets of the resistance to the default value in Ohms but the exact meaning is not relevant here, as the correct tuning is determined by hardware engineers to make sure the electrical properties are as expected. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250709-sm7635-eusb-repeater-v2-1-b6eff075c097@fairphone.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-13dt-bindings: phy: rockchip: naneng-combphy: Add RK3528 variantYao Zi
Rockchip RK3528 ships one naneng-combphy which operates in either PCIe or USB 3 mode. Document its compatible string. Signed-off-by: Yao Zi <ziyao@disroot.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250728102947.38984-5-ziyao@disroot.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-13dt-bindings: phy: rockchip: naneng-combphy: Add power-domains propertyYao Zi
Though isn't described in existing devicetrees, most Rockchip combphys belong to a specific power-domain of the SoC. Taking RK3588 as example, combphy 0 and combphy 2 belong to the PD_BUS domain. Document the power-domains property to allow describing the information correctly in devicetree. Signed-off-by: Yao Zi <ziyao@disroot.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250728102947.38984-4-ziyao@disroot.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-13dt-bindings: soc: rockchip: Add RK3528 pipe-phy GRF sysconYao Zi
Add compatible string for pipe-phy GRF found on RK3528 SoC, which controls misc settings for the integrated naneng-combphy. Signed-off-by: Yao Zi <ziyao@disroot.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250728102947.38984-3-ziyao@disroot.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-12dt-bindings: net: airoha: npu: Add memory regions used for wlan offloadLorenzo Bianconi
Document memory regions used by Airoha EN7581 NPU for wlan traffic offloading. The brand new added memory regions do not introduce any backward compatibility issues since they will be used just to offload traffic to/from the MT76 wireless NIC and the MT76 probing will not fail if these memory regions are not provide, it will just disable offloading via the NPU module. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://patch.msgid.link/20250811-airoha-en7581-wlan-offlaod-v7-1-58823603bb4e@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-08-12ASoC: dt-bindings: Convert brcm,bcm2835-i2s to DT schemaRob Herring (Arm)
Convert the Broadcom BCM2835 I2S/PCM binding to DT schema format. It's a straightforward conversion. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250812203356.735234-1-robh@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-12dt-bindings: nfc: ti,trf7970a: Drop 'db' suffix duplicating dtschemaKrzysztof Kozlowski
A common property unit suffix '-db' was added to dtschema, thus in-kernel bindings should not reference the type. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20250811142235.170407-2-krzysztof.kozlowski@linaro.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2025-08-12Merge branch '20250811090954.2854440-2-quic_varada@quicinc.com' into HEADBjorn Andersson
Merge the IPQ5424 application subsystem clock binding, in order to get access to the necessary clock constants for CPUfreq.
2025-08-12dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Update pcie phy bindingsZiyue Zhang
The gcc_aux_clk is required by the PCIe controller but not by the PCIe PHY. In PCIe PHY, the source of aux_clk used in low-power mode should be gcc_phy_aux_clk. Hence, remove gcc_aux_clk and replace it with gcc_phy_aux_clk. Fixes: fd2d4e4c1986 ("dt-bindings: phy: qcom,qmp: Add sa8775p QMP PCIe PHY") Signed-off-by: Ziyue Zhang <ziyue.zhang@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Johan Hovold <johan+linaro@kernel.org> Link: https://lore.kernel.org/r/20250725102231.3608298-2-ziyue.zhang@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-12dt-bindings: arm: qcom: document r0q board bindingEric Gonçalves
Adds compatible for the Samsung Galaxy S22 (SM-S901E) (r0q), based on the Snapdragon 8 Gen 1 SoC. Signed-off-by: Eric Gonçalves <ghatto404@gmail.com> Link: https://lore.kernel.org/r/20250615204438.1130213-1-ghatto404@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-12ASoC: codecs: Add support for FourSemi FS2104/5SMark Brown
Merge series from Nick Li <nick.li@foursemi.com>: The FS2104/5S are Inductor-Less, Stereo, Closed-Loop, Digital Input Class-D Power Amplifiers with Enhanced Signal Processing. FS2104 can deliver 2x15W into 4ohm BTL speaker loads, FS2105S can deliver 2x30W into 8ohm BTL speaker loads. Most functions have been built and tested on EVB boards: ARMv8-A, Linux version 6.16.0-rc6-v8
2025-08-12dt-bindings: phy: marvell,comphy-cp110: Fix clock and child node constraintsRob Herring (Arm)
In converting marvell,comphy-cp110 to schema, the constraints for clocks on marvell,comphy-a3700 are wrong, the maximum number of child nodes are wrong, and the phy nodes may have a 'connector' child node: phy@18300 (marvell,comphy-a3700): clock-names: False schema does not allow ['xtal'] phy@120000 (marvell,comphy-cp110): 'phy@3', 'phy@4', 'phy@5' do not match any of the regexes: '^phy@[0-2]$', '^pinctrl-[0-9]+$' phy@120000 (marvell,comphy-cp110): phy@2: 'connector' does not match any of the regexes: '^pinctrl-[0-9]+$' Fixes: 50355ac70d4f ("dt-bindings: phy: Convert marvell,comphy-cp110 to DT schema") Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/r/20250806200138.1366189-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-12regulator: add new PMIC PF0900 supportMark Brown
Merge series from Joy Zou <joy.zou@nxp.com>: Add binding document and driver. Signed-off-by: Joy Zou <joy.zou@nxp.com> --- Changes in v3: binding part - change regulator node names into lowercase. - add more description for nxp,i2c-crc-enable. - remove the unnecessary nxp,dvs-run/standby-voltage property. These changes come from review comments: https://lore.kernel.org/imx/e9f38e38-7df7-4d19-b5c0-2f18aeebcc78@kernel.org/ - add regulator-state-mem property for example. driver part - convert to use maple tree register cache. - change of_match_ptr() name to lowercase since dt-binding changed. - add more nxp,i2c-crc-enable description for commit message. - remove the of_parse_cb and dvs from pf0900_regulators since the unnecessary property nxp,dvs-run/standby-voltage removed. - add set_suspend_enable/disable/voltage for the SW regulator_ops. the run/standby voltage can be adjusted via the API which regulator driver provides is recommended. These changes come from binding review comments: https://lore.kernel.org/imx/e9f38e38-7df7-4d19-b5c0-2f18aeebcc78@kernel.org/ - add bitfield.h header due to build issue. - correct the sw4 id. - add PF0900 prefix for short macro define in order to avoid duplication. - merge the same mask define in order to simplify code. - Link to v2: https://lore.kernel.org/r/20250721-b4-pf09-v2-v2-0-e2c568548032@nxp.com Changes in v2: binding part - modify the binding file name to match compatible string. - add one space for dt_binding_check warning. - remove unnecessary quotes from "VAON". - remove the unnecessary empty line. - move unevaluatedProperties after the $ref. - move additionalProperties after regulator type. - remove unnecessary regulator description driver part - modify the copyright comment block to C++ style. - add reg_read/write for regmap_bus. - remove original pf0900_pmic_read/write. - remove many regulator operations. - use regmap_read replace pf0900_pmic_read. - use regmap_update_bits and regmap_write_bits replace pf0900_pmic_write. - move the code from pf0900.h to pf0900-regulator.c and delete the header file. - remove unmask status interrupts and add unmask regulator interrupts. - remove many interrupts check warning print from irq_handler. - add notifier for regulator event. - remove unused macro define. - add PF0900 prefix for IRQ macro define in order to avoid duplication. - use GENMASK() and BIT() to replace mask marco define - remove redundant enum pf0900_chip_type. - remove redundant print info and comments. - add dvs property present check because this property is optional. - remove ret == -EINVAL check from sw_set_dvs() function. - Link to v1: https://lore.kernel.org/imx/20250617102025.3455544-1-joy.zou@nxp.com/ --- Joy Zou (2): dt-bindings: regulator: add PF0900 regulator yaml regulator: pf0900: Add PMIC PF0900 support .../devicetree/bindings/regulator/nxp,pf0900.yaml | 163 ++++ drivers/regulator/Kconfig | 8 + drivers/regulator/Makefile | 1 + drivers/regulator/pf0900-regulator.c | 975 +++++++++++++++++++++ 4 files changed, 1147 insertions(+) --- base-commit: 84b92a499e7eca54ba1df6f6c6e01766025943f1 change-id: 20250714-b4-pf09-v2-91cdee6d1272 Best regards, -- Joy Zou <joy.zou@nxp.com>
2025-08-12ASoC: dt-bindings: realtek,alc5623: convert to DT schemaMahdi Khosravi
Convert alc5623 audio codec binding to DT schema. Also add "realtek,alc5621" to the compatible list for existing use in kirkwood-t5325.dts. Signed-off-by: Mahdi Khosravi <mmk1776@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://patch.msgid.link/20250811080940.7909-1-mmk1776@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-12dt-bindings: net: thead,th1520-gmac: Describe APB interface clockYao Zi
Besides ones for GMAC core and peripheral registers, the TH1520 GMAC requires one more clock for configuring APB glue registers. Describe it in the binding. Fixes: f920ce04c399 ("dt-bindings: net: Add T-HEAD dwmac support") Signed-off-by: Yao Zi <ziyao@disroot.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Drew Fustini <fustini@kernel.org> Link: https://patch.msgid.link/20250808093655.48074-3-ziyao@disroot.org Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2025-08-12dt-bindings: phy: fsl,imx8mq-usb: Drop 'db' suffix duplicating dtschemaKrzysztof Kozlowski
A common property unit suffix '-db' was added to dtschema, thus in-kernel bindings should not reference the type. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20250811-dt-bindings-db-v1-2-457301523bb5@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-08-12dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCS615 compatibleTaniya Das
Document compatible for cpufreq hardware on Qualcomm QCS615 platform. Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2025-08-11dt-bindings: clock: qcom,videocc: Add sc8180x compatibleSatya Priya Kakitapalli
The sc8180x video clock controller block is identical to that of sm8150. Add a new compatible string for sc8180x videocc and use sm8150 as fallback. Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250710-sc8180x-videocc-dt-v4-1-07a9d9d5e0e6@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-11dt-bindings: arm: qcom: add Sony Xperia SPAntony Kurniawan Soemardi
Document the Sony Xperia SP (huashan), which uses the MSM8960T SoC. The MSM8960T is a variant of the MSM8960 featuring an upgraded GPU (Adreno 320 instead of Adreno 225) and a slightly overclocked CPU (1.7GHz instead of 1.5GHz). Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250623-msm8960-sdcard-v2-4-340a5e8f7df0@smankusors.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-11dt-bindings: arm: qcom: Remove sdm845-chezaKonrad Dybcio
Cheza was a prototype board, used mainly by the ChromeOS folks. Almost no working devices are known to exist, and the small amount of remaining ones are not in use anymore. Remove the compatible strings reserved for it, as, quite frankly, Cheza is no more. Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20250716-topic-goodnight_cheza-v2-2-6fa8d3261813@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-11dt-bindings: arm: qcom-soc: Document new Milos and Glymur SoCsKrzysztof Kozlowski
Extend the schema enforcing correct SoC-block naming to cover Milos (compatibles already accepted by some maintainers for next release) and Glymur (posted on mailing lists [1]) SoCs. Link: https://lore.kernel.org/linux-devicetree/20250716152017.4070029-1-pankaj.patil@oss.qualcomm.com/ [1] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250716162412.27471-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-11dt-bindings: soc: qcom,rpmh-rsc: Remove double colon from descriptionLuca Weiss
No double colon is necessary in the description. Fix it. Reported-by: Rob Herring <robh@kernel.org> Closes: https://lore.kernel.org/lkml/20250625150458.GA1182597-robh@kernel.org/ Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250717-bindings-double-colon-v1-3-c04abc180fcd@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-11dt-bindings: arm: qcom: Drop redundant free-form SoC listKrzysztof Kozlowski
The schema and Devicetree specification defines how list of top-level compatibles should be created, thus first paragraph explaining this is completely redundant. The list of SoCs is redundant as well, because the schema lists them. On the other hand, Linux kernel should not be place to store marketing names of some company products, so such list is irrelevant here. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250724132436.77160-2-krzysztof.kozlowski@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-11dt-bindings: riscv: Add SiFive vendor extensions descriptionNick Hu
Add description for SiFive vendor extensions "xsfcflushdlone", "xsfpgflushdlone" and "xsfcease". This is used in the SBI implementation [1]. Link: https://lore.kernel.org/opensbi/20250708074940.10904-1-nick.hu@sifive.com/ [1] Signed-off-by: Nick Hu <nick.hu@sifive.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-08-11dt-bindings: arm: qcom: Add Dell Latitude 7455Val Packett
Document the X1E80100-based Dell Latitude 7455 laptop. Signed-off-by: Val Packett <val@packett.cool> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250525095341.12462-3-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-11dt-bindings: arm: qcom: add qcom,sm6150 fallback compatible to QCS615Dmitry Baryshkov
QCS615 SoC is based on the earlier mobile chip SM6150. Add corresponding compatible string to follow established practice for IoT chips. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20250604-qcs615-sm6150-v1-1-2f01fd46c365@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-11dt-bindings: sram: qcom,imem: Document IPQ5424 compatibleKathiravan Thirumoorthy
Add compatible for Qualcomm's IPQ5424 IMEM. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250502-wdt_reset_reason-v3-1-b2dc7ace38ca@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-11regulator: dt-bindings: infineon,ir38060: Add Guenter as maintainer from IBMKrzysztof Kozlowski
The infineon,ir38060 binding never got maintainer and fake "Not Me" entry have been causing dt_binding_check warnings for 1.5 years now: regulator/infineon,ir38060.yaml: maintainers:0: 'Not Me.' does not match '@' Guenter agreed to keep an eye for this hardware and binding. Cc: Guenter Roeck <linux@roeck-us.net> Cc: Conor Dooley <conor.dooley@microchip.com> Cc: Andrew Jeffery <andrew@codeconstruct.com.au> Cc: Ninad Palsule <ninad@linux.ibm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Guenter Roeck <linux@roeck-us.net> Link: https://patch.msgid.link/20250811141526.168752-2-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-11dt-bindings: clock: ipq5424-apss-clk: Add ipq5424 apss clock controllerSricharan Ramabadhran
The CPU core in ipq5424 is clocked by a huayra PLL with RCG support. The RCG and PLL have a separate register space from the GCC. Also the L3 cache has a separate pll and needs to be scaled along with the CPU. Co-developed-by: Md Sadre Alam <quic_mdalam@quicinc.com> Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> [ Added interconnect related changes ] Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com> Link: https://lore.kernel.org/r/20250811090954.2854440-2-quic_varada@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-11dt-bindings: pinctrl: renesas: Document RZ/T2H and RZ/N2H SoCsLad Prabhakar
Document the pin and GPIO controller IP for the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs, and add the shared DTSI header file used by both the bindings and the driver. The RZ/T2H SoC supports 729 pins, while RZ/N2H supports 576 pins. Both share the same controller architecture; separate compatible strings are added for each SoC to distinguish them. Co-developed-by: Thierry Bultel <thierry.bultel.yh@bp.renesas.com> Signed-off-by: Thierry Bultel <thierry.bultel.yh@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: "Rob Herring (Arm)" <robh@kernel.org> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/20250808133017.2053637-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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