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13 daysarm64: dts: qcom: sc8280xp-x13s: Enable IrisKonrad Dybcio
Enable Iris and point the driver to the correct firmware file. Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260515-iris-sc8280xp-v7-4-2e21f6db1897@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sc8280xp: Add Iris coreKonrad Dybcio
Add the required nodes to enable Iris core on SC8280XP. [ bod: added interconnect tags ] Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org> [ johan: use sm8350 videocc defines ] Signed-off-by: Johan Hovold <johan+linaro@kernel.org> [ bod: dropped video encoder/decoder declarations ] Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> [ db: dropped llcc icc, switched to sc8280xp compat, corrected OPP table ] Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260515-iris-sc8280xp-v7-3-2e21f6db1897@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sc8280xp: sort reserved memory regionsDmitry Baryshkov
Move memory region reserved for the GPU to its proper place in DT. Fixes: 6e9612ced0c9 ("arm64: dts: qcom: sc8280xp: create common zap-shader node") Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260515-iris-sc8280xp-v7-2-2e21f6db1897@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: glymur: Add EVA clock controller nodeTaniya Das
Add the device node for the EVA clock controller (evacc) for Qualcomm Glymur SoC. This clock controller provides clocks and resets to the EVA hardware block. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260617-evacc_glymur-v2-4-905108dacaaa@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: glymur: add CPU capacity-dmips-mhzPradyot Kumar Nayak
The Glymur SoC has two distinct core types within the same Oryon microarchitecture generation: - qcom,oryon-2-2 (cpu0-cpu5, cluster 0) - qcom,oryon-2-1 (cpu6-cpu11, cluster 1; cpu12-cpu17, cluster 2) Without capacity-dmips-mhz the Energy Aware Scheduler treats all 18 cores as equal, leading to suboptimal task placement and frequency selection. In particular, heavy tasks may be pinned to cluster 0 driving them to maximum frequency/voltage while cluster 1/2 sit idle. Fix this by using distinct capacity-dmips-mhz numbers. Values are derived from DPC (DMIPS-per-clock) measurements at the 825.6 MHz nominal operating point: oryon-2-2: 1024 (normalised baseline) oryon-2-1: 1372 (ratio ~1.34x vs oryon-2-2) Signed-off-by: Pradyot Kumar Nayak <pradyot.nayak@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260706-add-cpu-capacity-dmips-mhz-v1-1-85deced44b20@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: glymur-crd: add Audio sound card nodeSrinivas Kandagatla
Add the sound card of Glymur-crd board with the routing for speakers. Add device nodes for the sound support with WSA884x smart speakers and playback via speakers and recording via DMIC microphones. Co-developed-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Co-developed-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com> Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260706064224.1328576-3-srinivas.kandagatla@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: glymur: Add LPASS macro codecs and pinctrlSrinivas Kandagatla
Add LPASS macro codecs and LPASS TLMM pin controller on Qualcomm glymur for proper sound support. Also add GPR (Generic Pack router) node along with APM (Audio Process Manager) and PRM (Proxy resource Manager) audio services. Co-developed-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Signed-off-by: Mohammad Rafi Shaik <mohammad.rafi.shaik@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Sibi Sankar <sibi.sankar@oss.qualcomm.com> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260706064224.1328576-2-srinivas.kandagatla@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: glymur-crd: Add reset GPIO to touchscreen nodePradyot Kumar Nayak
The touchscreen module on Glymur/Mahua CRDs is different from the one used on Hamoa CRDs and requires the reset-gpios to be wired to the device. Without this in place the reset line will remain permanently asserted during resume leaving the device offline and causing all I2C transactions to fail with -ENXIO. Error Logs: i2c_hid_of 3-0038: failed to change power setting. i2c_hid_of 3-0038: PM: dpm_run_callback(): i2c_hid_core_pm_resume [i2c_hid] returns -6 i2c_hid_of 3-0038: PM: failed to resume async: error -6 Add the reset GPIO so the driver can deassert the line on resume, restoring I2C communication with the device. Fixes: e6bf559f7eb9 ("arm64: dts: qcom: glymur-crd: Enable keyboard, trackpad and touchscreen") Signed-off-by: Pradyot Kumar Nayak <pradyot.nayak@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260522-arm64-dts-glymur-crd-add-reset-gpio-to-touchscreen-v1-1-c7653924acdc@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: glymur: Fix gcc clock specifier for usb_mp_qmpphy nodesGopikrishna Garmidi
usb_mp_qmpphy0 and usb_mp_qmpphy1 have #clock-cells set to 0 so they take no specifier. Drop the erroneous QMP_USB43DP_USB3_PIPE_CLK argument. This fixes the following dtbs_check warning: clock-controller@100000 (qcom,glymur-gcc): clocks: [[59, 0], ..... [0]] is too long from schema $id: http://devicetree.org/schemas/clock/qcom,glymur-gcc.yaml Fixes: 4eee57dd4df9f ("arm64: dts: qcom: glymur: Add USB related nodes") Signed-off-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260602-glymur-fix-usb-mp-qmpphy-clock-specifier-v1-1-19c6f44d5655@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: glymur: Add memory-region for audio PDVinayak Katoch
Reserve memory region for audio PD dynamic loading and remote heap requirements. Add the required VMID list for memory ownership transfers. Signed-off-by: Vinayak Katoch <vinayak.katoch@oss.qualcomm.com> Reviewed-by: Ekansh Gupta <ekansh.gupta@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260701-glymur-audio-v1-1-2c3862d95a09@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: glymur-crd: Move common board nodes to shared DTSIGopikrishna Garmidi
Mahua CRD is pin-to-pin compatible with Glymur CRD, as verified against schematics; only the external peripherals connected differ. Move the common board nodes from glymur-crd.dts to glymur-crd.dtsi to enable reuse by Mahua CRD. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Pankaj Patil <pankaj.patil@oss.qualcomm.com> Signed-off-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260629-glymur-mahua-common-nodes-v3-1-98cc00943359@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: kaanapali: Add qcrypto node supportKuldeep Singh
Add qcrypto and cryptobam support for kaanapali target. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260514-knp_qce-v2-3-890e3372eef8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: glymur: Fix unit-address mismatch for spmi_bus2Gopikrishna Garmidi
The spmi_bus2 node was named spmi@c48000, but its reg property specifies the base address as 0x0c448000. Fix the node name to spmi@c448000 to match the actual register base address. Fixes: 41b6e8db400c ("arm64: dts: qcom: Introduce Glymur base dtsi") Signed-off-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260518-glymur-fix-spmi-bus2-unit-addr-v1-1-27d6edca51e8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: hamoa: Fix clocks for HSPHYsKonrad Dybcio
The tertiary controller's HSPHY has its own toggle in TCSR, while the primary one is wired directly to the XO clock. Fix that. Fixes: 4af46b7bd66f ("arm64: dts: qcom: x1e80100: Add USB nodes") Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260518-topic-hamoa_hsphy_clk-v1-1-d85203756505@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sm8750: Correct DPU VBIF address space sizeKrzysztof Kozlowski
VBIF register range is 0x3000 long, so correct the code even though missing part seems without practical impact. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260405-dts-qcom-display-regs-v2-8-34f4024c65dc@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sm8750: Correct and complete DP address spacesKrzysztof Kozlowski
DisplayPort block on Qualcomm SM8750 has few too short address space ranges and misses four more spaces. Complete the hardware description, which in the future might be important for full feature support. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260405-dts-qcom-display-regs-v2-7-34f4024c65dc@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sm8650: Correct and complete DP address spacesKrzysztof Kozlowski
DisplayPort block on Qualcomm SM8650 has few too short address space ranges and misses four more spaces. Complete the hardware description, which in the future might be important for full feature support. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260405-dts-qcom-display-regs-v2-6-34f4024c65dc@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sc8280xp: Add reg and clocks for QoS configurationXilin Wu
Add register ranges for the SC8280XP interconnect providers so the driver can program the NoC QoS registers. Move the real NoC providers under soc@0, keep clk_virt and mc_virt as virtual top-level providers, and add the clocks required for QoS programming on aggre1_noc and aggre2_noc. Signed-off-by: Xilin Wu <sophon@radxa.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260507-sc8280xp-qos-v1-3-15135858cd98@radxa.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sm6125-xiaomi-ginkgo: Add IR transmitterBiswapriyo Nath
The IR transmitting LED is connected to SPI8 controller. Reviewed-by: Sean Young <sean@mess.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Biswapriyo Nath <nathbappai@gmail.com> Link: https://lore.kernel.org/r/20260330-ginkgo-add-usb-ir-vib-v3-7-c4b778b0d7f8@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sm6125-xiaomi-ginkgo: Add PMI632 Type-C propertyBiswapriyo Nath
The USB-C port is used for powering external devices and transfer data from/to them. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Biswapriyo Nath <nathbappai@gmail.com> Link: https://lore.kernel.org/r/20260330-ginkgo-add-usb-ir-vib-v3-5-c4b778b0d7f8@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sm6125: Enable USB-C port handlingBiswapriyo Nath
Plug in USB-C related bits and pieces to enable USB role switching. Also, remove dr_mode to enable OTG capability. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Biswapriyo Nath <nathbappai@gmail.com> Link: https://lore.kernel.org/r/20260330-ginkgo-add-usb-ir-vib-v3-4-c4b778b0d7f8@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sm6125-xiaomi-ginkgo: Enable vibratorBiswapriyo Nath
Enable the vibrator on the PMI632 which is used on this phone. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Biswapriyo Nath <nathbappai@gmail.com> Link: https://lore.kernel.org/r/20260330-ginkgo-add-usb-ir-vib-v3-3-c4b778b0d7f8@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sm6125: Use 64 bit addressingBiswapriyo Nath
SM6125's SMMU uses 36bit VAs, which is a good indicator that we should increase (dma-)ranges - and by extension #address- and #size-cells to prevent things from getting lost in translation (both literally and figuratively). Do so. Fixes: 7bb7c90e0ac1 ("arm64: dts: qcom: Add Redmi Note 8T") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202603141433.MDqfoVHn-lkp@intel.com/ Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Biswapriyo Nath <nathbappai@gmail.com> Link: https://lore.kernel.org/r/20260330-ginkgo-add-usb-ir-vib-v3-1-c4b778b0d7f8@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: ipq5332: Represent xo_board as fixed-factor clockLuo Jie
The xo_board clock is derived from the 48 MHz WiFi output clock (divided by 2), and not a standalone fixed frequency source. The previous implementation incorrectly modelled it as a fixed-clock with fixed frequency, which doesn't reflect the actual hardware clock tree. Update for fixed-factor-clock compatibility, and properly reference the source clock. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Luo Jie <jie.luo@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260106-qcom_ipq5332_cmnpll-v2-5-f9f7e4efbd79@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: ipq5332: Add CMN PLL node for networking hardwareLuo Jie
Add the CMN PLL node required for networking hardware operation on IPQ5332. The CMN PLL core runs at 6 GHz on this platform, differing from others like IPQ9574. Configure the reference clock path where XO (48 MHz or 96 MHz) routes through the WiFi block's multiplier/divider to provide a stable 48 MHz reference to the CMN PLL. .XO (48 MHZ or 96 MHZ)-->WiFi (multiplier/divider)--> 48 MHZ to CMN PLL. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Luo Jie <jie.luo@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260106-qcom_ipq5332_cmnpll-v2-4-f9f7e4efbd79@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysARM: dts: qcom: pm8921: add labels for ADC channelsAntony Kurniawan Soemardi
Add label properties to all XOADC ADC channel nodes in the PM8921 PMIC device tree. This allows userspace and drivers to identify channels by name rather than relying on datasheet name. Acked-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Antony Kurniawan Soemardi <linux@smankusors.com> Link: https://lore.kernel.org/r/20260510-pm8xxx-xoadc-label-v6-2-49700fd03005@smankusors.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sc8280xp: Move PHY, PERST, and Wake GPIOs to PCIe port nodesXilin Wu
Since describing the PCIe PHY directly under the RC node is now deprecated, move the references to the respective PCIe port nodes. And also move the PCIe PERST and wake GPIOs from the controller nodes to the corresponding PCIe port nodes on sc8280xp-based platforms: - sa8295p-adp - sa8540p-ride - sc8280xp-crd - sc8280xp-huawei-gaokun3 - sc8280xp-lenovo-thinkpad-x13s - sc8280xp-microsoft-arcata - sc8280xp-microsoft-blackrock Signed-off-by: Xilin Wu <sophon@radxa.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260507-8280-move-perst-wake-v1-1-5b33cef2d807@radxa.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sm7325: Add Motorola Edge 30 (dubai) DTSVal Packett
The Motorola Edge 30 is a smartphone released in 2022. This commit has the following features working: - Display (simplefb) - Touchscreen - Power and volume buttons - Storage (UFS 3.1) - Battery (ADSP battmgr) - USB (Type-C, 2.0, dual-role) - Wi-Fi and Bluetooth (WCN6750 hw1.0) As there are 2 display panel options, prepare for full display support by creating a common dtsi and per-panel dts files, as is done for other upstreamed devices. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Val Packett <val@packett.cool> Link: https://lore.kernel.org/r/20260506212319.682749-2-val@packett.cool Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sm7225-fairphone-fp4: Fix address in fb node nameLuca Weiss
'reg' is 0xa0000000 so the node name is missing a zero. Add it, so that the reg and address in the node name matches. No functional impact. Fixes: 4cbea668767d ("arm64: dts: qcom: sm7225: Add device tree for Fairphone 4") Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260505-sm6350-misc-v1-3-0b9efc22690c@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sm6350: Add PIL info regionLuca Weiss
Define the PIL relocation info region, so that post mortem tools will be able to locate the loaded remoteprocs. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260505-sm6350-misc-v1-2-0b9efc22690c@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sm6350: Add interconnects for GPU, MPSS & CDSPLuca Weiss
Add some interconnect paths for the GPU, the MPSS (modem) and CDSP. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260505-sm6350-misc-v1-1-0b9efc22690c@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: msm8953-flipkart-rimob: Enable Hall sensorCristian Cozzolino
Enable the Hall effect sensor (flip cover) for Billion Capture+. The GPIO is mapped to SW_LID events as in other qcom devices. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> Link: https://lore.kernel.org/r/20260331-rimob-new-features-v5-6-5fcf42a29c12@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: msm8953-flipkart-rimob: Enable touchscreenCristian Cozzolino
This device uses a Goodix GT5688 touch controller, connected to i2c_3. Add it to the device tree. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260331-rimob-new-features-v5-5-5fcf42a29c12@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: msm8953-flipkart-rimob: Enable WiFi/BluetoothCristian Cozzolino
Configure and enable the WCNSS which provides WiFi and Bluetooth on this device using the WCN3660B chip. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> Link: https://lore.kernel.org/r/20260331-rimob-new-features-v5-4-5fcf42a29c12@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: msm8953-flipkart-rimob: Enable display and GPUCristian Cozzolino
Add the description for the display panel found on this phone. And with this done we can also enable the GPU and set the zap shader firmware path. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Cristian Cozzolino <cristian_ci@protonmail.com> Link: https://lore.kernel.org/r/20260331-rimob-new-features-v5-3-5fcf42a29c12@protonmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sc8280xp-blackrock: switch to uefi rtc offsetJens Glathe
On many Qualcomm platforms the PMIC RTC control and time registers are read-only so that the RTC time can not be updated. Instead an offset needs be stored in some machine-specific non-volatile memory, which a driver can take into account. On platforms where the offset is stored in a Qualcomm specific UEFI variable the variables are also accessed in a non-standard way, which means that the OS cannot assume that the variable service is available by the time the RTC driver probes. Use the new 'qcom,uefi-rtc-info' property to indicate that the offset is stored in a UEFI variable so that the OS can determine whether to wait for it to become available. [1]: https://lore.kernel.org/r/20250423075143.11157-4-johan+linaro@kernel.org Fixes: 16a7fed11714 ("arm64: dts: qcom: sc8280xp-blackrock: dt definition for WDK2023") Signed-off-by: Jens Glathe <jens.glathe@oldschoolsolutions.biz> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260501-blackrock-rtc-v1-1-bddf3e37fa94@oldschoolsolutions.biz Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: sdm850-lenovo-yoga-c630: lower PSCI cluster idleDmitry Baryshkov
With the default PSCI suspend value for cluster idle state Lenovo Yoga C630 isn't stable enough. For example it might reset if display device isn't probed early enough. Drop the bit 0x4000 from the PSCI suspend value to make C630 work in stable way. The bit was found by expertimenting with the cluster idle PSCI value. Most likely it results in the less deep sleep and more energy beign spent in the suspend state, but it's better than the non-stable system behaviour. Fixes: a1ade6cac5a2 ("arm64: dts: qcom: sdm845: Switch PSCI cpu idle states from PC to OSI") Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260429-c630-fix-idle-v2-1-ac867dad6f21@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: monaco: fix wrong connection for the replicatorJie Gan
Fix the wrong connection for the qdss replicator device. Fixes: 4f791e008807a ("arm64: dts: qcom: monaco: Add CTCU and ETR nodes") Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260428-fix-monaco-coresight-dt-v2-1-2293259bbd10@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: defconfig: Enable Sound DMIC driverRavi Hothi
Enable CONFIG_SND_SOC_DMIC as a module in the arm64 defconfig to support digital microphone functionality on Qualcomm's Monaco and Lemans platforms. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Ravi Hothi <ravi.hothi@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260427094131.607583-1-ravi.hothi@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: talos: Add EL2 overlay for talos-evkXin Liu
Add support for building an EL2 combined DTB for the talos-evk in the Qualcomm DTS Makefile. The new talos-evk-el2.dtb is generated by combining the base talos-evk.dtb with the talos-el2.dtbo overlay, enabling EL2-specific configurations required by the platform. Signed-off-by: Xin Liu <xin.liu@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260427082325.1895450-1-xin.liu@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: milos-fairphone-fp6: Enable IPALuca Weiss
Configure and enable the node for IPA which enables mobile data on this device. Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260410-milos-ipa-v2-2-c699b6b8cf27@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysarm64: dts: qcom: milos: Add IPA nodeLuca Weiss
Add the description of the IPA block in the Milos SoC. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20260410-milos-ipa-v2-1-c699b6b8cf27@fairphone.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
13 daysriscv: Prevent NULL pointer dereference in machine_kexec_prepare()Tao Liu
A NULL pointer dereference issue is noticed in riscv's machine_kexec_prepare(), where image->segment[i].buf might be NULL and copied unchecked. The NULL buf comes from ima_add_kexec_buffer(), where kbuf is added by kexec_add_buffer(), but kbuf.buffer is NULL, then it is copied without a check in machine_kexec_prepare(): kexec_file_load -> kimage_file_alloc_init() -> kimage_file_prepare_segments() -> ima_add_kexec_buffer() -> kexec_add_buffer() -> machine_kexec_prepare() -> memcpy() Address this by adding a check before the data copy attempt. Fixes: b7fb4d78a6ad ("RISC-V: use memcpy for kexec_file mode") Cc: stable@vger.kernel.org Closes: https://lore.kernel.org/kexec/CAO7dBbVftLUhd2qrh7hmijTB3PEPfZAhykCGqEfrPoOcSrrj-w@mail.gmail.com/ Acked-by: Baoquan He <bhe@redhat.com> Acked-by: Pratyush Yadav <pratyush@kernel.org> Reviewed-by: Nutty Liu <nutty.liu@hotmail.com> Signed-off-by: Tao Liu <ltao@redhat.com> Link: https://patch.msgid.link/20260705232706.30265-2-ltao@redhat.com Signed-off-by: Paul Walmsley <pjw@kernel.org>
13 daysMerge branch 'omap-for-v7.3/soc' into tmp/omap-next-20260706.114259Kevin Hilman (TI)
13 daysMerge branch 'omap-for-v7.3/dt' into tmp/omap-next-20260706.114259Kevin Hilman (TI)
13 daysarm: omap2plus_defconfig: Enable multi-LEDAndreas Kemnade
Enable drivers needed to use RGB LEDs composed of multiple monochromatic LEDs. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Link: https://patch.msgid.link/20260702-b200multiled-v1-2-c1799ad45c96@kemnade.info Signed-off-by: Kevin Hilman (TI) <khilman@baylibre.com>
13 daysARM: dts: ti/omap: embt2ws: use mulit-led for RGB LEDAndreas Kemnade
The device has one single RGB LED. Explicitly declare it as such by combing the LEDs into one. Suggested-by: Pavel Machek <pavel@ucw.cz> Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Link: https://patch.msgid.link/20260702-b200multiled-v1-1-c1799ad45c96@kemnade.info Signed-off-by: Kevin Hilman (TI) <khilman@baylibre.com>
13 daysARM: dts: ti: omap: Correct indentationKrzysztof Kozlowski
Correct spaces or mix of tabs+spaces into proper tab-indented lines. No functional impact (same DTB). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260706101815.341184-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Kevin Hilman (TI) <khilman@baylibre.com>
13 daysPCI/sysfs: Fix out-of-bounds read in pci_write_legacy_io()Krzysztof Wilczyński
pci_write_legacy_io() loads 4 bytes from the kernfs write buffer regardless of how many bytes userspace wrote: if (count != 1 && count != 2 && count != 4) return -EINVAL; return pci_legacy_write(bus, off, *(u32 *)buf, count); kernfs_fop_write_iter() allocates the buffer with kmalloc(len + 1), so a 1-byte write to the legacy_io sysfs file allocates 2 bytes and the unconditional u32 load reads up to 2 bytes past the end of the allocation, which KASAN reports as a slab-out-of-bounds read. Similarly, a 2-byte write overreads by 1 byte. Thus, read only the number of bytes requested using get_unaligned_le16() and get_unaligned_le32() for the 2 and 4 byte cases, interpreting the buffer as little-endian to match the byte ordering of PCI I/O port space. The PowerPC implementation previously compensated for the generic code's native-endian 32-bit load by shifting the value into place for the 1 and 2 byte cases. The shifts were only correct on big-endian kernels. On little-endian PowerPC (POWER8 and later), they extracted the wrong bytes, so a 1-byte write wrote an out-of-bounds byte instead of the requested value. On big-endian, the native load also caused out_le16() and out_le32() to reverse the user's bytes on the wire for 2 and 4 byte writes. The little-endian helpers resolve both issues, so the shifts are removed. No changes are needed for the Alpha platform. The legacy_io file is root-only and exists only on Alpha and PowerPC, the two architectures that define HAVE_PCI_LEGACY. Cc: stable@vger.kernel.org Link: https://patch.msgid.link/20260616163131.2763281-1-kwilczynski@kernel.org Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
13 daysMerge branches 'sunxi/clk-for-7.3', 'sunxi/config-for-7.3' and ↵Chen-Yu Tsai
'sunxi/dt-for-7.3' into sunxi/for-next
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