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2026-07-08drm/amdgpu/gmc6: replace BUG() with an errorAlex Deucher
There's no need to crash the kernel for this case. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/si: drop BUG()sAlex Deucher
There's no need to crash the kernel for these cases. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/sdma3.0: replace BUG() with an errorAlex Deucher
There's no need to crash the kernel for this case. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/sdma2.4: replace BUG() with an errorAlex Deucher
There's no need to crash the kernel for this case. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/cik_sdma: replace BUG() with an errorAlex Deucher
There's no need to crash the kernel for this case. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/ucode: WARN() rather than BUG()Alex Deucher
There's no need to crash the kernel for this case. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/cgs: WARN() rather than BUG()Alex Deucher
There's no need to crash the kernel for these cases. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/atomfirmware: WARN() rather than BUG()Alex Deucher
There's no need to crash the kernel for this case. Just return an error. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/gfx12.1: WARN() rather than BUG() for invalid SDMA engineAlex Deucher
There's no need to crash the kernel for these cases. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/gfx12: WARN() rather than BUG() for invalid SDMA engineAlex Deucher
There's no need to crash the kernel for these cases. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/gfx11: WARN() rather than BUG() for invalid SDMA engineAlex Deucher
There's no need to crash the kernel for these cases. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: return an error instead of BUG() for CSA bo_vaAlex Deucher
If the bo_va is not present, return an error rather than crashing the kernel. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/gfx11: enable gfx pipe1 hardware supportAlex Deucher
Enable gfx pipe1 hardware support. This is only available on gfx11 chips using the F32 microcontroller. Chips using the RS64 microcontroller are not able to use the second gfx pipe. In practice this means the second pipe is only available on APUs. This explains the stability issues Pierre-Eric saw previously with this on Navi33. Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/gfx12: Program DB_RING_CONTROLAlex Deucher
This is needed to allocate occlusion counters across both gfx pipes. GFX 12 only has one gfx pipe, so no functional change since the default value is 1. Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/gfx11: Program DB_RING_CONTROLAlex Deucher
This is needed to allocate occlusion counters across both gfx pipes. No functional change since we only use one gfx pipe at the moment (default value is 1). Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/gfx10: Program DB_RING_CONTROLAlex Deucher
This is needed to allocate occlusion counters across both gfx pipes. Fixes: b7a1a0ef12b8 ("drm/amd/amdgpu: add pipe1 hardware support") Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdkfd: Check bounds in allocate_event_notification_slotDavid Francis
The valid event ids go from 0 to KFD_SIGNAL_EVENT_LIMIT allocate_event_notification_slot has an option to specify an event id to allocate at, used by CRIU. We weren't checking the bounds on that value. Check them. v2: Lower bounds check is unecessary because of idr_alloc already rejecting negative numbers. Upper bounds check should be KFD_SIGNAL_EVENT_LIMIT since the signal mode mappings might not yet exist Signed-off-by: David Francis <David.Francis@amd.com> Reviewed-by: David Yat Sin <david.yatsin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08amdkfd: properly free secondary context idZhu Lingshan
Function kfd_process_free_id() should skip over the primary kfd process because its context id is fixed assigned, not allocated through the ida table. This function should only work on secondary contexts. Fixes: fac682a1d1af ("amdkfd: identify a secondary kfd process by its id") Signed-off-by: Zhu Lingshan <lingshan.zhu@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdkfd: Don't acquire buffers during CRIU queue restore.David Francis
kfd_criu_restore_queue's call of kfd_queue_acquire_buffers was failing for multiple reasons - The ctl_stack_size set by the CRIU plugin doesn't match what is expected by acquire_buffers - The svm buffer cannot be acquired at this point because CRIU may not have restored it, or may have restored it to a different address. The only reason acquire_buffers was necessary here was to avoid a null ptr dereference in init_user_queue. Just put in a check for that dereference; it doesn't appear to come up in real use cases right now. That is, there is no usage of CRIU with shared MES. This is a partial revert of commit 20a5e7ffdfec ("drm/amdkfd: Properly acquire queue buffers in CRIU restore") Fixes: 20a5e7ffdfec ("drm/amdkfd: Properly acquire queue buffers in CRIU restore") Reviewed-by: David Yat Sin <david.yatsin@amd.com> Signed-off-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdkfd: Check bounds on CRIU restore queue type and mqd sizeDavid Francis
We weren't checking whether the values provided in the private data in kfd CRIU restore were within bounds. For queue type, add a KFD_QUEUE_TYPE_MAX and ensure the provided type is less than it. For mqd_size, add new function mqd_size_from_queue_type and confirm that the provided mqd_size matches expectations. Reviewed-by: David Yat Sin <david.yatsin@amd.com> Signed-off-by: David Francis <David.Francis@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: fix lifetime issue of amdgpu_vm_get_task_info_pasid()Shahyan Soltani
The vm pointer returned from amdgpu_vm_get_vm_from_pasid() is only valid while the lock is still being held. Once xa_unlock_irqrestore is called and returned, the pointer is no longer under lock and is subject to modification. Since, the caller still dereferences vm->task_info in amdgpu_vm_get_task_info_vm() after the lock is removed, this causes a use after unlock problem. Remove the lifetime issue present in amdgpu_vm_get_task_info_pasid() through removing the amdgpu_vm_get_vm_from_pasid() function from amdgpu_vm.c and making the relevant code inline to hold the lock while it is still in use. Signed-off-by: Shahyan Soltani <shahyan.soltani@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: include amdgpu_video_codecs.h only where neededShahyan Soltani
Remove #include "amdgpu_video_codecs.h" from amdgpu.h and add forward declaration of struct amdgpu_video_codecs. Add #include "amdgpu_video_codecs.h" into files amdgpu_kms.c, amdgpu_virt.c, cik.c, nv.c, si.c, soc15.c, soc21.c, soc24.c, soc_v1_0.c, and vi.c. Signed-off-by: Shahyan Soltani <shahyan.soltani@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: move amdgpu_allowed_register_entry into amdgpu_reg_access.hShahyan Soltani
Move struct amdgpu_allowed_register_entry from monolithic amdgpu.h file into existing amdgpu_reg_access.h file. This is part of the ongoing effort to reduce the size of amdgpu.h into their own respective separate headers. Signed-off-by: Shahyan Soltani <shahyan.soltani@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: move amdgpu_acpi helpers into new headerShahyan Soltani
Move struct amdgpu_uma_carveout_option, struct amdgpu_uma_carveout_info, struct amdgpu_numa_info, and relevant acpi helpers from the monolithic amdgpu.h header file into a new amdgpu_acpi.h file. This is part of the ongoing effort to reduce the size of amdgpu.h into their own respective separate headers. Signed-off-by: Shahyan Soltani <shahyan.soltani@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amd/display: Fix sign mismatch warningGeorge Zhang
Using mismatched signedness (int and uint32_t) causes a -Wsign-compare warning. Fix it by changing the min macro to min_t to explicitly cast. Fixes: 8cbe3648aa86 ("drm/amd/display: clamp DMUB AUX reply length to payload buffer") Signed-off-by: George Zhang <george.zhang@amd.com> Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: move struct amdgpu_mqd and helpers into header fileShahyan Soltani
Move struct amdgpu_mqd_prop, struct amdgpu_mqd, and helpers from the monolithic amdgpu.h into existing amdgpu_mes.h file. This is part of the ongoing effort to reduce the size of amdgpu.h into their own respective separate headers. Signed-off-by: Shahyan Soltani <shahyan.soltani@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: move struct amdgpu_video_codecs and helpers into header fileShahyan Soltani
Move struct amdgpu_video_codec_info, struct amdgpu_video_codecs, and helpers into a new amdgpu_video_codecs.h file. This is part of the ongoing effort to reduce the size of amdgpu.h into their own respective separate headers. Signed-off-by: Shahyan Soltani <shahyan.soltani@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: move struct amdgpu_wb and helpers into separate filesShahyan Soltani
Move struct amdgpu_wb and helpers out of the monolithic header amdgpu.h into its own dedicated header amdgpu_wb.h. Add amdgpu_wb_init() and amdgpu_wb_fini() into amdgpu_wb.h. Move functions amdgpu_device_wb_get(), amdgpu_device_wb_free(), amdgpu_device_wb_init(), and amdgpu_device_wb_fini() out of amdgpu_device.c into new dedicated amdgpu_wb.c file. Removed static from functions amdgpu_device_wb_init() and amdgpu_device_wb_fini(). Rename functions amdgpu_device_wb_get(), amdgpu_device_wb_free(), amdgpu_device_wb_init(), and amdgpu_device_wb_fini() into amdgpu_wb_get(), amdgpu_wb_free(), amdgpu_wb_init(), and amdgpu_wb_fini(). Update amdgpu/Makefile to build amdgpu_wb.o. This is part of the ongoing effort to reduce the size of amdgpu.h into their own respective separate headers. Signed-off-by: Shahyan Soltani <shahyan.soltani@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/mes12: Remove MES self testSrinivasan Shanmugam
The MES self test is no longer needed. Other MES versions already dropped their self tests since IGT now covers this functionality. Remove the MES v12 self test as well. Cc: Alex Deucher <alexander.deucher@amd.com> Suggested-by: Christian König <christian.koenig@amd.com> Signed-off-by: Srinivasan Shanmugam <srinivasan.shanmugam@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: trigger GPU recovery when userq destroy fails to unmap a hung queueJesse Zhang
Destroying a hung user queue issues a MES REMOVE_QUEUE that times out, The destroy path only logged the error and freed the queue, so the next userq submission failed and forced a GPU reset attributed to an innocent workload. Kick the userq reset work when unmap fails so the GPU is recovered at destroy time. Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amd/amdgpu: disable ASPM on VI if pcie dpm is disabledKenneth Feng
Disable ASPM on VI if PCIE dpm is disabled. Closes: https://gitlab.freedesktop.org/drm/amd/-/work_items/5370 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: retire legacy deferred error separate loggingCe Sun
Remove the legacy logic that logs deferred errors separately Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Ce Sun <cesun102@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: retire legacy get_retire_flip_bits interface for UMCCe Sun
Remove the legacy general get_retire_flip_bits interface for UMC Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Ce Sun <cesun102@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: retire legacy get_retire_flip_bits for UMCCe Sun
Remove the legacy get_retire_flip_bits implementation for UMC v12 Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Ce Sun <cesun102@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: retire legacy mca umc status check interfaceCe Sun
Remove the legacy interface to check mca umc status Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Ce Sun <cesun102@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amd/pm: retire legacy ras_smu_drv interface for smu v13.0.12Ce Sun
Remove the legacy ras_smu_drv interface implementation for SMU v13.0.12 Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Ce Sun <cesun102@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/mes: Fix hung_queue_db_array loop limit for multi-XCCGeoffrey McRae
The loop iterated only AMDGPU_MAX_MES_PIPES times, leaving entries uninitialized for multi-XCC GPUs. This causes null pointer dereferences when accessing arrays indexed by XCC ID >= 2. Extend the loop to cover all XCCs (AMDGPU_MAX_MES_PIPES * num_xcc), matching other per-XCC arrays. Fixes: a132fc9bc2f8 ("drm/amdgpu: Fixup boost mes detect hang array size") Signed-off-by: Geoffrey McRae <geoffrey.mcrae@amd.com> Reviewed-by: Amber Lin <amber.lin@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdkfd: use iosys_map for CWSR buffer accessJames Zhu
After moving TBA/TMA from GTT to VRAM for GFX9.4.2+ in commit 5088a1ba6d6d ("drm/amdkfd: move TBA/TMA from system to device memory"), direct pointer dereferences to CWSR buffers became unsafe because VRAM is accessed via MMIO (PCI BAR mappings). Direct writes like 'tma[2] = enabled' and memcpy() can fail or produce incorrect results on non-x86 architectures because: - MMIO requires specific accessor functions (writeq/readq) - Compiler optimizations may generate invalid instruction sequences - No guarantee of proper memory barriers or atomic access This patch converts CWSR buffer access to use struct iosys_map, which automatically handles both system memory (GTT) and MMIO (VRAM) correctly by: - Using writeq/writel/memcpy_toio for MMIO regions - Using WRITE_ONCE/memcpy for system memory - Providing proper memory barriers and access guarantees Changes: - Replace void *cwsr_kaddr with struct iosys_map cwsr_map - Detect MMIO vs system memory using TTM_BO_MAP_IOMEM_MASK - Use iosys_map_wr() for writing trap handler addresses and flags - Use iosys_map_memcpy_to() for copying CWSR ISA code This ensures correct operation on all architectures while maintaining backward compatibility with older GPUs and APUs that use GTT. Assisted-by: Claude:Claude-Opus-4.6 Signed-off-by: James Zhu <James.Zhu@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Felix Kuehling <felix.kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/mes: Add NULL check for mes_hung_db_array allocationGeoffrey McRae
kcalloc but does not check for failure. If the allocation fails, the pointer remains NULL but the function returns success. Subsequent code using this buffer will dereference a NULL pointer, causing a kernel oops. Add a check to return -ENOMEM if the allocation fails. Signed-off-by: Geoffrey McRae <geoffrey.mcrae@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Cc: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/jpeg: deduplicate jpeg_v5_3_0 process_interruptTiago Dourado
The jpeg_v5_3_0_process_interrupt function is identical to jpeg_v5_0_0_process_interrupt. Remove the duplicate implementation in jpeg_v5_3_0 and assign the jpeg_v5_0_0 version directly to the irq_funcs struct. Export jpeg_v5_0_0_process_interrupt through jpeg_v5_0_0.h to allow cross-version reuse. Signed-off-by: Tiago Dourado <tiagodourado@usp.br> Co-developed-by: Luiz Fernandes <luiz.f.f.fernandes@usp.br> Signed-off-by: Luiz Fernandes <luiz.f.f.fernandes@usp.br> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu/jpeg: deduplicate jpeg_v3_0 process_interruptTiago Dourado
The jpeg_v3_0_process_interrupt function is identical to jpeg_v2_0_process_interrupt. Remove the duplicate implementation in jpeg_v3_0 and assign the jpeg_v2_0 version directly to the irq_funcs struct. Export jpeg_v2_0_process_interrupt through jpeg_v2_0.h to allow cross-version reuse. Signed-off-by: Tiago Dourado <tiagodourado@usp.br> Co-developed-by: Luiz Fernandes <luiz.f.f.fernandes@usp.br> Signed-off-by: Luiz Fernandes <luiz.f.f.fernandes@usp.br> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amd/pm: retire legacy smu ras driver frameworkCe Sun
Remove the legacy smu ras driver framework Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Ce Sun <cesun102@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: retire legacy pmfw eeprom support checkCe Sun
Remove the legacy function to check pmfw eeprom support Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Ce Sun <cesun102@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: Disable JDPG on VCN5_3Suresh Guttula
JDPG does not support on VCN5 This patch will disable JDPG, because DPG is not correctly copying the JRBC Read/Write Pointers (R/WPTR) from the PG (Power Gating) block to JRBC. Signed-off-by: Suresh Guttula <suresh.guttula@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: add support for SMU version 15.0.9Kanala Ramalingeswara Reddy
Initialize SMU Version 15_0_9 Signed-off-by: Kanala Ramalingeswara Reddy <Kanala.RamalingeswaraReddy@amd.com> Signed-off-by: Granthali Vinodkumar Dhandar <granthali.vinodkumardhandar@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: add support for PSP version 15.0.9Kanala Ramalingeswara Reddy
Initialize PSP Version 15_0_9 Signed-off-by: Kanala Ramalingeswara Reddy <Kanala.RamalingeswaraReddy@amd.com> Signed-off-by: Granthali Vinodkumar Dhandar <granthali.vinodkumardhandar@amd.com> Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdgpu: retire legacy pmfw eeprom interface wrapperCe Sun
retire legacy pmfw eeprom interface wrapper functions Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Ce Sun <cesun102@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08drm/amdkfd: drop duplicate kfd_queue_acquire_buffers()Alex Deucher
Duplicated code from the merge. Drop it. Fixes: 0461ba9a7994 ("Merge tag 'amd-drm-next-7.3-2026-07-02' of https://gitlab.freedesktop.org/agd5f/linux into drm-next") Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-08remoteproc: scp: Fix device reference leak on failed lookupJohan Hovold
Make sure to drop the reference taken to the SCP device when attempting to look up its driver data before the driver has been bound. Note that holding a reference to a device does not prevent its driver data from going away. Fixes: 63c13d61eafe ("remoteproc/mediatek: add SCP support for mt8183") Cc: stable@vger.kernel.org # 5.6 Cc: Erin Lo <erin.lo@mediatek.com> Signed-off-by: Johan Hovold <johan@kernel.org> Link: https://lore.kernel.org/r/20260706065614.389412-1-johan@kernel.org Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2026-07-08remoteproc: ti_k3_r5: Drop redundant NULL check on reset control getKrzysztof Kozlowski
devm_reset_control_get_exclusive() does not return NULL (only valid clock or ERR pointer in case for non-optional get), so simplify the code to drop redundant IS_ERR_OR_NULL(). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Link: https://lore.kernel.org/r/20260705172353.119031-2-krzysztof.kozlowski@oss.qualcomm.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>