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2026-07-01drm/amdgpu/gfx9.4.3: replace BUG_ON() with WARN_ON()Alex Deucher
There's no need to crash the kernel for these cases. Reviewed-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu/gfx9: replace BUG_ON() with WARN_ON()Alex Deucher
There's no need to crash the kernel for these cases. Reviewed-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: do not release the root bo after vm validateSunil Khatri
Make sure to not release the vm root bo after vm validation and to make that happen we moved the restore function within amdgpu_userq_vm_validate function. Also update the function name to reflect the intent. Suggested-by: Christian König <christian.koenig@amd.com> Signed-off-by: Zhu Lingshan <lingshan.zhu@amd.com> Signed-off-by: Sunil Khatri <sunil.khatri@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: move suballoc defines into own headerChristian König
Just some code cleanup, while at it remove outdated comment. No functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Felix Kuehling <felix.kuehling@amd.com> Reviewed-by: Timur Kristóf <timur.kristof@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu/gfx8: drop unecessary BUG_ON()Alex Deucher
There's no need to crash the kernel for this case. Reviewed-by: Vitaly Prosyak <vitaly.prosyak@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Delete check_soft_reset() from amd_ip_funcsTimur Kristóf
This function is not called from anywhere anymore and every implementation was bogus. Some implementations checked busy flags of the IP blocks, which are not really indicative of whether the block is hung and needs to be reset. For example the blocks could be busy just normally executing submissions, and not need to be reset. Other implementations checked IB tests, which is actually more useful, but could still just indicate that an IP block is executing submissions normally. It is also unnecessary because the GPU recovery code path already knows which ring is hung so we know exactly what we need to reset. Just delete check_soft_reset() entirely. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Delete soft reset code from legacy display driverTimur Kristóf
This was basically dead code, not used or called from anywhere. Now that DC is the default display driver for all ASICs, it is unlikely that anyone wants to develop this further. Display hang related work should be focused on DC. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Delete GMC 8 soft resetTimur Kristóf
We should only reset the memory controller during ASIC reset and only when it's absolutely necessary. Otherwise, resetting the memory controller typically just breaks everything and on dGPUs may also clear the contents of VRAM (it's unclear if it really does, but it's likely). Specifically for GMC 8, the memory controller is reset as part of the ASIC reset and otherwise should be left alone. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Acked-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Clean up defunct soft reset from ASIC reset code pathTimur Kristóf
Soft reset means resetting IP blocks individually using a hardware interconnect (SRBM or GRBM) without assistance from firmware. Soft reset is a useful tool for implementing GPU recovery, eg. it is already successfully used for SDMA queue resets. It should be used by a GPU recovery method instead of being called directly from the ASIC reset code path. Currently, this is only used on Carrizo and Stoney, but doesn't work well and fails on those chips. A subsequent commit will add a working GFX8 recovery implementation after the cleanups. Note that this commit only cleans up the ASIC reset path, which also unblocks more opportunities for cleanup for the various IP blocks. Those will be done in subsequent commits. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Clarify name of soft recovery to avoid confusionTimur Kristóf
Soft recovery is not the same as soft reset: * Soft recovery attempts to resolve a GPU hang by sending a command to terminate shaders. * Soft reset completely re-initializes an entire device IP block, which may affect multiple rings and jobs at the same time. Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Timur Kristóf <timur.kristof@gmail.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: bounds check xcp_id in release_schedLijo Lazar
Avoid out-of-bounds xcp[] access, e.g. when xcp_id is AMDGPU_XCP_NO_PARTITION. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu/gmc9: make all vmids available to KFD if KQs are disabledAlex Deucher
If the user has disabled kernel queues, then make all vmids available to HWS. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amd/pm: validate vega10 profile mode inputsLijo Lazar
Check for out of range profile modes and custom params that exceed 8 bits. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: bounds check xcp ip block indexLijo Lazar
Check out of range values for ip block. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01pkey: Move keytype check from pkey api to handlerHolger Dengler
The PKEY_VERIFYPROTK ioctl takes data from user-space and verifies the contained protected key. While checking the integrity of the ioctl request structure is the responsibility of the generic pkey_api code, the verification of the contained protected key is the responsibility of the pkey handler. The keytype verification (based on the calculated bitsize of the key) is part of the protected key verification and therefore the responsibility of the pkey handler (which already verifies it). Therefore the keytype verification is removed from the generic pkey_api code. As the calculation of the key bitsize is currently wrong, the removal of the keytype check in pkey_api also removes this wrong calculation. For this reason, the commit is flagged with the Fixes: tag. Cc: stable@kernel.org # 6.12+ Fixes: 8fcc231ce3be ("s390/pkey: Introduce pkey base with handler registry and handler modules") Reviewed-by: Ingo Franzki <ifranzki@linux.ibm.com> Reviewed-by: Harald Freudenberger <freude@linux.ibm.com> Signed-off-by: Holger Dengler <dengler@linux.ibm.com> Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2026-07-01drm/amdgpu/soc24: reset dGPU if suspend got abortedJakob Linke
For SOC24 ASICs (RDNA4 / Navi 4x dGPUs) re-enabling PM features fails if an S3 suspend got aborted, the same issue already handled for SOC21 and SOC15: commit df3c7dc5c58b ("drm/amdgpu: Reset dGPU if suspend got aborted") commit 38e8ca3e4b6d ("amdgpu/soc15: enable asic reset for dGPU in case of suspend abort") The aborted resume fails with: amdgpu: SMU: No response msg_reg: 6 resp_reg: 0 amdgpu: Failed to enable requested dpm features! amdgpu: resume of IP block <smu> failed -62 Apply the same workaround for soc24: detect the aborted-suspend state at resume via the sign-of-life register and reset the device before re-init. This is a workaround till a proper solution is finalized. Fixes: 98b912c50e44 ("drm/amdgpu: Add soc24 common ip block (v2)") Signed-off-by: Jakob Linke <jakob@linke.cx> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Validate ATPX buffer length before useLijo Lazar
Add amdgpu_atpx_buffer_validate() to check that the returned ACPI buffer is of type ACPI_TYPE_BUFFER, is large enough to hold the u16 size field, and that the BIOS-reported size does not exceed the actual allocation length or fall below the minimum required by the caller. Use it in VERIFY_INTERFACE and GET_PX_PARAMETERS callers. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Assisted-by: Claude Sonnet (Cursor AI) Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Validate ATIF buffer length before useLijo Lazar
Add a min_size parameter to amdgpu_atif_call() to validate that the returned ACPI buffer is of type ACPI_TYPE_BUFFER, holds at least a u16 size field, does not claim more data than was actually returned, and meets the minimum size required by the calling function. Each caller passes its required minimum via sizeof() or offsetof() of the expected output struct and drops its own size check. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Assisted-by: Claude Sonnet (Cursor AI) Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amd/pm: Use helper to get pptable in SMUv15Lijo Lazar
Use common helper function to get pptable from firmware binary in SMUv15. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Assisted-by: Claude Sonnet (Cursor AI) Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amd/pm: Use helper to get pptable in SMUv14Lijo Lazar
Use common helper function to get pptable from firmware binary in SMUv14. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Assisted-by: Claude Sonnet (Cursor AI) Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amd/pm: Use helper to get pptable in SMUv13Lijo Lazar
Use common helper function to get pptable from firmware binary in SMUv13. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Assisted-by: Claude Sonnet (Cursor AI) Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amd/pm: Use helper to get pptable in SMUv11Lijo Lazar
Use common helper function to get pptable from firmware binary in SMUv11. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Assisted-by: Claude Sonnet (Cursor AI) Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amd/pm: Add helper functions to fetch pptableLijo Lazar
PPTables could be embedded in firmware binaries with v2.0 or v2.1 format. Add a common helper to get pptable from firmware binaries. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Assisted-by: Claude Sonnet (Cursor AI) Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: guard zero divisors in soc_v1_0 partition codeAsad Kamal
Abort driver load when num_mem_partitions is zero since operation is unreliable without valid memory partition info. Skip absent resources in soc_v1_0_get_xcp_res_info() to avoid divide-by-zero on firmware- reported zero instance counts. v2: Remove redundant checks (Lijo) v3: Return error instead when num_mem_partitions is zero (Lijo) Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: validate XCP topology counts before divisionAsad Kamal
In aqua_vanjaram_get_xcp_res_info(), max_res[i] can be zero. When res_lt_xcp is true the code divides num_xcp by max_res[i], causing a divide fault. Skip the loop body for absent resources. v2: Remove redundant checks (Lijo) Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amd/pm: Add helper for parameter parsingLijo Lazar
Add a helper function to extract long values passed in a string. The string may have values of multiple parameters separated by space char. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Fix mes remove_hw_queue lockAmber Lin
down_read/up_read adev->reset_domain semaphore should be placed around remove queue. v2: remove the empty function, recover_bad_queue_mes to avoid compile error on rhel Fixes: f401a2633e02 ("drm/amdgpu: Remove faulty queue before resume") Signed-off-by: Amber Lin <Amber.Lin@amd.com> Reviewed-by: Jesse Zhang <jesse.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Add checks to vbios fetch through ATRMLijo Lazar
Check if a valid buffer object is returned after ATRM call. Also, match the buffer length against requested size before copying. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Fix kobject cleanup in xcp sysfsLijo Lazar
Fix the indexing issue. Release the kobject whose init/add failed, and unwind the successfully added ones. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Remove output parameter in bo list handlingTvrtko Ursulin
Removing the output parameter from a few functions should result in more readable code and also enables us to save some lines. v2: fix build (Alex) Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Replace idr with xarray in amdgpu_bo_listTvrtko Ursulin
IDR is deprecated so let's replace it with xarray. Conversion is mostly 1:1 apart from AMDGPU_BO_LIST_OP_UPDATE which was implemented with idr_replace, and has now been replaced with a sequence of xa_load and xa_cmpxchg. Should userspace attempt multi-threaded update operations on the same handle it could theoretically hit a new -ENOENT path. But I believe this is purely theoretical and still safe. Also, since we have removed the RCU protection around the handle lookup we also removed the RCU freeing of the list. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Remove the bo list mutexTvrtko Ursulin
The bo list is immutable during command submission since the drm_exec conversion so we can remove the mutex. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: Drop support for variable struct drm_amdgpu_bo_list_entry sizeTvrtko Ursulin
Userspace always uses struct drm_amdgpu_bo_list_in->bo_info_size equal to sizeof(struct drm_amdgpu_bo_list_entry) and there are no plans to extend it. Even if the structure is extended at some point, older kernels will note that they do not support the additional fields by rejecting the new structure size. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Suggested-by: Christian König <christian.koenig@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu/gfx9.4.3: add support for disabling kernel queuesAlex Deucher
Allow the user to disable kernel queues. This can be used to free up vmid and HQD resources if kernel queues are not needed. Set amdgpu.user_queue=2 to disable kernel queues. Reviewed-by: Kent Russell <kent.russell@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01drm/amdgpu: dump RAS EEPROM table via debugfsXiang Liu
When the RAS core manages the EEPROM, the eeprom_control is never initialized (amdgpu_ras_init_badpage_info() returns early), so reading ras/ras_eeprom_table in debugfs printed only a zeroed header and no records, even though bad-page records exist in the RAS core EEPROM. Source the table header and records from the RAS core EEPROM (ras_core->ras_eeprom) in that case, reusing the existing output layout so the debugfs node keeps the same format. Skip the dump when the firmware manages the EEPROM, since the records are not stored in the I2C-backed table then. Signed-off-by: Xiang Liu <xiang.liu@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2026-07-01dma-buf: rename dma_fence_enable_sw_signalingChristian König
Dropping the _sw_ part from the names was proposed multiple times now and IIRC people generally agreed with the idea already. The function requests a fence to signal and triggers some sort of HW interaction on most backends. So this is not really software related at all and the callback is already just named enable_signaling as well. Just streamline that and use a consistent name everywhere. Assisted-by: Claude Sonet 4 Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com> Link: https://lore.kernel.org/r/20260624122917.2483-2-christian.koenig@amd.com
2026-07-01remoteproc: guard wc-ioremap helpers with HAS_IOMEMBen Levinsky
The common wc-ioremap carveout callbacks live in remoteproc_internal.h, which is included by the remoteproc core. This means the helper bodies are parsed even for builds that do not enable any platform driver using those callbacks. On s390, CONFIG_HAS_IOMEM and CONFIG_GENERIC_IOREMAP depend on CONFIG_PCI. A randconfig with CONFIG_REMOTEPROC=y and CONFIG_PCI=n therefore has no usable ioremap_wc() or iounmap() declarations, and fails to build the common remoteproc objects with implicit declarations from the helper bodies. Only include linux/io.h and build the real wc-ioremap helpers when CONFIG_HAS_IOMEM is enabled. Provide no-IOMEM stubs so the internal header remains self-contained for randconfig and COMPILE_TEST coverage. Fixes: 50227acbf4e5 ("remoteproc: Add common wc-ioremap carveout callbacks") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202606301559.w8eorNQ2-lkp@intel.com/ Signed-off-by: Ben Levinsky <ben.levinsky@amd.com> Link: https://lore.kernel.org/r/20260630174056.667646-1-ben.levinsky@amd.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2026-07-01reset: imx7: Correct polarity of MIPI CSI resets on i.MX8MQRobby Cai
On i.MX8MQ, the MIPI CSI reset lines are active-low and not self-clearing. Writing '0' asserts reset and it remains asserted until explicitly deasserted by software. This driver previously treated the MIPI CSI reset signals as active-high, which led to incorrect reset assert/deassert sequencing. This issue was exposed by commit 6d79bb8fd2aa ("media: imx8mq-mipi-csi2: Explicitly release reset"). Fix this by reflecting the correct reset polarity and ensuring proper reset handling. Fixes: c979dbf59987 ("reset: imx7: Add support for i.MX8MQ IP block variant") Cc: stable@vger.kernel.org # 6d79bb8fd2aa: media: imx8mq-mipi-csi2: Explicitly release reset Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Robby Cai <robby.cai@nxp.com> Reviewed-by: Guoniu Zhou <guoniu.zhou@oss.nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2026-07-01reset: sunxi: fix memory region leak on ioremap failureZhao Dongdong
In sunxi_reset_init(), when ioremap() fails, the memory region obtained via request_mem_region() is not released, leading to a resource leak. Add an err_mem_region label to properly release the memory region before freeing the data structure. Fixes: 8f1ae77f4666 ("reset: Add Allwinner SoCs Reset Controller Driver") Cc: stable@vger.kernel.org Signed-off-by: Zhao Dongdong <zhaodongdong@kylinos.cn> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2026-07-01reset: spacemit: k3: fix USB2 ahb resetYixun Lan
According to SpacemiT K3's updated docs, the USB2 ahb reset and USB2 bus clock enable bit was wrongly swapped, the correct one should be: Register : APMU_USB_CLK_RES_CTRL bit[1] : usb2_port_bus_clk_en bit[0] : usb2_port_ahb_rstn Fixes: a0e0c2f8c5f3 ("reset: spacemit: k3: Decouple composite reset lines") Reported-by: Junzhong Pan <panjunzhong@linux.spacemit.com> Signed-off-by: Yixun Lan <dlan@kernel.org> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
2026-07-01RDMa/mlx5: Avoid frame overflow warningArnd Bergmann
Building mlx5 on s390 shows a rather high stack usage that can exceed the warning limit when that is set to a lower but still reasonable value: drivers/infiniband/hw/mlx5/wr.c:1051:5: error: stack frame size (1328) exceeds limit (1280) in 'mlx5_ib_post_send' [-Werror,-Wframe-larger-than] The problem here is 'struct ib_reg_wr' on the stack of handle_reg_mr_integrity(), which gets inlined into mlx5_ib_post_send() along with a number of smaller functions. Keeping the inner function out of line like gcc does avoids the warning and reduces the total stack usage in other functions called from mlx5_ib_post_send(), though handle_reg_mr_integrity() itself still has the same problem as before. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Link: https://patch.msgid.link/20260612201611.4127750-1-arnd@kernel.org Signed-off-by: Leon Romanovsky <leon@kernel.org>
2026-07-01regulator: tps6594: Fix device node reference leaks in multiphase loopUday Khare
In tps6594_regulator_probe(), the multi-phase configuration loop calls of_find_node_by_name() to find buck nodes by name, and of_get_parent() twice to navigate to the PMIC parent node. None of the acquired node references (np, intermediate parent, np_pmic_parent) are ever released via of_node_put(), causing a reference leak on every loop iteration. Additionally, of_find_node_by_name() can return NULL, but the result was immediately passed to of_node_full_name() and of_get_parent() without a NULL check, which could lead to a NULL pointer dereference. Fix this by: - Adding a NULL check for np after of_find_node_by_name() - Storing the intermediate parent node in a local variable np_parent - Calling of_node_put() on np, np_parent and np_pmic_parent at the end of each loop iteration Fixes: f17ccc5deb4d ("regulator: tps6594-regulator: Add driver for TI TPS6594 regulators") Signed-off-by: Uday Khare <udaykhare77@gmail.com> Link: https://patch.msgid.link/20260618132327.11529-1-udaykhare77@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-01drm/i915/cmtg: Warn on invalid CMTG transcoder in intel_cmtg_disable()Animesh Manna
intel_cmtg_disable() indexes the per-transcoder register array using the CMTG transcoder returned by to_cmtg_transcoder(), which is only valid for TRANSCODER_A/B. The callers are now gated by intel_cmtg_is_allowed(), so reaching this function with an invalid CMTG transcoder should never happen. Add a drm_WARN_ON() that bails out early in that case, both to document the invariant and to guard against the out-of-bounds register access (trans_offsets[-1]) should a future caller get it wrong. v2: - Add an in-function INVALID_TRANSCODER drm_WARN_ON check. (Suraj) Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patch.msgid.link/20260629180236.1353704-3-animesh.manna@intel.com
2026-07-01drm/i915/display: Guard CMTG disable with intel_cmtg_is_allowed()Animesh Manna
intel_cmtg_disable() maps crtc_state->cpu_transcoder to a CMTG transcoder via to_cmtg_transcoder(), which only returns a valid transcoder for TRANSCODER_A/B. The disable call sites in hsw_crtc_disable() and the fastset/VRR path only check the sticky crtc->cmtg.enabled flag, so during a big-joiner reconfiguration that moves the eDP across pipes intel_cmtg_disable() can be reached with a crtc_state whose cpu_transcoder does not map to a CMTG transcoder. That results in a negative register-array index (trans_offsets[-1]) and a UBSAN array-index-out-of-bounds splat: UBSAN: array-index-out-of-bounds in .../display/intel_cmtg.c:187:24 intel_cmtg_disable+0x395/0x3d0 [xe] intel_old_crtc_state_disables+0xfb/0x1f0 [xe] intel_atomic_commit_tail+0xca6/0x2040 [xe] Gate both call sites with intel_cmtg_is_allowed() so that intel_cmtg_disable() is only invoked for configurations that actually map to a CMTG transcoder. v2: - Guard the intel_cmtg_disable() call sites with intel_cmtg_is_allowed() instead of a silent return (Suraj). Fixes: 3bb44e8d421a ("drm/i915/cmtg: Modify existing hook to disable CMTG") Signed-off-by: Animesh Manna <animesh.manna@intel.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://patch.msgid.link/20260629180236.1353704-2-animesh.manna@intel.com
2026-07-01gpio: mvebu: add wake-up interrupt supportRosen Penev
Implement wake IRQ support for the mvebu GPIO controller: - Replace unused irqbase field with bank_irq[4] to store per-bank IRQ numbers for use in the wake-up callback. - Add mvebu_gpio_set_wake_irq() that forwards enable_irq_wake / disable_irq_wake to the correct parent IRQ based on hwirq. - Set IRQCHIP_SET_TYPE_MASKED and IRQCHIP_MASK_ON_SUSPEND flags on both level and edge chip types. - Set IRQ_GC_INIT_NESTED_LOCK for the nested irq domain. - Add missing <linux/interrupt.h> include. Assisted-by: opencode:big-pickle Signed-off-by: Rosen Penev <rosenp@gmail.com> Link: https://patch.msgid.link/20260628230202.1209991-1-rosenp@gmail.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2026-07-01pinctrl: s32cc: implement GPIO functionalityAndrei Stefanescu
The updated SIUL2 block groups pinctrl, GPIO data access and interrupt control within the same hardware unit. The SIUL2 driver is therefore structured as a monolithic pinctrl/GPIO driver. GPIO data access and direction handling are implemented using the gpio-regmap library backed by a virtual regmap. The virtual regmap translates the gpio-regmap register model to the underlying SIUL2 registers: MSCR for direction, PGPDI for input values and PGPDO for output values. The existing pinctrl GPIO callbacks are used for the request/free path: they switch the pad to GPIO mode on request and restore the previous MSCR configuration when the GPIO is released. This change came as a result of upstream review in the following series: https://lore.kernel.org/linux-gpio/20260120115923.3463866-4-khristineandreea.barbulescu@oss.nxp.com/T/#m543c9edbdde74bdc68b6a2364e8b975356c33043 https://lore.kernel.org/all/20260504131148.3622697-7-khristineandreea.barbulescu@oss.nxp.com/ Support both SIUL2 DT layouts: - legacy pinctrl-only binding - extended pinctrl/GPIO/irqchip binding Reviewed-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com> Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://lore.kernel.org/linux-gpio/20260120115923.3463866-4-khristineandreea.barbulescu@oss.nxp.com/T/#m543c9edbdde74bdc68b6a2364e8b975356c33043 Link: https://lore.kernel.org/all/20260504131148.3622697-7-khristineandreea.barbulescu@oss.nxp.com/ Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-07-01pinctrl: s32cc: change to "devm_pinctrl_register_and_init"Andrei Stefanescu
Switch from "devm_pinctrl_register" to "devm_pinctrl_register_and_init" and "pinctrl_enable" since this is the recommended way. Reviewed-by: Linus Walleij <linusw@kernel.org> Reviewed-by: Frank Li <Frank.Li@nxp.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com> Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com> Tested-by: Enric Balletbo i Serra <eballetb@redhat.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-07-01pinctrl: s32cc: remove inline specifiersKhristine Andreea Barbulescu
Remove unnecessary inline specifiers from static functions. Reviewed-by: Linus Walleij <linusw@kernel.org> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com> Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Tested-by: Enric Balletbo i Serra <eballetb@redhat.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-07-01pinctrl: s32cc: add/fix some commentsKhristine Andreea Barbulescu
Add/fix some comments and print statements. Reviewed-by: Linus Walleij <linusw@kernel.org> Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Signed-off-by: Andrei Stefanescu <andrei.stefanescu@oss.nxp.com> Signed-off-by: Khristine Andreea Barbulescu <khristineandreea.barbulescu@oss.nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-07-01ACPICA: Define acpi_ut_safe_strncpy() as strscpy_pad() aliasRafael J. Wysocki
Commit 292db66afd20 ("ACPICA: Unbreak tools build after switching over to strscpy_pad()") added an #ifdef based on a __KERNEL__ check which is sort of nasty to the acpi_ut_safe_strncpy() definition to unbreak ACPICA tools builds broken by commit 97f7d3f9c9ac ("ACPICA: Replace strncpy() with strscpy_pad() in acpi_ut_safe_strncpy()"). However, that #ifdef effectively produces dead code when tools are built because they don't call acpi_ut_safe_strncpy(). Accordingly, drop the existing definition of acpi_ut_safe_strncpy() and define it as a strscpy_pad() alias. Fixes: 292db66afd20 ("ACPICA: Unbreak tools build after switching over to strscpy_pad()") Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> [ rjw: Tweak the changelog ] Link: https://patch.msgid.link/12941764.O9o76ZdvQC@rafael.j.wysocki Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>