kernel/git/stable/linux-stable.git/arch/powerpc/boot/virtex.c, branch masterLinux kernel stable treehttps://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux-stable.git/atom?h=master2020-05-28T13:24:34+00:00powerpc: Remove Xilinx PPC405/PPC440 support2020-05-28T13:24:34+00:00Michal Simekmichal.simek@xilinx.com2020-05-21T16:55:52+00:00urn:sha1:7ade8495dcfd788a76e6877c9ea86f5207369ea4
The latest Xilinx design tools called ISE and EDK has been released in
October 2013. New tool doesn't support any PPC405/PPC440 new designs.
These platforms are no longer supported and tested.
PowerPC 405/440 port is orphan from 2013 by
commit cdeb89943bfc ("MAINTAINERS: Fix incorrect status tag") and
commit 19624236cce1 ("MAINTAINERS: Update Grant's email address and maintainership")
that's why it is time to remove the support fot these platforms.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/8c593895e2cb57d232d85ce4d8c3a1aa7f0869cc.1590079968.git.christophe.leroy@csgroup.eu
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 5002019-06-19T15:09:55+00:00Thomas Gleixnertglx@linutronix.de2019-06-04T08:11:33+00:00urn:sha1:d2912cb15bdda8ba4a5dd73396ad62641af2f520
Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4122 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
powerpc/virtex: Fix booting of Xilinx FPGAs with 16550 for 405 and 4402008-07-04T06:58:59+00:00John Linnjohn.linn@xilinx.com2008-07-02T22:11:28+00:00urn:sha1:d58577d8f36f66dbb5dec30fc01dfddda0cfd1fa
The following changes add processing to initialize the Xilinx 16550 UART
in the boot wrapper for Virtex targets without firmware. Normally the
boot wrapper assumes that the serial port has already been initialized by
firmware.
The wrapper was also modified to add the 440 build.
Signed-off-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>