Linux kernel stable tree https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux-stable.git/atom?h=linux-3.16.y 2014-06-21T16:47:01+00:00 2014-06-21T16:47:01+00:00 Linus Torvalds torvalds@linux-foundation.org 2014-06-21T16:47:01+00:00 urn:sha1:7a8e9c80889732891df50d44328f330316834eb1 Pull s390 patches from Martin Schwidefsky: "A couple of bug fixes, a debug change for qdio, an update for the default config, and one small extension. The watchdog module based on diagnose 0x288 is converted to the watchdog API and it now works under LPAR as well" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: s390/ccwgroup: use ccwgroup_ungroup wrapper s390/ccwgroup: fix an uninitialized return code s390/ccwgroup: obtain extra reference for asynchronous processing qdio: Keep device-specific dbf entries s390/compat: correct ucontext layout for high gprs s390/cio: set device name as early as possible s390: update default configuration s390: avoid format strings leaking into names s390/airq: silence lockdep warning s390/watchdog: add support for LPAR operation (diag288) s390/watchdog: use watchdog API s390/sclp_vt220: Enable ASCII console per default s390/qdio: replace shift loop by ilog2 s390/cio: silence lockdep warning s390/uaccess: always load the kernel ASCE after task switch s390/ap_bus: Make modules parameters visible in sysfs 2014-06-10T19:48:16+00:00 David Cohen david.a.cohen@linux.intel.com 2014-04-15T20:06:05+00:00 urn:sha1:87a1ef8058d9ab26bc289ea4f27bc3c11ce9acb8 Add initial Intel MID watchdog driver support. This driver is an initial implementation of generic Intel MID watchdog driver. Currently it supports Intel Merrifield platform. Signed-off-by: Eric Ernst <eric.ernst@intel.com> Signed-off-by: David Cohen <david.a.cohen@linux.intel.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> 2014-06-10T19:46:26+00:00 Guenter Roeck linux@roeck-us.net 2014-04-05T18:27:37+00:00 urn:sha1:7285fae9345e030c6e215a9a4e5fe69b8db92bb5 Since both chips are now supported by the w83627hf watchdog driver, the chip specific drivers are no longer needed and can be removed. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> 2014-06-10T08:48:29+00:00 Philipp Hachtmann phacht@de.ibm.com 2014-06-05T09:01:43+00:00 urn:sha1:f7a94db4e9594fd4b67e715d7b26864b7bd74a75 Converted the vmwatchdog driver to use the kernel's watchdog API. Signed-off-by: Philipp Hachtmann <phacht@de.ibm.com> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com> 2014-03-31T11:30:29+00:00 Andrew Chew achew@nvidia.com 2014-02-14T20:03:05+00:00 urn:sha1:c33a15974c1a326b0034cc2a2e73fac92ae8d001 Add a driver for the hardware watchdogs in NVIDIA Tegra SoCs (Tegra30 and later). This driver will configure one watchdog timer that will reset the system in the case of a watchdog timeout. This driver binds to the nvidia,tegra30-timer device node and gets its register base from there. Signed-off-by: Andrew Chew <achew@nvidia.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> 2014-01-28T20:21:02+00:00 Alexander Shiyan shc_work@mail.ru 2013-11-30T07:54:32+00:00 urn:sha1:25134eafb05eef6dd4b6caee3a711b63ee0c3737 This patch adds a watchdog driver for devices controlled through GPIO, (Analog Devices ADM706, Maxim MAX823, National NE555 etc). Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> 2014-01-28T20:13:50+00:00 Markus Mayer markus.mayer@linaro.org 2013-11-22T22:56:03+00:00 urn:sha1:6adb730dc2085c16c52a2f991cc1661e4a7fd6d5 This commit adds support for the watchdog timer used on the BCM281xx family of SoCs. Signed-off-by: Markus Mayer <markus.mayer@linaro.org> Reviewed-by: Matt Porter <matt.porter@linaro.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> 2013-11-17T18:37:23+00:00 Xianglong Du Xianglong.Du@csr.com 2013-10-02T00:13:49+00:00 urn:sha1:f0fcbdbf202e2be36c8eb6d1f5c01f95805777de On CSR SiRFprimaII and SiRFatlasVI, the 6th timer can act as a watchdog timer when the Watchdog mode is enabled. watchdog occur when TIMER watchdog counter matches the value software pre-set, when this event occurs, the effect is the same as the system software reset. Signed-off-by: Xianglong Du <Xianglong.Du@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Cc: Romain Izard <romain.izard.pro@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> 2013-11-17T18:36:38+00:00 John Crispin blogic@openwrt.org 2013-08-08T09:31:43+00:00 urn:sha1:473cf939ff3442dc86d531f3bb152a2f129ea9d1 Add a driver for the watchdog timer found on Ralink SoC Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be> Cc: linux-watchdog@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org 2013-11-17T18:34:49+00:00 Jonas Jensen jonas.jensen@gmail.com 2013-08-02T14:40:45+00:00 urn:sha1:e14538e0db8d880291064348bda7d52ec8322675 This patch adds a watchdog driver for the main hardware watchdog timer found on MOXA ART SoCs. The MOXA ART SoC provides one writable timer register, restarting the hardware once it reaches zero. The register is auto decremented every APB clock cycle. Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>