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2026-07-29dt-bindings: mediatek: cec: Correct the compatibles for mt7623-mt8167Luca Leonardo Scorcia
The HDMI CEC driver for both mt7623 and mt8167 is actually the same as mt8173-cec and the mt7623n.dtsi board include file already uses mt8173-cec compatible as a fallback, but the documentation lists them as separate entries. Correct the binding by adding the correct fallback. This change fixes the following dtbs_check errors: DTC [C] arch/arm/boot/dts/mediatek/mt7623n-rfb-emmc.dtb cec@10012000 (mediatek,mt7623-cec): compatible: ['mediatek,mt7623-cec', 'mediatek,mt8173-cec'] is too long DTC [C] arch/arm/boot/dts/mediatek/mt7623n-bananapi-bpi-r2.dtb cec@10012000 (mediatek,mt7623-cec): compatible: ['mediatek,mt7623-cec', 'mediatek,mt8173-cec'] is too long Signed-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20260624173627.19785-1-l.scorcia@gmail.com/ Signed-off-by: Chun-Kuang Hu <chunkuang.hu@kernel.org>
2026-07-30dt-bindings: media: qcom: Add Shikra CAMSS compatibleNihal Kumar Gupta
Shikra contains the same Camera Subsystem IP as QCM2290. Document the platform-specific compatible string, using qcom,qcm2290-camss as fallback. Unlike QCM2290, Shikra omits the CDM and OPE blocks, requiring only a single IOMMU context bank instead of four. Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org> Signed-off-by: Nihal Kumar Gupta <nihal.gupta@oss.qualcomm.com> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-07-30dt-bindings: media: qcom,milos-iris: Add Milos video codecAlexander Koskovich
Add binding for Qualcomm Milos Iris video codec. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Alexander Koskovich <akoskovich@pm.me> Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
2026-07-29dt-bindings: arm: qcom-soc: Allow WSA88xx speaker compatibleKrzysztof Kozlowski
One selects in this schema captures "^qcom,.*sa[0-9]+.*$" compatibles, because there are SAxxxx Qualcomm SoCs. Unfortunately there is also WSA8810 and WSA8855 I2C speakers, so they need listing too. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260721-dt-bindings-qcom-soc-naming-v3-4-8f275c9d3412@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-29dt-bindings: arm: qcom-soc: Validate nodes with fallbacksKrzysztof Kozlowski
The schema checking for expected naming patterns for SoC IP block nodes was really incomplete and was checking only nodes with single compatible. Fix this by changing "select:" to "contains:" so every node, except root nodes, having at least one matching compatible will be evaluated. This however will evaluate nodes which have some generic fallbacks (e.g. syscon), thus the schema for expected compatible should also have "contains:" (with "anyOf:"). These two above are the only functional changes in this commit and the rest of the diff is indentation change. None of the patterns are changed (neither in "Preferred naming style" group nor in "Legacy namings"), none of the compatibles are affected. Basically the second part of the diff is (simplifying): properties: compatible: - oneOf: - ...... + contains: + anyOf: + ...... Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260721-dt-bindings-qcom-soc-naming-v3-3-8f275c9d3412@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-29dt-bindings: arm: qcom-soc: Document more of existing legacy style compatiblesKrzysztof Kozlowski
The schema misses several old style compatibles with SoC component trailing in the compatible (qcom,IP-SoC): - qcom,apss-wdt-x1e80100 - qcom,apss-wdt-xxx, qcom,rpm-xxx and qcom,scm-xxx for SoC with code names (like qcom,rpm-shikra) - qcom,kpss-gcc-xxx - qcom,rpmcc-xxx - qcom,tcsr-xxx - qcom,usb-hs-phy-xxx It also missed qcom,ipq806x-ahci. None of these were flagged by schema, because they were used with fallbacks and the schema checks only for single compatibles. Nevertheless document them for complete picture and for future change, which will apply the schema to fallbacks as well. Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260721-dt-bindings-qcom-soc-naming-v3-2-8f275c9d3412@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-29dt-bindings: arm: qcom-soc: Include Eliza, Kaanapali and others in SoC namesKrzysztof Kozlowski
Grow the schema checking for proper SoC compatible naming style with recently upstreamed new Qualcomm SoCs: Eliza, Kaanapali, Hawi, Mahua, Maili, Nord and Shikra. The list covers only SoC IP blocks, thus no Hamoa or Talos in the names, because these are codenames but not used for SoC IP block naming. Since switching from model numbers to codenames, this list with explicit codenames will have to grow and list them all in order for the schema to work. It feels like a churn, but the compatible naming is still mess, for example, the schema pci/qcom,pcie-x1e80100.yaml with a legacy naming vendor,IP-SoC (qcom,pcie-x1e80100) received a new compatible with new style (qcom,glymur-pcie). Acked-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260721-dt-bindings-qcom-soc-naming-v3-1-8f275c9d3412@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-29spi: Add trace event support for GENI SE registers dumpMark Brown
Praveen Talari <praveen.talari@oss.qualcomm.com> says: The GENI framework is used by multiple drivers including UART, I2C, and SPI. When hardware-related failures occur, each driver typically relies on local logging, which often lacks sufficient information to determine the exact controller state. This series introduces a common tracing mechanism for GENI Serial Engine debug registers and demonstrates its use in the SPI driver. Patch 1 adds a new tracepoint that captures an extensive set of GENI SE registers, including command state, interrupt status, FIFO state, DMA configuration, and clock-related information. Patch 2 hooks the tracepoint into SPI error paths so that register snapshots are automatically generated when timeouts or transfer-related failures occur. Usage examples: Enable all I2C traces: echo 1 > /sys/kernel/tracing/events/qcom_geni_se/enable cat /sys/kernel/debug/tracing/trace_pipe Example trace output: 114.291299: geni_se_regs: 888000.spi: m_cmd0=0x18000000 m_irq_status=0x00000080 s_cmd0=0x00000000 s_irq_status=0x08000000 geni_status=0x00000000 geni_ios=0x00000000 m_cmd_ctrl=0x00000000 m_cmd_err=0x00000000 m_fw_err=0x00000000 tx_fifo_sts=0x00000000 rx_fifo_sts=0x00000000 tx_watermark=0x00000000 rx_watermark=0x0000000d rx_watermark_rfr=0x0000000e m_gp_length=0x00000004 s_gp_length=0x00000000 dma_tx_irq=0x00000000 dma_rx_irq=0x00000000 dma_tx_irq_en=0x0000000f dma_rx_irq_en=0x0000001f dma_rx_len=0x00001400 dma_rx_len_in=0x00001400 dma_tx_len=0x00001400 dma_tx_len_in=0x00001400 dma_tx_ptr_l=0xffffc000 dma_tx_ptr_h=0x00000000 dma_rx_ptr_l=0xffffa000 dma_rx_ptr_h=0x00000000 dma_tx_attr=0x00000001 dma_tx_max_burst=0x00000002 dma_rx_attr=0x00000000 dma_rx_max_burst=0x00000002 dma_if_en=0x00000009 dma_if_en_ro=0x00000001 dma_general_cfg=0x0000000f dma_qsb_trans_cfg=0x00000000 dma_dbg=0x00000000 m_irq_en=0x7fc0007f s_irq_en=0x03003e3e gsi_event_en=0x00000000 se_irq_en=0x0000000f ser_m_clk_cfg=0x000000a1 ser_s_clk_cfg=0x00000000 general_cfg=0x00000048 output_ctrl=0x0000007f clk_ctrl_ro=0x00000001 fifo_if_dis=0x00000000 fw_multilock_msa=0x00000000 clk_sel=0x00000005 Link: https://patch.msgid.link/20260729-add-tracepoints-for-se-reg-dump-v4-0-08bbd63b0ed2@oss.qualcomm.com
2026-07-29dt-bindings: i2c: rcar-i2c: Document R-Car X5H supportMinh Le
Document support for rcar-i2c on R8A78000 (X5H) SoCs. Signed-off-by: Minh Le <minh.le.aj@renesas.com> [wsa: fixed white space issues, added reset requirement] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20260727122546.4232-5-wsa+renesas@sang-engineering.com
2026-07-29dt-bindings: arm: rockchip: Add EmbedFire LubanCat 4 boardPufan Jin
Add compatible string for the EmbedFire LubanCat 4 single board computer based on the Rockchip RK3588S SoC. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Pufan Jin <2254650260@qq.com> Link: https://patch.msgid.link/tencent_0DA92AE62C08A802ACC4FE9E47A0192C8E05@qq.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-29dt-bindings: PCI: rcar-gen4-pci-host: Document optional msi-parentMarek Vasut
The R-Car Gen4 PCIe controller can optionally use GIC ITS as an MSI controller. This configuration is described in DT by setting msi-parent DT property in the PCIe controller node. Document this configuration. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@oss.qualcomm.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20260720015505.314957-1-marek.vasut+renesas@mailbox.org
2026-07-29Merge tag 'samsung-drivers-7.3' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers Samsung SoC drivers for v7.3 1. Fix very old leak of OF node in PMU driver. 2. Few cleanups and new bindings for ExynosAutov920 HSI0 syscon. * tag 'samsung-drivers-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: dt-bindings: samsung: exynos-pmu: Narrow allowed reboot modes dt-bindings: samsung: exynos-pmu: Restrict children with unevaluatedProperties dt-bindings: soc: samsung: exynos-sysreg: Add hsi0 for ExynosAutov920 soc: samsung: exynos-pmu: fix of_node refcount leak in exynos_get_pmu_regmap() Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-29dt-bindings: arm: rockchip: Add Anbernic RG Vita-ProChris Morgan
Add compatible string for the Anbernic RG Vita-Pro. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260728203832.166402-4-macroalpha82@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-29ASoC: dt-bindings: realtek,rt5640: Make interrupts optionalFabio Estevam
The RT5640 GPIO1/IRQ pin can be configured either as GPIO1 or as the codec interrupt output. Some boards, such as the Firefly-RK3399, do not connect the codec interrupt output. This causes the following binding validation warning: 'interrupts' is a required property Make the interrupts property optional to support such hardware configurations. Signed-off-by: Fabio Estevam <festevam@gmail.com> Link: https://patch.msgid.link/20260727185814.2599488-1-festevam@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-29Merge tag 'socfpga_dts_updates_for_v7.3' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt SoCFPGA DTS updates for v7.3 - dt-bindings updates: - Document compatible for Agilex72 - Document additional interrupts for Agilex5 - Add the additional interrupts for the gmac on Agilex5 - Use decimal number for interrupts, not hexadecimal - Enable the SMMU on Agilex5 - Add dma-coherent on XGMAC nodes - Add initial support for the Agilex72 SoCDK - Correct indentation on Arria10 - Update QSPI boot partition label * tag 'socfpga_dts_updates_for_v7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux: arm64: dts: socfpga: use consistent QSPI boot partition label ARM: dts: intel: arria10: Correct indentation arm64: dts: socfpga: agilex5: update channel interrupts for gmac1 and gmac2 dt-bindings: net: altr,socfpga-stmmac: add more interrupts for Agilex5 arm64: dts: socfpga: agilex72: Add initial device tree dt-bindings: arm: altera: Add Agilex72 SoCFPGA compatible strings arm64: dts: socfpga: agilex5: Add dma-coherent to XGMAC nodes arm64: dts: socfpga: agilex5: Enable the SMMU arm64: dts: intel: keembay: Always use decimal interrupts arm64: dts: socfpga: agilex5: Add per-channel interrupts to gmac0 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-29Merge tag 'v7.3-rockchip-dts32-1' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt New board: Alientek DLRV1126 Eeprom for RK3288-Tinker-board * tag 'v7.3-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: Add Alientek DLRV1126 ARM: dts: rockchip: Add RV1126 I2C5 dt-bindings: arm: rockchip: Add Alientek DLRV1126 dt-bindings: vendor-prefixes: add alientek ARM: dts: rockchip: add eeprom node to rk3288-tinker Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-29Merge tag 'samsung-dt64-7.3' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt Samsung DTS ARM64 changes for v7.3 1. New SoC Exynos8855 (market naming: Exynos 1580) basic support with its SMDK development board. That's a 8-core SoC, released in Q4 2024. 2. ExynosAutov920: Add HSI0 syscon node. * tag 'samsung-dt64-7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: MAINTAINERS: Add entry for Samsung Exynos8855 SoC arm64: dts: exynos: add initial support for Samsung Exynos8855 smdk dt-binding: ARM: samsung: Add Samsung Exynos8855 arm64: dts: exynosautov920: Add hsi0 syscon node for PCIe PHY Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-07-29spi: Merge up fixesMark Brown
The SpacemiT driver fixes and new work collide with each other.
2026-07-29ALSA: docs: Add description of usb-audio playback_urb_fixup quirkTakashi Iwai
We missed the description for the recently introduced quirk bit QUIRK_FLAG_PLAYBACK_URB_FIXUP. A brief explanation is added here. Signed-off-by: Takashi Iwai <tiwai@suse.de> Link: https://patch.msgid.link/20260729074523.92761-2-tiwai@suse.de
2026-07-28percpu_ref: fix documentation of maximum valueMatthew Wilcox (Oracle)
Tejun changd percpu_ref to use long instead of int back in 2014 but missed updating this bit of the documentation. Also add the documentation to the htmldocs. Link: https://lore.kernel.org/20241211204017.184512-1-willy@infradead.org Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org> Acked-by: Tejun Heo <tj@kernel.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2026-07-28mm: add writeback.h to docs buildMatthew Wilcox (Oracle)
There's four functions in this header file with kernel-doc; add them to the htmldocs. Link: https://lore.kernel.org/20260615162244.2170866-1-willy@infradead.org Signed-off-by: Matthew Wilcox (Oracle) <willy@infradead.org> Cc: Andreas Gruenbacher <agruenba@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2026-07-28mm/page_owner: document page_owner filterZhen Ni
Add documentation for the page_owner_filter userspace tool and kernel-level filtering features. [rdunlap@infradead.org: avoid docs build warning] Link: https://lore.kernel.org/20260708213548.469155-1-rdunlap@infradead.org Link: https://lore.kernel.org/20260707115411.1714314-5-zhen.ni@easystack.cn Signed-off-by: Zhen Ni <zhen.ni@easystack.cn> Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Acked-by: Vlastimil Babka (SUSE) <vbabka@kernel.org> Acked-by: Zi Yan <ziy@nvidia.com> Cc: Brendan Jackman <jackmanb@google.com> Cc: Johannes Weiner <hannes@cmpxchg.org> Cc: Michal Hocko <mhocko@suse.com> Cc: Suren Baghdasaryan <surenb@google.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
2026-07-28Documentation/x86: Document the intricacies of GS context switchingBorislav Petkov (AMD)
Summarized from the thread at Link by AI, with additions and improvements by H. Peter Anvin and Andrew Cooper. Assisted-by: Claude Code:claude-sonnet-4-6 Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Link: https://lore.kernel.org/all/20260604015303.GEaiDafyuU0bwP4Y05@fat_crate.local
2026-07-28hwmon: add Altera SoC FPGA hardware monitoring driverTze Yee Ng
Add a hardware monitor driver for Altera SoC FPGA devices using the Stratix 10 service layer. Sensor channels are selected based on the service layer compatible string. Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com> Signed-off-by: Tze Yee Ng <tze.yee.ng@altera.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Link: https://lore.kernel.org/all/a79aee37be7067691fd02a3a9cfd134c995e5a95.1784785709.git.tze.yee.ng@altera.com/#r Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2026-07-29dt-bindings: power: supply: sgm41542: document sgm41542Chris Morgan
Document the SG Micro sgm41542 battery charger/boost converter. The parameters of input-current-limit-microamp and input-voltage-limit-microvolt are defined as such since they are in common use among multiple bindings currently. Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260728203832.166402-2-macroalpha82@gmail.com Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2026-07-28dt-bindings: arm: rockchip: Add ArmSoM CM5 and CM5-IOJiaxing Hu
Add compatibles for the ArmSoM CM5, an RK3576 compute module, and its CM5-IO carrier board. Signed-off-by: Jiaxing Hu <gahing@gahingwoo.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260719034611.3623066-2-gahing@gahingwoo.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2026-07-28regulator: dt-bindings: qcom,rpmh: Add support for PM8350BEsteban Urrutia
The PM8350B has only one LDO, which gets its power from a dedicated input. Add support for it. Signed-off-by: Esteban Urrutia <esteuwu@proton.me> Link: https://patch.msgid.link/20260723-pm8350b-ldo-v1-1-42b5428a0d3f@proton.me Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-28regulator: dt-bindings: Add fan53555 allowed modesVictor Krawiec
Fairchild FAN53555 and its clone from Rockchip, Silergy and TCS support two modes of operation: - Auto-PFM: Allow automatic PFM during light load (default mode) - Forced PWM Some boards require forced PWM mode to keep the supply ripple within acceptable limits under light load conditions. Regulator mode indexes are starting from 1 to keep backward compatibility with existing device trees Signed-off-by: Victor Krawiec <victor.krawiec@arturia.com> Link: https://patch.msgid.link/20260723094001.120264-2-victor.krawiec@arturia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-07-28platform/x86/amd/hsmp: Add IOCTL_GET_TELEMETRY_DATA for metric table readsMuralidhara M K
The metric table needs to be delivered to userspace as a single atomic snapshot, but the current sysfs metrics_bin path is a file read: userspace can read it in chunks and observe a torn snapshot if an SMU refresh happens between read() calls. The same path is also bounded by PAGE_SIZE, so the ~13 KB table used by HSMP protocol version 7 on Family 1Ah Model 50h-5Fh cannot be returned at all, regardless of how userspace reads it. Rather than extend sysfs to lift both restrictions, expose the metric table through the existing HSMP character device using a new ioctl that always copies the table in one shot. Add struct hsmp_telemetry_data and HSMP_IOCTL_GET_TELEMETRY_DATA to the UAPI header. Under the surrounding #pragma pack(4), placing the __u64 user pointer first gives a tight 16-byte layout that is identical for 32- and 64-bit callers, and the trailing __u16 reserved field is rejected with -EINVAL if non-zero so future kernels can repurpose it without breaking already-deployed userspace. The command is encoded with _IOW because the kernel only reads the request struct; the snapshot travels through the user pointer it carries. The requested size may be anything from one byte up to the size firmware reported for that socket's table. A short request returns the leading bytes of the snapshot, so userspace built against an older table layout keeps working on firmware that grew the table, mirroring the relaxed response_sz rule applied to HSMP messages earlier in this series. A request larger than the firmware table is rejected with -EINVAL rather than short-written, so a caller can never mistake a partial copy for a full one. Dispatch hsmp_ioctl() on the ioctl command: the existing message handler is factored out as hsmp_ioctl_msg() for HSMP_IOCTL_CMD, and HSMP_IOCTL_GET_TELEMETRY_DATA goes to a new hsmp_ioctl_get_telemetry() helper. /dev/hsmp is a singleton character device that outlives an individual socket unbind, so an ioctl issued on an already-open fd can run concurrently with socket teardown. hsmp_sock_rwsem is the driver's contract for that: the data plane takes it for read, and probe and remove take it for write to drain the data plane before freeing the socket array, unmapping the metric tables and destroying the per-socket mutexes. hsmp_ioctl_get_telemetry() takes it for read across the socket lookup, the checks on that socket's metric-table state and the table read itself, so none of that state can be torn down underneath it. Without this the handler would sleep in its kvmalloc() holding no lock at all, and could resume with a freed socket, locking a destroyed mutex and reading from an unmapped iomem region. The lock is dropped before the copy_to_user(), because faulting in the destination can block indefinitely on a userfaultfd-backed buffer and would otherwise leave a socket unbind waiting for the write lock. Since hsmp_metric_tbl_read() reached the mailbox through hsmp_send_message(), which takes hsmp_sock_rwsem itself, calling it with the lock already held would recursively take the read side and can deadlock against a queued writer. Split out hsmp_metric_tbl_read_locked(), which asserts the lock and uses hsmp_send_message_locked(), and leave hsmp_metric_tbl_read() as a wrapper that takes the read lock for the sysfs callers. This also brings the whole fill-and-copy under the rwsem for those callers, where the memcpy_fromio() previously ran outside it, and makes the lock order uniformly hsmp_sock_rwsem -> metric_read_lock -> hsmp_sem. The user-controlled socket index in HSMP_IOCTL_GET_TELEMETRY_DATA is clamped with array_index_nospec() before indexing hsmp_pdev.sock[], mitigating Spectre v1 (CVE-2017-5753). Include linux/nospec.h, which the file relied on getting transitively. Co-developed-by: Muthusamy Ramalingam <muthusamy.ramalingam@amd.com> Signed-off-by: Muthusamy Ramalingam <muthusamy.ramalingam@amd.com> Signed-off-by: Muralidhara M K <muralidhara.mk@amd.com> Link: https://patch.msgid.link/20260727141542.3370108-5-muralidhara.mk@amd.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2026-07-28Merge tag 'kvmarm-fixes-7.2-3' of ↵Paolo Bonzini
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD KVM/arm64 fixes for 7.2, take #3 - Fix a tiny buglet when propagating the deactivation of an interrupt from a nested guest, which happened to trigger a gold plated CPU bug on a particular implementation - Fix a race between LPI unmapping and mapping, resulting in leaked LPIs - Make LPI mapping more robust on memory allocation failure - Fix the handling of the EL2 tracing clock being disabled - A couple of Sashiko-driven fixes for corner cases in the EL2 tracing code - Add missing sysreg tracepoint for the EL2 code - Tidy-up the mutual exclusion of guest-memfd and MTE - Update Fuad's email address to point to @linux.dev
2026-07-28Merge tag 'kvm-s390-master-7.2-2' of ↵Paolo Bonzini
git://git.kernel.org/pub/scm/linux/kernel/git/kvms390/linux into HEAD KVM: s390: Fixes for 7.2 - several fixes for PCI passthru in s390 kvm - fix a 7.2-rc regression in the adapter interrupt mapping code
2026-07-28dt-bindings: clock: mediatek: Add mt8173 mfgtopChen-Yu Tsai
The MFG (GPU) block on the MT8173 has a small glue layer, named MFG_TOP in the datasheet, that contains clock gates, some power sequence signal delays, and other unknown registers that get toggled when the GPU is powered on. The clock gates are exposed as clocks provided by a clock controller, while the power sequencing bits are exposed as one singular power domain. Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-07-28clk: Add devm_clk_bulk_get_enable()Suraj Gupta
devm_clk_bulk_get_optional_enable() gets, prepares and enables a set of clocks with device-managed cleanup, but treats every clock as optional: a missing clock is silently returned as NULL instead of failing. Consumers that need a fixed set of mandatory clocks enabled for the lifetime of the device currently have to open-code devm_clk_bulk_get() followed by clk_bulk_prepare_enable(), which loses the managed disable on unbind, or fall back to per-clock devm_clk_get_enabled() calls. Add devm_clk_bulk_get_enable() as the non-optional counterpart. The underlying __devm_clk_bulk_get_enable() helper already supports the required (optional = false) path, so only export a thin wrapper for it. Signed-off-by: Suraj Gupta <suraj.gupta2@amd.com> Reviewed-by: Brian Masney <bmasney@redhat.com> Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-07-28dt-bindings: soc: cix: add sky1 audss cru controllerJoakim Zhang
The Cix Sky1 Audio Subsystem (AUDSS) Clock and Reset Unit (CRU) groups clock muxing, gating and block-level software reset control in a single register block. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Joakim Zhang <joakim.zhang@cixtech.com> Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-07-28dt-bindings: clock: ultrarisc: Add DP1000 Clock ControllerJia Wang
Add doc for the clock controller on the UltraRISC DP1000 RISC-V SoC. Signed-off-by: Jia Wang <wangjia@ultrarisc.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-07-28dt-bindings: clock: si544: add si549 compatiblePavel Löbl
Adding Si549 compatible, which uses different internal oscillator frequency. Like in Si544 case, there are three types ending with latters a,b and c. Each with different maximum output frequency. Also fix datasheet links after Silicon Labs acquisition by Skyworks Solutions. Signed-off-by: Pavel Löbl <pavel@loebl.cz> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Brian Masney <bmasney@redhat.com>
2026-07-28dt-bindings: i2c: cdns: add Axiado AX3005 I2C variantSwark Yang
Add binding for Axiado AX3005 I2C controller. So far, no changes are known, so it can fall back to the cdns,i2c-r1p14 compatible. Signed-off-by: Swark Yang <syang@axiado.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Andi Shyti <andi.shyti@kernel.org> Link: https://lore.kernel.org/r/20260716-upstream-axiado-ax3005-upstream-v3-3-c429095143ec@axiado.com
2026-07-28docs: trace: fprobe: fix 'thos' spellingshaikh.kamal
Fix spelling error reported by codespell: thos -> those. No functional change. Link: https://lore.kernel.org/all/20260726065633.20897-1-shaikhkamal2012@gmail.com/ Signed-off-by: shaikh.kamal <shaikhkamal2012@gmail.com> Signed-off-by: Masami Hiramatsu (Google) <mhiramat@kernel.org>
2026-07-28Documentation: media: fix spelling errorsshaikh.kamal
Fix spelling errors reported by codespell: thare -> there (vidioc-subdev-g-routing.rst) stuct -> struct (legacy_dvb_video.rst) No functional change. Signed-off-by: shaikh.kamal <shaikhkamal2012@gmail.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-07-28media: v4l2-ctrls: Allow unknown HDR10 white point and luminanceMing Qian
SMPTE ST 2086 defines the nominal ranges for mastering display chromaticity and luminance values. Its Annex A also documents that CTA 861-G uses zero maximum and minimum luminance values to signal that the corresponding values are unknown, and the xy chromaticity coordinate (0, 0) to signal that the white point chromaticity is unknown. The V4L2 HDR10 mastering display compound control currently rejects these values. Consequently, an unknown white point or luminance value prevents the entire compound control from being updated, making the other valid mastering display metadata unavailable to userspace. Accept (0, 0) as an unknown white point and zero as an unknown maximum or minimum mastering luminance. Continue to reject partially zero white point coordinates and non-zero values outside the nominal ranges. Display primary validation remains unchanged. Document the newly accepted unknown values in the V4L2 userspace API. Fixes: 1ad0de78e794 ("media: v4l: Add HDR10 static metadata controls") Cc: stable@vger.kernel.org Signed-off-by: Ming Qian <ming.qian@oss.nxp.com> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-07-28dt-bindings: media: ti,am437x-vpfe: Convert to DT schemaBhargav Joshi
Convert Texas Instruments AM437x CAMERA Video Processing Front End (VPFE) from legacy text to DT schema. Signed-off-by: Bhargav Joshi <j.bhargav.u@gmail.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
2026-07-28media: dt-bindings: allwinner,sun4i-a10-ir: add A523 compatibleJustin Suess
The A523 (sun55i) contains a newer revision of the sunxi CIR receiver. The reset defaults match the fixed behaviour of the older IP, so the device works fine when driven as an A31 CIR receiver. Add the A523 compatible, with allwinner,sun6i-a31-ir as the fallback. While at it, merge the standalone compatible entries into a single enum. Cc: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Justin Suess <utilityemal77@gmail.com> Link: https://patch.msgid.link/20260728024916.993224-2-utilityemal77@gmail.com Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
2026-07-28arm64: fix cpu-feature-registers Malformed tableRandy Dunlap
The "visible" column was dropped so that last line's extra pieces should also be dropped to prevent a docs build error: Documentation/arch/arm64/cpu-feature-registers.rst:170: ERROR: Malformed table. Right border not aligned or missing. +------------------------------+---------+ | Name | bits | +------------------------------+---------+ | RNDR | [63-60] | +------------------------------+---------+ | TS | [55-52] | +------------------------------+---------+ ... +------------------------------+---------+ | AES | [7-4] | +------------------------------+---------+---------+ [docutils] Fixes: bc7f7ddc64df ("arm64: Remove hidden bitfields from cpu-feature-registers.rst") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Will Deacon <will@kernel.org>
2026-07-28iommu/arm-smmu-v3: Enable CFGI/TLBI-repeat workaround on Tegra264Ashish Mhetre
Nvidia Tegra264 SMMU is affected by an erratum where a TLB entry can survive an invalidation that races with concurrent traffic targeting the same entry. The hardware-recommended software workaround is to issue every CFGI/TLBI command (each followed by CMD_SYNC) twice, and that infrastructure is already in place behind arm_smmu_erratum_repeat_tlbi_cfgi_key. Neither IDR nor IIDR flags this Tegra264-specific bug, so hardware detection is not possible. Tegra264 is device-tree-only (no ACPI/IORT support) and already has a dedicated "nvidia,tegra264-smmu" compatible, so DT-probe is the only viable detection path. Enable the workaround on instances matching the existing "nvidia,tegra264-smmu" compatible by calling static_branch_enable() on arm_smmu_erratum_repeat_tlbi_cfgi_key. Document the erratum in Documentation/arch/arm64/silicon-errata.rst. Signed-off-by: Ashish Mhetre <amhetre@nvidia.com> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> Reviewed-by: Jason Gunthorpe <jgg@nvidia.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-07-28Merge remote-tracking branch 'drm/drm-next' into drm-rust-nextDanilo Krummrich
Backmerge to pull in commit 21fcb222f0d1 ("drm: Remove DRIVER_GEM_GPUVA feature flag"), which a Tyr patch series depends on. Signed-off-by: Danilo Krummrich <dakr@kernel.org>
2026-07-28docs: device-mapper: dm-inlinecrypt: fix 'bellow' spellingshaikh.kamal
Fix spelling error reported by codespell: bellow -> below. No functional change. Signed-off-by: shaikh.kamal <shaikhkamal2012@gmail.com> Signed-off-by: Mikulas Patocka <mpatocka@redhat.com>
2026-07-28dt-bindings: i2c: qcom,sa8255p-geni-i2c: Add compatible for Nord SA8797PShawn Guo
Add compatible for Nord SA8797P QUP GENI I2C controller, which is compatible with SA8255P controller. Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260707095708.3801043-1-shengchao.guo@oss.qualcomm.com Signed-off-by: Andi Shyti <andi.shyti@kernel.org>
2026-07-27docs: netdev: clarify expected interactions with LLMsPaolo Abeni
The official documentation has not captured yet the current impact of AI-generated reviews on the patch process. Explicitly state the status quo and expectations. Signed-off-by: Paolo Abeni <pabeni@redhat.com> Reviewed-by: Nicolai Buchwitz <nb@tipi-net.de> Reviewed-by: Matthieu Baerts (NGI0) <matttbe@kernel.org> Link: https://patch.msgid.link/83360de7addb13a3b5f4d5e722148f248fdb2ae0.1784884817.git.pabeni@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-07-27docs: netdev: clarify handling of idle patchesPaolo Abeni
Off-list pings are very bad, but unfortunately too common. Explicitly state that, so that at least LLMs could learn it. Signed-off-by: Paolo Abeni <pabeni@redhat.com> Reviewed-by: Nicolai Buchwitz <nb@tipi-net.de> Reviewed-by: Matthieu Baerts (NGI0) <matttbe@kernel.org> Link: https://patch.msgid.link/38b75373f813354ad0ee8bfde12ae5a42e9a11b6.1784884817.git.pabeni@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-07-27Documentation: fix grammar in description of nilfs2 recovery codeManoj K M
Include the word 'at' to make the sentence grammatically correct inside the description for nilfs2 recovery code. This improves documentation without changing the original meaning. Signed-off-by: Manoj K M <manojkm24dev@gmail.com> Acked-by: Ryusuke Konishi <konishi.ryusuke@gmail.com> Signed-off-by: Viacheslav Dubeyko <slava@dubeyko.com>
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-20 01:14:59 +0000