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2026-07-17docs/zh_CN: add --no-merges to git log example in how-to.rstBen Guo
Add --no-merges flag to prevent referencing merge commits in the through-commit field of translation commit messages. Signed-off-by: Ben Guo <ben.guo@openatom.club> Reviewed-by: Dongliang Mu <dzm91@hust.edu.cn> Signed-off-by: Alex Shi <alexs@kernel.org>
2026-07-17docs/zh_CN: polish how-to.rstDongliang Mu
Editorial pass on the Chinese translation contributor guide. - Fix typos: 网络通常 → 通畅; remove trailing backticks on the checktransupdate.py command; mis-placed 。 → ， in the 紧急处理 section; 您/你 and 的/地 inconsistencies in 进阶. - Correct "git email" to "git send-email", matching usage elsewhere in the document. - Replace an invalid <URL> inline form with a bare URL so Sphinx renders the lore.kernel.org link. - Tighten grammar and wording: 针对于 → 面向; drop redundant 最多 before 不超过 and tautological 即可; remove double 的 in 您的翻译的内容; resolve ambiguity around 继续 placement in the 把补丁提交到邮件列表 section; and similar small fixes. Assisted-by: Claude:claude-opus-4-6 Signed-off-by: Dongliang Mu <dzm91@hust.edu.cn> Signed-off-by: Alex Shi <alexs@kernel.org>
2026-07-17dt-bindings: serial: snps-dw-apb-uart: Add RV1106 compatibleSimon Glass
Add the compatible for the UARTs of the Rockchip RV1106, which are compatible with the Synopsys DesignWare APB UART. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Link: https://patch.msgid.link/20260714132035.v2.1.c1d92213393f49330ec14d0c670a802181b4fcbf@changeid Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-17usb: gadget: f_uac1_legacy: remove broken string configfs attributesXu Yang
The UAC1_STR_ATTRIBUTE macro defines configfs show/store handlers for the fn_play, fn_cap, and fn_cntl string options. The store function contains an inverted null check on the kstrndup() return value. This means every write attempt returns -ENOMEM on success and dereferences a NULL pointer on allocation failure. The attributes have been broken and unused for many years. Remove the UAC1_STR_ATTRIBUTE macro and the three attributes it generated. The internal defaults (FILE_PCM_PLAYBACK, FILE_PCM_CAPTURE, FILE_CONTROL) set in f_audio_alloc_inst() are unaffected. Fixes: 0854611a19ae ("usb: gadget: f_uac1: add configfs support") Link: https://lore.kernel.org/linux-usb/20260625113154.1954813-1-xu.yang_2@oss.nxp.com/ Suggested-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Assisted-by: Claude:claude-sonnet-4.6 Signed-off-by: Xu Yang <xu.yang_2@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Link: https://patch.msgid.link/20260713060845.3759673-1-xu.yang_2@oss.nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-17dt-bindings: usb: ti,tps6598x: add TPS66993 compatibleRadhey Shyam Pandey
Add a ti,tps66993 compatible to explicitly identify TPS66993 devices. The TPS66993 is not host-interface compatible with TPS6598x, so a distinct compatible is required. On the AMD/Xilinx VEK385 Evaluation Board, the Texas Instruments TPS66993 acts as the USB Type-C/USB PD DRP controller for the MMI USB interface, handling CC signaling, connection detection, PD negotiation and power/data role swapping. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@amd.com> Link: https://patch.msgid.link/20260714061820.537792-2-radhey.shyam.pandey@amd.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-17dt-bindings: usb: qcom,snps-dwc3: Add Shikra compatibleKrishna Kurapati
Introduce the compatible definition for Shikra QCOM SNPS DWC3. Shikra SoC has two usb controllers and the secondary controller is high-speed only capable. Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260711-usb-shikra-v4-v4-1-9d59b9d9aff7@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-17dt-bindings: usb: Add Aspeed AST2700 DWC3 controllerRyan Chen
The Aspeed AST2700 SoC integrates the Synopsys DesignWare USB3 core with no vendor glue logic: it is functionally compatible with snps,dwc3, uses the standard DWC3 clocks, and the only SoC-specific part is a USB3 PHY that is handled by a separate driver. Add a dedicated binding document rather than adding the compatible and a conditional to snps,dwc3.yaml. This follows the established per-vendor DWC3 convention (apple,dwc3.yaml, socionext,uniphier-dwc3.yaml, ...) and keeps the AST2700-specific constraints - notably the mandatory USB3 PHY - out of the generic schema. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260710-xhci-v2-1-f292c4f7339a@aspeedtech.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-17dt-bindings: usb: cdns3: allow iommus propertyFrank Li
Some SoC such as i.MX8QM have iommu support. Add optional property iommus. Signed-off-by: Frank Li <Frank.Li@nxp.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260709205331.636449-1-Frank.Li@oss.nxp.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-17dt-binding: qcom,snps-dwc3: Add Maili compatible to supported device listKrishna Kurapati
Add Maili compatible to supported device list. Maili has one SuperSpeed USB controller. Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260712-maili-usb-dwc3-binding-v1-1-fd6697fa1e21@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-07-17dt-bindings: gpio: cdns: add Axiado AX3005 GPIO variantSwark Yang
Add binding for Axiado AX3005 GPIO controller. So far, no changes are known, so it can fall back to the cdns,gpio-r1p02 compatible. Signed-off-by: Swark Yang <syang@axiado.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260716-upstream-axiado-ax3005-upstream-v3-2-c429095143ec@axiado.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2026-07-17media: cec/core: add a new CEC_LOG_ADDRS_FL_CONFIG_FAILED flagHans Verkuil
If claiming a logical address fails, then set the CEC_LOG_ADDRS_FL_CONFIG_FAILED flag. This makes it possible for userspace to detect this corner case. Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2026-07-17Documentation: media: vidioc-g-ext-ctrls: clarify try/set behaviorHans Verkuil
It was not clearly stated in the documentation that calling VIDIOC_S_EXT_CTRLS implies an internal VIDIOC_TRY_EXT_CTRLS call. Clarify this. Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org> Acked-by: Linus Walleij <linusw@kernel.org> Link: https://lore.kernel.org/linux-media/20260701-v4l2-doc-v1-1-9cce64b7a1c2@kernel.org/ Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2026-07-17dt-bindings: soc: mobileye: Add EyeQ7H OLBBenoît Monin
The Other Logic Blocks (OLB) found in Mobileye SoCs contain hardware sub-functions grouped in a logical device. The EyeQ7H features 14 such OLB. The main differences with the previous generation of SoC are that some blocks have two clock sources instead of one and that the clock source can be the one of the clock output of another OLB instead of the main oscillator. For the blocks with a single parent clock, the name of that clock is "ref", similar to what is done for the OLB of the previous SoC. The blocks with two parent clocks use either "ref" for the main oscillator, "ref_100p0" for a 100MHz reference clock or "ref_106p6" for 106.6MHz reference clock. Some OLB also contain a reset controller with one or more reset domain, like the blocks found in the EyeQ6H. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Benoît Monin <benoit.monin@bootlin.com>
2026-07-17dt-bindings: rng: Rename the title of the EIP-76 fileMiquel Raynal (Schneider Electric)
Be a little more precise in the title by giving the family name and the own name of the hardware block. Despite the original compatibles, this file describes a SafeXcel EIP-76 hardware random number generator. Signed-off-by: Miquel Raynal (Schneider Electric) <miquel.raynal@bootlin.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-07-17crypto: doc - Remove extra parenthesisManuel Ebner
Remove needless ')' from code block. Fixes: 3b72c814a8e8 ("crypto: doc - convert crypto API documentation to Sphinx") Signed-off-by: Manuel Ebner <manuelebner@mailbox.org> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2026-07-17dma/swiotlb: introduce Kconfig option for compile-time default pool sizeJagadeesh Pagadala
The SWIOTLB bounce buffer pool size is hardcoded at 64 MB via IO_TLB_DEFAULT_SIZE with no compile-time knob to adjust it. On memory-constrained embedded or mobile platforms equipped with a hardware IOMMU (e.g., ARM SMMU) covering most DMA-capable devices, reserving 64 MB at boot is unnecessarily wasteful — the SWIOTLB is only exercised for devices that bypass the IOMMU or have restricted DMA address ranges. Introduce CONFIG_SWIOTLB_DEFAULT_SIZE_MB, an integer Kconfig option (range 1–64 MB, default 64) that allows platforms to set a smaller compile-time default. IO_TLB_DEFAULT_SIZE is updated to derive from this value when CONFIG_SWIOTLB is enabled, preserving the existing 64 MB default when the option is not configured. The runtime "swiotlb=<nslabs>" kernel parameter override remains fully supported and takes precedence over the compile-time default. Signed-off-by: Jagadeesh Pagadala <jpagadal@qti.qualcomm.com> Signed-off-by: Bibek Kumar Patro <bibek.patro@oss.qualcomm.com> Reviewed-by: Michael Kelley <mhklinux@outlook.com> Link: https://lore.kernel.org/r/20260702-swiotlb-v2-1-9205f3ba5408@oss.qualcomm.com Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
2026-07-17drm/xe/xe_ras: Add RAS GPU health indicatorSoham Purkait
Add a sysfs interface that reports the current GPU health state and lets admin users and management tools update it but is readable by all users. Requests are routed through the sysctrl mailbox. The interface is present only on platforms that support the GPU health indicator. The interface is a single read/write file at the device level: $ cat /sys/.../device/gpu_health ok $ echo critical > /sys/.../device/gpu_health $ cat /sys/.../device/gpu_health critical Signed-off-by: Soham Purkait <soham.purkait@intel.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: Raag Jadav <raag.jadav@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> Reviewed-by: Badal Nilawar <badal.nilawar@intel.com> Link: https://patch.msgid.link/20260716073600.674089-4-soham.purkait@intel.com Signed-off-by: Riana Tauro <riana.tauro@intel.com>
2026-07-16dt-bindings: sram: Document qcom,shikra-imem compatibleKomal Bajaj
Add compatible for Shikra SoC IMEM. Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260430-shikra-imem-binding-v1-1-c6976239f90f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-16docs: pt_BR: Translate deprecated interfaces guide to PortugueseDaniel Pereira
Translate the deprecated interfaces, language features, attributes, and conventions document (deprecated.rst) to Portuguese (pt_BR). This ensures Portuguese-speaking developers have access to local guidelines on deprecated APIs (like BUG(), strcpy(), and VLAs), correct usage of safe alternatives (like WARN(), strscpy(), and flexible array members), and modern object allocator macros (kmalloc_obj). Signed-off-by: Daniel Pereira <danielmaraboo@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20260716021013.48025-5-danielmaraboo@gmail.com>
2026-07-16docs: pt_BR: Translate Code of Conduct to PortugueseDaniel Pereira
Translate the Contributor Covenant Code of Conduct document from Documentation/process/code-of-conduct.rst to Portuguese (pt_BR) to ensure the community guidelines are accessible in the local language. Also, add the newly translated file to the main index in the pt_BR translation directory to ensure it compiles correctly within the Sphinx build. Signed-off-by: Daniel Pereira <danielmaraboo@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20260716021013.48025-4-danielmaraboo@gmail.com>
2026-07-16docs: pt_BR: Translate code-of-conduct-interpretation to PortugueseDaniel Pereira
Translate the code-of-conduct-interpretation.rst document from Documentation/process/ to Portuguese (pt_BR) to make the kernel guidelines on community standards and enforcement more accessible to Portuguese-speaking developers. Signed-off-by: Daniel Pereira <danielmaraboo@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20260716021013.48025-3-danielmaraboo@gmail.com>
2026-07-16docs: pt_BR: Translate submit-checklist to PortugueseDaniel Pereira
Translate the submit-checklist document from Documentation/process/ to Portuguese (pt_BR) to make the kernel contribution guidelines more accessible to Portuguese-speaking developers. Also, add the newly translated file to the main index in the pt_BR translation directory to ensure it compiles and links correctly within the Sphinx build. Signed-off-by: Daniel Pereira <danielmaraboo@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20260716021013.48025-2-danielmaraboo@gmail.com>
2026-07-16docs/ja_JP: submitting-patches: Refine wording etc for "splitting changes" ↵Akira Yokosawa
and later Resolve rough edges in translation text added since commit 61e4155c81d1 ("docs/ja_JP: translate more of submitting-patches.rst"). As with commit 999084ee0b11 ("docs/ja_JP: submitting-patches: Amend "Describe your changes""), do the following tweaks: - Rewording and rephrasing. - Suppress extra white spaces rendered before and after strong emphasis in HTML and PDF by using espcaped spaces. - Provide translation words for "embargo", "word-wrap", "top-posting", etc. - Rather than keep "interleaved replies", use only 「インライン返信」 ("inline reply"), which is a popular term in Japanese. Signed-off-by: Akira Yokosawa <akiyks@gmail.com> Cc: Akiyoshi Kurita <weibu@redadmin.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20260715120545.99917-1-akiyks@gmail.com>
2026-07-16Documentation: usb: remove dead link to external USB programming guideUtsav Shankar
The "Programming Guide for Linux USB Device Drivers" was last hosted at lmu.web.psi.ch and is no longer reachable. The original source (TUM, cs.tum.edu) is also defunct. Remove the dead reference rather than link to a third-party archive of a 20+ year old, outdated guide. Signed-off-by: Utsav Shankar <utsaveshan0206@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20260713150544.20962-1-utsaveshan0206@gmail.com>
2026-07-16docs: pt_BR: process: Translate the kernel driver statementIgor Giamoniano
Translate Documentation/process/kernel-driver-statement.rst into Brazilian Portuguese, keeping the reStructuredText formatting and the list of signatories unchanged. Signed-off-by: Igor Giamoniano <igorgphotoarte@gmail.com> Acked-by: Daniel Pereira <danielmaraboo@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20260709222953.9900-1-igorgphotoarte@gmail.com>
2026-07-16dt-bindings: gpu: host1x: Fix email addressThierry Reding
These bindings had mixed up local and domain parts, the combination of which doesn't exist. Fix them up. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-07-16docs: custom.css: don't limit rendering to old 800px monitorsMauro Carvalho Chehab
Right now, base.css style imposes a maximum limit of 800 horizontal pixels to be compatible with very old SVGA monitors. This is not enough to display some tables like pixformat ones on media. Instead, use a more realistic maximum limit. Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Message-ID: <20260711094821.5e262356@foz.lan> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
2026-07-16dt-bindings: iommu: Fix interrupt type in exampleAshish Mhetre
The CMDQV interrupt on Tegra264 is edge-triggered per the hardware interrupt documentation, but the binding example describes it as level-triggered. Correct the example to use IRQ_TYPE_EDGE_RISING so that it does not propagate the wrong trigger type. Fixes: 8a59954192eb ("dt-bindings: iommu: Add NVIDIA Tegra CMDQV support") Reported-by: Nicolin Chen <nicolinc@nvidia.com> Signed-off-by: Ashish Mhetre <amhetre@nvidia.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Nicolin Chen <nicolinc@nvidia.com> Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
2026-07-16docs: maintainers_include: fix entry namesMauro Carvalho Chehab
Right now, it is printing duplicated values as profile entries, as it is not properly handling subsystem name. Fix it. Reported-by: Manuel Ebner <manuelebner@mailbox.org> Closes: https://lore.kernel.org/linux-doc/98a558a87a07ab641f47c66c372ee7ed0735f4f5.camel@mailbox.org/ Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <bb00e9ba66f2d95306e7ca88fdf0f39fcc570cff.1783884625.git.mchehab+huawei@kernel.org>
2026-07-16overlayfs.rst: remove mention of workdir needing to be emptyJesse Van Gavere
This requirement has not been true since v4.8 when automatic cleanup was added in commit eea2fb4851e9 ("ovl: proper cleanup of workdir") Signed-off-by: Jesse Van Gavere <jesse.vangavere@teledyne.com> Reviewed-by: Amir Goldstein <amir73il@gmail.com> Signed-off-by: Jonathan Corbet <corbet@lwn.net> Message-ID: <20260716-overlayfs-rst-update-v2-1-ba25393ea7a3@teledyne.com>
2026-07-16dt-bindings: display: tegra: Add Tegra264 compatible for VICMikko Perttunen
Add nvidia,tegra264-vic compatible string for the VIC on Tegra264. VIC on Tegra264 has a new RISC-V based microcontroller and improved image processing capabilities. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patch.msgid.link/20260622-t264-host1x-v2-2-ff7364d9ff7b@nvidia.com
2026-07-16dt-bindings: display: tegra: Changes to support Tegra264Mikko Perttunen
Add nvidia,tegra264-host1x compatible string. The Tegra264 host1x is similar to Tegra234, but with a different set of engines and layout. The engine register range is no longer continuous, so two range entries are also needed. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patch.msgid.link/20260622-t264-host1x-v2-1-ff7364d9ff7b@nvidia.com
2026-07-16dt-bindings: pinctrl: qcom,milos-lpass-lpi-pinctrl: Add Eliza pinctrlRavi Hothi
Document compatible for Qualcomm Eliza SoC LPASS LPI pin controller. Eliza has the same pin mux functions as Milos but uses a different slew rate register layout where the slew rate field is in the same GPIO config register rather than a separate dedicated register. As a result, Eliza only has a single reg entry instead of two. Signed-off-by: Ravi Hothi <ravi.hothi@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260715132150.1322663-2-ravi.hothi@oss.qualcomm.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
2026-07-16dt-bindings: leds: bcm6358: Convert to DT schemaNinad Naik
Convert the brcm,bcm6358 to DT schema. Signed-off-by: Ninad Naik <ninadnaik07@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260707184437.500278-1-ninadnaik07@gmail.com Signed-off-by: Lee Jones <lee@kernel.org>
2026-07-16dt-bindings: backlight: 88pm860x: Add missing bracketManuel Ebner
Add missing '};' to code. Signed-off-by: Manuel Ebner <manuelebner@mailbox.org> Link: https://patch.msgid.link/20260710112529.435341-2-manuelebner@mailbox.org Signed-off-by: Lee Jones <lee@kernel.org>
2026-07-16dt-bindings: leds: Document "gpio" triggerSamuel Holland
The "gpio" trigger is used to control LEDs by the level of a GPIO input referenced by the trigger-sources property. This is already documented in the trigger-sources property description and is used in at least one devicetree (am335x-regor.dtsi). Document it so validation of those and future DTs will pass. Signed-off-by: Samuel Holland <samuel@sholland.org> Acked-by: Conor Dooley <conor.dooley@microchip.com> Link: https://patch.msgid.link/20260711192842.845048-2-samuel@sholland.org Signed-off-by: Lee Jones <lee@kernel.org>
2026-07-16dt-bindings: arm: ti: Add bindings for Variscite VAR-SOM-AM62Stefano Radaelli
Add devicetree bindings for Variscite VAR-SOM-AM62 System on Module and its carrier boards. Acked-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Stefano Radaelli <stefano.r@variscite.com> Link: https://patch.msgid.link/20d42ed8808c477c79b4d45fea6fd474ee42b06d.1783864932.git.stefano.r@variscite.com Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2026-07-15dt-bindings: clock: qcom: glymur-gcc: Add missing CX power domainAbel Vesa
The GDSCs provided by the Glymur GCC are supplied by the RPMh CX power domain. Model that parent domain in the GCC binding so the provider can describe the dependency in devicetree. Add a single CX power-domain entry to the binding and make it required, matching the hardware description needed by the GCC node. Fixes: ee2d967030fe ("dt-bindings: clock: qcom: document the Glymur Global Clock Controller") Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260715-glymur-fix-gcc-cx-scaling-v3-1-72eb5adad156@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15dt-bindings: media: i2c: Add Sony IMX678Sakari Ailus
Really add Sony IMX678 bindings this time. Those were accidentally missed from commit 447ea0c26e57 ("dt-bindings: media: i2c: Add Sony IMX678") even though the original patch included them. Fixes: 447ea0c26e57 ("dt-bindings: media: i2c: Add Sony IMX678") Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Acked-by: Rob Herring (Arm) <robh@kernel.org> Acked-by: Jai Luthra <jai.luthra@ideasonboard.com>
2026-07-15dt-bindings: arm: qcom: Document Hawi SoC and its reference boardsMukesh Ojha
Add Hawi SoC and its reference boards to the Qualcomm binding. Signed-off-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260617151602.2018579-1-mukesh.ojha@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15dt-bindings: arm: qcom: Add Sony Xperia M2Erikas Bitovtas
Document the Sony Xperia M2, which is a smartphone based on the Qualcomm MSM8926 SoC. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Erikas Bitovtas <xerikasxx@gmail.com> Link: https://lore.kernel.org/r/20260610-yukon-eagle-v4-1-763d5698bd2c@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15dt-binding: document QCOM platforms for CTCU deviceJie Gan
Document the platforms that fallback to using the qcom,sa8775p-ctcu compatible for probing. Signed-off-by: Jie Gan <jie.gan@oss.qualcomm.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20260204-enable-ctcu-and-etr-v3-1-0bb95c590ae1@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15Merge branch '20260624-glymur_camcc-v5-1-a321df74b1a1@oss.qualcomm.com' into ↵Bjorn Andersson
HEAD Merge Glymur clock controller binding from topic branch to get access to constants.
2026-07-15dt-bindings: arm: qcom: Add Vicharak Axon MiniAjit Singh
The Vicharak Axon Mini is a single-board computer based on the Qualcomm QCM6490 platform. Add the top-level compatible string for this board. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Ajit Singh <blfizzyy@gmail.com> Link: https://lore.kernel.org/r/20260624125443.18729-3-blfizzyy@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15dt-bindings: vendor-prefixes: Add prefix for VicharakAjit Singh
Vicharak develops computing platforms and manufactures single-board computers, including FPGA-integrated SBCs. Add a vendor prefix for them. Link: https://vicharak.in/ Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Ajit Singh <blfizzyy@gmail.com> Link: https://lore.kernel.org/r/20260624125443.18729-2-blfizzyy@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15dt-bindings: arm: qcom: Document Shikra and its EVK boardsKomal Bajaj
Shikra is a Qualcomm IoT SoC available in a System-on-Module (SoM) form factor. The SoM integrates the Shikra SoC, PMICs, and essential passives, and is designed to be mounted on carrier boards. Three eSoM variant are introduced: - CQM: retail variant with integrated modem (PM4125 and PM8005 PMIC) - CQS: retail variant without modem (PM4125 and PM8005 PMIC) - IQS: industrial-grade variant without modem (PM8150 PMIC) Each SoM variant pairs with a common EVK carrier board provides debug UART, USB, and other peripheral interfaces. Add compatible strings for the CQ2390M, CQ2390S, IQ2390S SoM variant and its corresponding EVK boards. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Komal Bajaj <komal.bajaj@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260612-shikra-dt-v6-1-6b6cb58db477@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15Merge branch ↵Bjorn Andersson
'20260608-shikra-gcc-rpmcc-clks-v5-2-94cefe092ee3@oss.qualcomm.com' into HEAD Merge Shikra RPM and global clock controller bindings from topic branch to get access to the various constants.
2026-07-15dt-bindings: arm: qcom: Add HONOR MagicBook Art 14Konstantin Shabanov
Document the X1E-80-100 variant of the HONOR MagicBook Art 14. Signed-off-by: Konstantin Shabanov <mail@etehtsea.me> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260629154812.9066-3-mail@etehtsea.me Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15dt-bindings: vendor-prefixes: Add HONORKonstantin Shabanov
Add vendor prefix for Honor Device Co., Ltd. Link: https://www.honor.com/ Signed-off-by: Konstantin Shabanov <mail@etehtsea.me> Acked-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20260629154812.9066-2-mail@etehtsea.me Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-07-15dt-bindings: arm: qcom: Document Eliza CQS SoM and its EVK boardAbel Vesa
Document the compatible strings for the Qualcomm Eliza CQS System-on-Module (SoM) and its EVK board. The SoM is populated with a CQ7790S Eliza variant, PMICs, LPDDR and eMMC. The SoM is then connected to the EVK base board, which provides a multitude of connectors for peripherals. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260630-eliza-dts-qcs-evk-v4-1-18cbbdba6e7e@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-20 23:24:27 +0000