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2026-08-04Merge tag 'amlogic-drivers-for-v7.3' of ↵Arnd Bergmann
https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers Amlogic drivers for v7.3: - Clock measure debugfs fixup - Clock measure support for Amlogic A1 & T7 * tag 'amlogic-drivers-for-v7.3' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: soc: amlogic: meson-clk-measure: remove debugfs tree soc: amlogic: clk-measure: Add A1 and T7 support dt-bindings: soc: amlogic: clk-measure: Add A1 and T7 compatible Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2026-08-04spi: bcm63xx: disable clock on resume failureCan Peng
bcm63xx_spi_resume() enables the controller clock before restarting the SPI controller queue. If spi_controller_resume() fails, the function currently reports success and leaves the clock enabled. Propagate the error and disable the clock before returning. Fixes: b42dfed83d95 ("spi: add Broadcom BCM63xx SPI controller driver") Cc: stable@vger.kernel.org Signed-off-by: Can Peng <pengcan@kylinos.cn> Link: https://patch.msgid.link/20260804071831.860784-1-pengcan@kylinos.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04spi: bcm63xx-hsspi: disable clocks on resume failureCan Peng
bcm63xx_hsspi_resume() enables the HSSPI clock, and optionally the PLL clock, before restarting the SPI controller queue. If spi_controller_resume() fails, the function currently reports success and leaves those clocks enabled. Propagate the error and disable the clocks before returning. Fixes: 142168eba9dc ("spi: bcm63xx-hsspi: add bcm63xx HSSPI driver") Cc: stable@vger.kernel.org Signed-off-by: Can Peng <pengcan@kylinos.cn> Reviewed-by: Kursad Oney <kursad.oney@broadcom.com> Link: https://patch.msgid.link/20260804072017.860974-1-pengcan@kylinos.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04drm/xe/uc: Apply RCS/CCS yield policy to SR-IOV VFsMarcin Bernatowicz
VFs were missing the call to apply the global scheduling policy. Call xe_guc_submit_enable() during vf_uc_load_hw() to ensure VFs get the same policy enforcement as PF. Fixes: 26caeae9fb48 ("drm/xe/guc: Set RCS/CCS yield policy") Suggested-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@linux.intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Link: https://patch.msgid.link/20260709075945.1337660-1-marcin.bernatowicz@linux.intel.com Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> (cherry picked from commit f09360e857130f7ab7f069e2421e6b4a6e502531) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-08-04drm/xe: Fix memory leak in exec_queue_set_hang_replay_state()Michał Winiarski
The q->replay_state is blindly overwritten, which can potentially leak memory that was previously allocated by vmemdup_user(). Return an error if q->replay_state is not empty. Discovered using AI-assisted static analysis confirmed by Intel Product Security. Reported-by: Martin Hodo <martin.hodo@intel.com> Fixes: 1026c1a73a96 ("drm/xe: Implement DRM_XE_EXEC_QUEUE_SET_HANG_REPLAY_STATE") Reviewed-by: Matthew Brost <matthew.brost@intel.com> Link: https://patch.msgid.link/20260624111421.1258364-1-michal.winiarski@intel.com Signed-off-by: Michał Winiarski <michal.winiarski@intel.com> (cherry picked from commit f6b6cc1118bdbc4265fa8b3bdf8565b26f13e56e) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2026-08-04spi: Few cleanups while looking at num-csMark Brown
Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> says: Few minor cleanups for DT bindings and Andes driver. Patches do not have inter-dependencies. Link: https://patch.msgid.link/20260804-spi-num-cs-v1-0-4ccb13dcc7b0@oss.qualcomm.com
2026-08-04spi: atcspi200: Drop redundant andestech,qilai-spi compatibleKrzysztof Kozlowski
"andestech,qilai-spi" compatible can only be used with a fallback, which is already matched by the driver's OF device ID table, thus it is redundant in the driver. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Link: https://patch.msgid.link/20260804-spi-num-cs-v1-5-4ccb13dcc7b0@oss.qualcomm.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04parisc: sba_iommu: Remove dead DEBUG_DMB_TRAP codeMuhammad Usama Anjum
DEBUG_DMB_TRAP is unconditionally undefined, so the guarded declarations and calls can never be built. The declared iterate_pages() and set_data_memory_break() functions also have no definitions in the tree; removing the #undef would therefore leave unresolved references. Remove the unused option and its guarded code. Signed-off-by: Muhammad Usama Anjum <usama.anjum@arm.com> Signed-off-by: Helge Deller <deller@gmx.de>
2026-08-04parisc: superio: Spelling s/Peterson/Petersen/Geert Uytterhoeven
Correct a typo in Martin's surname. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Helge Deller <deller@gmx.de>
2026-08-04remoteproc: qcom: pas: Add Nord ADSP and CDSP supportShawn Guo
Add support for ADSP (HPASS DSP) and 4 CDSPs found on Nord SoC. The ADSP is pre-booted by XBL before Linux starts, so set early_boot flag for attach path rather than a cold boot sequence. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Shawn Guo <shengchao.guo@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260729023508.879752-4-shengchao.guo@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-08-04clk: qcom: Add support for Qualcomm GPU Clock Controller on ShikraImran Shaik
The Qualcomm Shikra GPU clock controller is similar to QCM2290 GPUCC hardware block, with minor differences. Hence add support for Shikra GPUCC by extending the QCM2290 GPUCC driver. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Imran Shaik <imran.shaik@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260718-shikra-dispcc-gpucc-v6-15-62703e05ef0f@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-08-04media: qcom: Switch to generic PAS TZ APIsSumit Garg
Switch qcom media client drivers over to generic PAS TZ APIs. Generic PAS TZ service allows to support multiple TZ implementation backends like QTEE based SCM PAS service, OP-TEE based PAS service and any further future TZ backend service. Reviewed-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> Tested-by: Mukesh Ojha <mukesh.ojha@oss.qualcomm.com> # Lemans Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260702115835.167602-10-sumit.garg@kernel.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2026-08-04pmdomain: Merge branch fixes into nextUlf Hansson
Merge the pmdomain fixes for v7.2-rc[n] into the next branch, to allow them to get tested together with the pmdomain changes that are targeted for the next release. Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-08-04pmdomain: mediatek: Fix mt8183 hang on bootDmitry Osipenko
Depending on firmware, part of the MFG domains may be partially left ON at boot time with kernel detecting PD as ON, while it's OFF. Some of MFG cores may be left powered after bootloader, to let the ACP to prefetch the GPU region when the display controller is brought up for a continuous splash animation performed by downstream stack. This doesn't play well with an eventual delay in probing upstream Panfrost driver when the display controller is fully set up, as that would make genpd's sync_state() to power off the domain while ACP tries to prefetch: this is causing an AXI stall, effectively freezing the AP indefinitely. In order to prevent trouble from happening, the sync_state() functionality must be obliterated on all of the MFG domains: while this guarantees a power leakage if the bootloader boots the kernel with MFG PDs partially powered on, this is the only way to ensure stable operation of the SoC during boot on devices with such firmware because, of course, those will never officially receive a firmware update. Fixes Kappa Chromebook hanging during system boot. Fixes: 0e789b491ba0 ("pmdomain: core: Leave powered-on genpds on until sync_state") Fixes: 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds on until late_initcall_sync") Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-08-04pmdomain: amlogic: Add support for A9 power domains controllerXianwei Zhao
Add support for the A9 power controller, whose registers are in the secure domain and should be accessed via SMC. Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-08-04iommu/arm-smmu-v3: Replace sort_nonatomic() with sort()Kuan-Wei Chiu
The number of master->num_streams per master device is typically very small in practice. Sorting this array takes a very small amount of time, so there is no practical risk of triggering a soft lockup that would necessitate calling cond_resched() during the sort. Replace sort_nonatomic() with the standard sort(). Since this is the only remaining in-tree caller of sort_nonatomic(), this change paves the way to eventually remove the unused sort_nonatomic() API from the core library. Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-08-04drm/shmem_helper: Check VMA boundaries for PMD mappingsChristian A. Ehrhardt
In the ->huge_fault handler do not install a PMD huge page mapping if the huge page exceeds the boundaries of the VMA. All other ->huge_fault handlers have similar checks and the resulting mapping will trigger a VM_BUG_ON_VMA() if it ever reaches copy_pmd_range(). Cc: Pedro Demarchi Gomes <pedrodemargomes@gmail.com> Cc: Boris Brezillon <boris.brezillon@collabora.com> Cc: stable@vger.kernel.org Fixes: fc3bbf34e643 ("drm/shmem-helper: Fix huge page mapping in fault handler") Signed-off-by: Christian A. Ehrhardt <lk@c--e.de> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://patch.msgid.link/20260622215718.1532689-1-lk@c--e.de Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
2026-08-04geneve: Support per-netns netdev unregistration.Kuniyuki Iwashima
geneve_exit_rtnl_net() iterates geneve devices whose sockets are in the dying netns and queues them for destruction. So the devices may reside in different netns. Let's use unregister_netdevice_queue_net() to support per-netns device unregistration. list_del() is changed to list_del_init() to avoid queueing the same device twice. Even after geneve_exit_rtnl_net() queues a cross-netns geneve device, geneve_dellink() can be called concurrently for it. In such a case, __rtnl_net_unlock() will perform the unregistration. Note that geneve uses register_pernet_subsys() instead of _device(), so default_device_exit_batch() guarantees that the async per-netns works are flushed before ->exit(). Tested: 1. Create geneve device across two netns. # ip netns add ns1 # ip netns add ns2 # ip -n ns1 link add geneve0 link-netns ns2 type geneve external 2. Run bpftrace to check that geneve_uninit() is called between ->exit_rtnl() and ->exit(). # bpftrace -e '#include <linux/netdevice.h> kprobe:geneve_uninit { $dev = (struct net_device *)arg0; printf("PID: %d | DEV: %s%s\n", pid, $dev->name, kstack()); } kprobe:geneve_exit_rtnl_net, kprobe:geneve_exit_net { printf("PID: %d%s\n", pid, kstack()); }' 3. Remove the netns where the geneve socket resides # ip netns del ns2 Now, we can see geneve0 is unregistered by per-netns work instead of cleanup_net() and it finishes before ->exit() to avoid WARN_ON_ONCE(!list_empty(&gn->sock_list)) there. PID: 571 geneve_exit_rtnl_net+5 ops_undo_list+702 cleanup_net+1122 process_scheduled_works+2538 ... PID: 1047 | DEV: geneve0 geneve_uninit+5 unregister_netdevice_many_notify+7129 unregister_netdevice_many_net+1050 rtnl_net_work_func+136 process_scheduled_works+2538 ... PID: 571 geneve_exit_net+5 ops_undo_list+1064 cleanup_net+1122 process_scheduled_works+2538 ... Signed-off-by: Kuniyuki Iwashima <kuniyu@google.com> Link: https://patch.msgid.link/20260731164612.2148830-4-kuniyu@google.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-08-04geneve: Protect geneve_net and geneve_sock with per-netns mutex.Kuniyuki Iwashima
struct geneve_dev.net is the netns where the backend geneve socket resides. struct geneve_dev is linked to the geneve_net.geneve_list of the socket's netns. During netns dismantle or module unload, geneve_exit_rtnl_net() iterates the list and queues devices for destruction regardless of devices' netns. Moreover, a socket can be shared by multiple geneve devices in different netns, and geneve_open() and geneve_stop() modify geneve_sock.vni_list and geneve_net.sock_list. Thus, once RTNL is removed, the three lists can be modified concurrently from different netns due to device removal and link-up/down. Let's protect them with per-netns mutex. geneve_newlink() is still protected by rtnl_net_lock()s, so acquiring gn->lock twice in geneve_find_dev() and geneve_configure() is not a problem. Note that udp_tunnel_notify_add_rx_port() is moved outside of the mutex, otherwise gn->lock -> utn->lock ordering would trigger AB-BA deadlock in geneve_offload_rx_ports(), which acquires gn->lock under utn->lock. Even without gn->lock, geneve_sock_add() and geneve_offload_rx_ports() are still serialised with (per-netns) RTNL, so there is no race. Signed-off-by: Kuniyuki Iwashima <kuniyu@google.com> Link: https://patch.msgid.link/20260731164612.2148830-3-kuniyu@google.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-08-04geneve: Unlink geneve->sock[46].hlist[46].hlist in __geneve_sock_release().Kuniyuki Iwashima
Currently, geneve->sock[46].hlist[46] is unliked from geneve_sock.vni_list in geneve_stop() and geneve_sock.refcnt is decremented for each socket later in __geneve_sock_release(). The following patch will introduce a mutex in geneve_net to protect geneve_sock.{refcnt,vni_list}. However, udp_tunnel_notify_del_rx_port() must be outside of the lock to avoid AB-BA deadlock. To make the change cleaner, let's move hlist_del_init_rcu() from geneve_stop() to __geneve_sock_release(). Signed-off-by: Kuniyuki Iwashima <kuniyu@google.com> Link: https://patch.msgid.link/20260731164612.2148830-2-kuniyu@google.com Signed-off-by: Paolo Abeni <pabeni@redhat.com>
2026-08-04mmc: Merge branch fixes into nextUlf Hansson
Merge the mmc fixes for v7.2-rc[n] into the next branch, to allow them to get tested together with the mmc changes that are targeted for the next release. Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-08-04mmc: loongson2: Fix sg iteration in data reorder functionsBinbin Zhou
In ls2k0500_mmc_reorder_cmd_data() and ls2k2000_mmc_reorder_cmd_data(), the for_each_sg() macro already iterates over the scatterlist entries, with 'sg' pointing to the current entry. However, the code incorrectly uses '&sg[i]' and 'sg_dma_len(&sg[i])' inside the loop, which treats 'sg' as an array base and indexes it again, leading to access of wrong sg entries (or out-of-bounds if the list is not an array). Cc: stable@vger.kernel.org Fixes: d0f8e961deae ("mmc: loongson2: Add Loongson-2K2000 SD/SDIO/eMMC controller driver") Fixes: 2115772014bd ("mmc: loongson2: Add Loongson-2K SD/SDIO controller driver") Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-08-04mmc: omap_hsmmc: fix busy_timeout overflow in ns conversion on 32-bitZhan Xusheng
omap_hsmmc_prepare_data() converts the command busy timeout to nanoseconds with: timeout = req->cmd->busy_timeout * NSEC_PER_MSEC; busy_timeout is an unsigned int (milliseconds) and timeout is a u64, but NSEC_PER_MSEC is 1000000L. On 32-bit builds the multiplication is performed in 32-bit arithmetic and wraps for busy_timeout values above ~4294 ms, before the result is assigned to the u64. The driver does not set mmc->max_busy_timeout, so the core does not cap the busy timeout, and commands such as erase or SANITIZE (MMC_SANITIZE_TIMEOUT_MS is 240000 ms) can pass a busy_timeout far larger than 4294 ms. The wrapped, much smaller ns value is then programmed via set_data_timeout(), so the data timeout is set too short and the operation can time out prematurely. Cast busy_timeout to u64 before the multiplication so the conversion is done in 64-bit arithmetic. Fixes: 8cc9a3e73de1 ("mmc: host: omap_hsmmc: use generic_cmd6_time to program timeout value for CMD6") Cc: stable@vger.kernel.org Signed-off-by: Zhan Xusheng <zhanxusheng@xiaomi.com> Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-08-04drivers/perf: hisi: Remove redundant dev_err()/dev_err_probe()Pan Chuang
Since commit 55b48e23f5c4 ("genirq/devres: Add error handling in devm_request_*_irq()"), devm_request_irq() automatically logs detailed error messages on failure. Remove the now-redundant driver-specific dev_err() and dev_err_probe() calls. Signed-off-by: Pan Chuang <panchuang@vivo.com> Acked-by: Yushan Wang <wangyushan12@huawei.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-08-04perf: arm_cspmu: Remove redundant dev_err()Pan Chuang
Since commit 55b48e23f5c4 ("genirq/devres: Add error handling in devm_request_*_irq()"), devm_request_irq() automatically logs detailed error messages on failure. Remove the now-redundant driver-specific dev_err() calls. Signed-off-by: Pan Chuang <panchuang@vivo.com> Reviewed-by: Ilkka Koskinen <ilkka@os.amperecomputing.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-08-04perf: Remove redundant dev_err()/dev_err_probe()Pan Chuang
Since commit 55b48e23f5c4 ("genirq/devres: Add error handling in devm_request_*_irq()"), devm_request_irq() automatically logs detailed error messages on failure. Remove the now-redundant driver-specific dev_err() and dev_err_probe() calls. Signed-off-by: Pan Chuang <panchuang@vivo.com> Reviewed-by: Shuai Xue <xueshuai@linux.alibaba.com> Acked-by: Frank Li <Frank.Li@kernel.org> Reviewed-by: Xu Yang <xu.yang_2@nxp.com> Signed-off-by: Will Deacon <will@kernel.org>
2026-08-04spi: cadence-xspi: remove 64BIT dependencyMark Brown
Jisheng Zhang <jszhang@kernel.org> says: Currently, cadence-xspi depends on 64BIT. This dependency isn't from cadence xspi controller itself, but from marvell support code and 64bit slave dma interface performance optimization. This series tries to remove the 64BIT dependency. patch1 is the preparation patch to move some code so we can group marvell support code together. No functionality change. patch2 and patch3 remove the two causes of 64BIT dependency. patch4 finally removes the 64BIT Kconfig dependency. Link: https://patch.msgid.link/20260803140728.12747-1-jszhang@kernel.org
2026-08-04spi: cadence-xspi: remove 64BIT Kconfig dependencyJisheng Zhang
Now everything is ready, we can remove 64BIT Kconfig dependency now. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Link: https://patch.msgid.link/20260803140728.12747-5-jszhang@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04spi: cadence-xspi: only use readsq/writesq under 64BITJisheng Zhang
Currently, cadence-xspi depends on 64BIT. This dependency isn't from cadence xspi controller itself, but from marvell support code and 64bit slave dma interface performance optimization. readsq and writesq are only available under 64BIT. For 32BIT platforms, we can fallback to ioread32_rep/iowrite32_rep. So we can remove another reason of the 64BIT dependency. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Link: https://patch.msgid.link/20260803140728.12747-4-jszhang@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04spi: cadence-xspi: put marvell support code under CONFIG_64BITJisheng Zhang
Currently, cadence-xspi depends on 64BIT. This dependency isn't from cadence xspi controller itself, but from marvell support code and 64bit slave dma interface performance optimization. Put marvell support code under CONFIG_64BIT to remove one reason of the 64BIT dependency. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Link: https://patch.msgid.link/20260803140728.12747-3-jszhang@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04spi: cadence-xspi: group marvell support code togetherJisheng Zhang
We will remove the 64BIT dependency from cadence-xspi for non marvell platform soon. No functionality change. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Link: https://patch.msgid.link/20260803140728.12747-2-jszhang@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04mmc: atmel-mci: Fix use-after-free in atmci_remove due to race conditionPei Xiao
In atmci_probe, &host->bh_work is bound with atmci_work_func, and atmci_interrupt, atmci_timeout_timer and atmci_dma_complete can all queue this work on system_bh_wq. If we remove the module, atmci_remove makes cleanup and the memory allocated for host with devm_kzalloc() is released after the remove callback returns, while the work mentioned above may still be pending or running. The sequence of operations that may lead to a UAF bug is as follows: CPU0 CPU1 | atmci_interrupt | queue_work(system_bh_wq, | &host->bh_work) atmci_remove | atmci_cleanup_slot(...) | atmci_writel(host, ATMCI_IDR, ~0UL) | timer_delete_sync(&host->timer) | dma_release_channel(host->dma.chan) | free_irq(platform_get_irq(pdev, 0), host) | | atmci_work_func | // use host // devm resources released after | // remove returns, host is freed | | // use host (use-after-free) Fix it by canceling the work after all the sources that can schedule it (IRQ handler, timeout timer and DMA completion callback) have been stopped, and before proceeding with the remaining cleanup in atmci_remove. Fixes: 7d2be0749a59 ("atmel-mci: Driver for Atmel on-chip MMC controllers") Assisted-by: Codex:deepseek-v4-flash Signed-off-by: Pei Xiao <xiaopei01@kylinos.cn> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-08-04ublk: clear auto buf reg before updating io->buf in batch commitYang Xiuwei
ublk_batch_commit_io() stored the new auto_buf into io->buf before calling ublk_clear_auto_buf_reg(). Clear takes the unregister index from io->buf.auto_reg, so it could drop the new slot and leave the old registered buffer behind. Fixes: 1e500e106d5a ("ublk: handle UBLK_U_IO_COMMIT_IO_CMDS") Signed-off-by: Yang Xiuwei <yangxiuwei@kylinos.cn> Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-08-04zloop: truncate finished zones to zone capacityXu Rao
The size of a sequential zone backing file records the amount of data written and is used to restore the zone state. A backing file whose size is equal to the zone capacity is restored as a full zone, while a file larger than the zone capacity is rejected as invalid. However, zloop_finish_zone() currently truncates the backing file to the zone size. For devices with a reduced zone capacity, finishing a zone therefore creates a backing file larger than the zone capacity. After the device is removed and later re-added, that zone file is rejected instead of being restored as a full zone. Truncate finished sequential zones to the zone capacity, matching the persistent representation accepted by zloop_update_seq_zone() for a full zone. Suggested-by: Damien Le Moal <dlemoal@kernel.org> Fixes: eb0570c7df23 ("block: new zoned loop block device driver") Cc: stable@vger.kernel.org Signed-off-by: Xu Rao <raoxu@uniontech.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Damien Le Moal <dlemoal@kernel.org> Link: https://patch.msgid.link/B39E5FD81D1A07F4+20260804023403.939767-1-raoxu@uniontech.com Signed-off-by: Jens Axboe <axboe@kernel.dk>
2026-08-04spi: Add support for StarFive JHB100 SFCMark Brown
Changhuang Liang <changhuang.liang@starfivetech.com> says: This serial add support for the StarFive JHB100 SoC SPI Flash Controller (SFC), which is based on the Synopsys DesignWare SSI version 2.00a but with some customizations and it also add enhanced SPI for DesignWare SPI controllers. I picked up some patches from series [1]. This series depends on the series [2]: [1] https://lore.kernel.org/all/20221212180732.79167-1-sudip.mukherjee@sifive.com/ [2] https://lore.kernel.org/all/20260521012932.24163-1-changhuang.liang@starfivetech.com/ v1: https://lore.kernel.org/all/20260709055204.138168-1-changhuang.liang@starfivetech.com/ Link: https://patch.msgid.link/20260803124044.156998-1-changhuang.liang@starfivetech.com
2026-08-04spi: dw: Add support for StarFive JHB100 SoC SFCChanghuang Liang
Add support for the StarFive JHB100 SoC SPI Flash Controller (SFC), which is based on the Synopsys DesignWare SSI version 2.00a but with some customizations. The JHB100 SFC controller has the following special features: 1. Separate registers for instruction and address (DW_SPI_JHB100_INST and DW_SPI_JHB100_ADDR) instead of using the common data register. 2. A filter interrupt mask register (DW_SPI_JHB100_FILTER_IMR), which is default masked to disable filter interrupts as they are not used. 3. Requires a system controller phandle "starfive,sfc-filter-syscon" to configure 3-byte/4-byte address mode switching per chip select. 4. Different Set CS and Enable Controller Timing. A new quirk flag DW_SPI_QUIRK_JHB100 is introduced to handle these differences in the enhanced SPI memory operation path. The controller uses the HSSI initialization path (DW_HSSI_ID) and shares the same interrupt masking logic. Limit the JHB100 SFC address to 3-byte or 4-byte length. Additionally, the platform_suspend() and platform_resume() callbacks are introduced to handle platform-private suspend/resume procedures. Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Link: https://patch.msgid.link/20260803124044.156998-12-changhuang.liang@starfivetech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04spi: dw: detect enhanced spi modeSudip Mukherjee
All the SSI controllers supporting enhanced spi modes might not support all the three dual or quad or octal modes. Detect the modes that are supported and finally enable the DW_SPI_CAP_EMODE capability which will start using all the enhanced spi functions that has been added. Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com> Co-developed-by: Changhuang Liang <changhuang.liang@starfivetech.com> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Link: https://patch.msgid.link/20260803124044.156998-10-changhuang.liang@starfivetech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04spi: dw: use irq handler for enhanced spiSudip Mukherjee
Introduce the interrupt handler for enhanced spi to read or write based on the generated irq. Also, use the xfer_completion from spi_controller to wait for a timeout or completion from irq handler. In enhanced mode we need to calculate RXFTLR based on the length of data we are expecting to receive or the fifo length. Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com> Co-developed-by: Changhuang Liang <changhuang.liang@starfivetech.com> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Link: https://patch.msgid.link/20260803124044.156998-9-changhuang.liang@starfivetech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04spi: dw: send cmd and addr to start the spi transferSudip Mukherjee
In enhanced spi mode, read or write will start by sending the cmd and address (if present). Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com> Co-developed-by: Changhuang Liang <changhuang.liang@starfivetech.com> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Link: https://patch.msgid.link/20260803124044.156998-8-changhuang.liang@starfivetech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04spi: dw: Introduce enhanced single/dual/quad/octal spiSudip Mukherjee
If the spi transfer is using enhanced single/dual/quad/octal spi mode, then we need to update the SPI_CTRLR0 register. The SPI_CTRLR0 register will be updated in dw_spi_update_config() via the values in dw_spi_enh_cfg. Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com> Co-developed-by: Changhuang Liang <changhuang.liang@starfivetech.com> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Link: https://patch.msgid.link/20260803124044.156998-7-changhuang.liang@starfivetech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04spi: dw: update NDF while using enhanced spi modeSudip Mukherjee
If the transfer of Transmit only mode is using enhanced SPI then NDF needs to be updated with the number of data frames. If the Transmit FIFO goes empty in-between, DWC_ssi masks the serial clock and wait for rest of the data until the programmed amount of frames are transferred successfully. In receive mode, the number of data frames received is equal to this register value plus 1. In transmit mode, the number of data frames is equal this register value. Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com> Co-developed-by: Changhuang Liang <changhuang.liang@starfivetech.com> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Link: https://patch.msgid.link/20260803124044.156998-6-changhuang.liang@starfivetech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04spi: dw: adjust size of mem_opSudip Mukherjee
In enhanced mode adjust the size of the data that can be sent or received as this will then be used to set the NDF. Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com> Co-developed-by: Changhuang Liang <changhuang.liang@starfivetech.com> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Link: https://patch.msgid.link/20260803124044.156998-5-changhuang.liang@starfivetech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04spi: dw: add check for support of enhanced spiSudip Mukherjee
Before doing the mem op, spi controller will be queried about the buswidths it supports. Add the single/dual/quad/octal if the controller has the DW_SPI_CAP_EMODE capability. The DW_SPI_CAP_EMODE capability will be enabled in a later patch. Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com> Co-developed-by: Changhuang Liang <changhuang.liang@starfivetech.com> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Link: https://patch.msgid.link/20260803124044.156998-4-changhuang.liang@starfivetech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04spi: dw: update SPI_CTRLR0 registerSudip Mukherjee
If the SPI transfer is being done in enhanced mode then SPI_CTRLR0 register needs to be updated to mention the instruction length, address length, address and instruction transfer format, wait cycles. And, we also need to enable clock stretching. Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com> Co-developed-by: Changhuang Liang <changhuang.liang@starfivetech.com> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Link: https://patch.msgid.link/20260803124044.156998-3-changhuang.liang@starfivetech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04spi: dw: Introduce spi_frf and STD_SPISudip Mukherjee
The DW APB SSI controllers of v4.x and newer and DW AHB SSI controllers supports enhanced SPI modes which can be defined from SPI_FRF of DW_SPI_CTRLR0 register. Without enhanced mode, these controllers will work in the standard spi mode. Signed-off-by: Sudip Mukherjee <sudip.mukherjee@sifive.com> Co-developed-by: Changhuang Liang <changhuang.liang@starfivetech.com> Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com> Link: https://patch.msgid.link/20260803124044.156998-2-changhuang.liang@starfivetech.com Signed-off-by: Mark Brown <broonie@kernel.org>
2026-08-04mmc: sdhci: unmap the bounce buffer before device releaseMyeonghun Pak
sdhci_allocate_bounce_buffer() allocates its buffer with devm_kmalloc() but maps it with dma_map_single(). The buffer is therefore released by devres without the streaming DMA mapping being unmapped. Register a managed action after dma_map_single() succeeds so the mapping is removed before devres releases the buffer. The action is registered only for buffers allocated and mapped by the SDHCI core, leaving buffers provided by host drivers under their existing ownership. Fixes: bd9b902798ab ("mmc: sdhci: Implement an SDHCI-specific bounce buffer") Cc: stable@vger.kernel.org Co-developed-by: Ijae Kim <ae878000@gmail.com> Signed-off-by: Ijae Kim <ae878000@gmail.com> Signed-off-by: Myeonghun Pak <mhun512@gmail.com> Reviewed-by: Linus Walleij <linusw@kernel.org> Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-08-04mmc: sdhci: make tuning_err a signed intHaibo Chen
Coverity report INTEGER_OVERFLOW for host->tuning_err. The tuning_err field in struct sdhci_host is used to store an error code for re-tuning, but it was declared as unsigned int. Several call sites store negative error codes into it and later compare against negative values: - sdhci.c, sdhci-of-dwcmshc.c and sdhci-pci-gli.c assign it the return value of __sdhci_execute_tuning()/__sdhci_execute_tuning_9750(), both of which return a signed int (possibly a negative errno); - sdhci-of-esdhc.c assigns host->tuning_err = -EAGAIN and later does "ret = host->tuning_err; if (ret == -EAGAIN ...)"; - sdhci-of-dwcmshc.c prints it with the %d (signed) conversion. Storing a negative errno in an unsigned int and reading it back as a signed int only happens to work because of two's-complement, same-width integer conversions. It is misleading and triggers sign-conversion warnings. All users treat the value either as a signed error code or as a boolean (zero / non-zero), so changing the type to a signed int is safe and makes the intent explicit. Fixes: 7d8bb1f46e13 ("mmc: sdhci: add tuning error codes") Assisted-by: Cline:claude-sonnet [read_file, search_files, git] Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Reviewed-by: Frank Li <Frank.Li@nxp.com> Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-08-04drm/omap: dsi: Do not copy isr tableAndreas Kemnade
To be able to unregister stuff from isrs, the corresponding table was copied. Nobody seems to unregister stuff that way, so it does not help. But there are stack-allocated objects passed to these isrs giving chances of UAF of these objects if irqs are unregistered while they are handled, so better do not copy that table. Fixes: 4ae2ddddf44cd ("OMAP: DSS2: DSI: Add ISR support") Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Link: https://patch.msgid.link/20260702-dsi-uaf-v2-1-dbb4aa0f0b8e@kemnade.info Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
2026-08-04ata: use named initializers for acpi_device_idPawel Zalewski (The Capable Hub)
Use a named initializer for the acpi_device_id fields which makes the code more readable and consistent with how lists are initialized in the rest of the kernel code base. Also drop explicitly setting fields to 0 where it is redundant. While we are at it - unify the list terminator to have a single space between the brackets and no trailing comma. Signed-off-by: Pawel Zalewski (The Capable Hub) <pzalewski@thegoodpenguin.co.uk> Reviewed-by: Niklas Cassel <cassel@kernel.org> Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2026-08-04fpga: altera-cvp: Avoid out-of-bounds read in trailing byte writeDaisuke Matsuda
The trailing byte path in altera_cvp_send_block() dereferences a u32 pointer even when only 1-3 bytes remain in the input buffer. If the buffer ends at a page or scatterlist boundary, this can read past the valid image data and fault. Copy the remaining bytes into a zero-initialized u32 before writing the final word so only valid bytes are read from the input buffer. Fixes: 34d1dc17ce97 ("fpga manager: Add Altera CvP driver") Cc: stable@vger.kernel.org Signed-off-by: Daisuke Matsuda <matsuda@preferred.jp> Reviewed-by: Xu Yilun <yilun.xu@intel.com> Link: https://lore.kernel.org/r/20260723081912.74082-1-dskmtsd@gmail.com Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>