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2026-08-03serial: 8250_mxpcie: implement rx_trig_bytes callbacks via MUEx50 RTLCrescent Hsieh
The MUEx50 UART exposes a programmable RX trigger level via the RTL register. Implement uart_port RX trigger set/get callbacks for the mxpcie driver and wire them up to the generic rx_trig_bytes sysfs interface. Store the configured trigger level in the per-port private data. Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com> Link: https://patch.msgid.link/20260731074820.735619-15-crescentcy.hsieh@moxa.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: 8250_mxpcie: introduce per-port private data structureCrescent Hsieh
Introduce a private per-port data structure for the mxpcie driver and replace the shared flexible array of registered lines with an array of per-port objects. This prepares the driver for storing per-port state needed by subsequent features. No functional change intended. Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com> Link: https://patch.msgid.link/20260731074820.735619-14-crescentcy.hsieh@moxa.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: 8250: allow UART drivers to override rx_trig_bytes handlingCrescent Hsieh
The rx_trig_bytes sysfs attribute currently relies on 8250-internal helper functions and assumes a fixed mapping between trigger levels and FIFO behavior. Some UARTs provide hardware-specific RX trigger mechanisms that do not fit this model. Add optional uart_port callbacks for setting and getting the RX trigger level, and use them when provided, while preserving the existing 8250 helpers as the default fallback. Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com> Link: https://patch.msgid.link/20260731074820.735619-13-crescentcy.hsieh@moxa.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: 8250_mxpcie: add break support for RS485 using MUEx50 featuresCrescent Hsieh
On MUEx50, break signaling under RS485 requires a driver-specific sequence and cannot be handled correctly by the generic 8250 break implementation alone. Implement a mxpcie break_ctl callback that performs MUEx50-specific break handling when RS485 is enabled and fall back to the default 8250 break handling for other modes. Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com> Link: https://patch.msgid.link/20260731074820.735619-12-crescentcy.hsieh@moxa.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: 8250: allow low-level drivers to override break controlCrescent Hsieh
Some UARTs require driver-specific handling for break signaling, which cannot be expressed by the generic 8250 break implementation alone. Add an optional uart_port break_ctl callback and route serial8250_break_ctl() through it when provided. Rename the existing 8250 implementation to serial8250_do_break_ctl() and export it so low-level drivers can reuse the default 8250 behavior when appropriate. Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com> Link: https://patch.msgid.link/20260731074820.735619-11-crescentcy.hsieh@moxa.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: 8250_mxpcie: support serial interface mode switchingCrescent Hsieh
Moxa PCIe multiport serial boards support switching the serial interface mode between RS232, RS422, RS485-2W, and RS485-4W via on-board control registers. Implement an rs485_config() callback and map TIOCSRS485 requests to the corresponding hardware modes using serial_rs485 flags: - RS232 = (no flags set) - RS422 = SER_RS485_ENABLED | SER_RS485_MODE_RS422 - RS485_2W (half-duplex) = SER_RS485_ENABLED - RS485_4W (full-duplex) = SER_RS485_ENABLED | SER_RS485_RX_DURING_TX This allows users to reconfigure the serial mode at runtime via ioctl(). Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com> Link: https://patch.msgid.link/20260731074820.735619-10-crescentcy.hsieh@moxa.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: 8250_mxpcie: speed up TX using memory-mapped FIFO windowCrescent Hsieh
The MUEx50 UART provides a memory-mapped TX FIFO data window along with a TX FIFO level counter. Fill the TX FIFO in bulk via the MMIO FIFO window based on available FIFO space, using uart_port_tx_limited() for the common serial-core TX handling. Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com> Link: https://patch.msgid.link/20260731074820.735619-9-crescentcy.hsieh@moxa.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: 8250_mxpcie: speed up RX using memory-mapped FIFO windowCrescent Hsieh
The MUEx50 UART provides a memory-mapped RX FIFO data window along with an RX FIFO byte counter. When no break or error conditions are present, read received data in bulk via the MMIO FIFO window and push it to the tty layer in one operation. Fall back to the generic 8250 RX path for break and error handling. Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com> Link: https://patch.msgid.link/20260731074820.735619-8-crescentcy.hsieh@moxa.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: 8250_mxpcie: add custom handle_irq callbackCrescent Hsieh
Add a mxpcie-specific handle_irq() implementation for Moxa PCIe serial ports. This keeps the interrupt handling self-contained in the driver and provides a hook point for MUEx50-specific RX/TX paths added in subsequent patches. The handler processes RX, updates modem status, and handles TX when THRE is asserted. Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com> Link: https://patch.msgid.link/20260731074820.735619-7-crescentcy.hsieh@moxa.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: 8250_mxpcie: offload XON/XOFF flow control to MUEx50 hardwareCrescent Hsieh
The MUEx50 UART can handle in-band software flow control (XON/XOFF) directly in hardware. Program the on-chip XON/XOFF characters from termios settings and enable the corresponding MUEx50 flow control modes when IXON or IXOFF is requested. Provide throttle and unthrottle callbacks so RX can be stopped and resumed cleanly. Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com> Link: https://patch.msgid.link/20260731074820.735619-6-crescentcy.hsieh@moxa.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: 8250_mxpcie: enable automatic RTS/CTS flow controlCrescent Hsieh
The MUEx50 UART supports automatic RTS/CTS flow control via the enhanced feature register. Implement a mxpcie-specific set_termios() callback that enables MUEx50 auto-RTS/auto-CTS when CRTSCTS is requested and disables it otherwise. Keep the 8250 port status flags in sync with the hardware configuration. Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com> Link: https://patch.msgid.link/20260731074820.735619-5-crescentcy.hsieh@moxa.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: 8250_mxpcie: enable enhanced mode and program FIFO trigger levelsCrescent Hsieh
The MUEx50 UART provides an enhanced register set and programmable FIFO trigger levels for RX, TX, and flow control. Enable enhanced mode during port startup and program the MUEx50 FIFO trigger registers according to the configured port settings. Clear the programmed state again during shutdown to restore the default UART configuration. The TX FIFO write pointer and read pointer are driven by different clocks. Clear the FIFOs repeatedly during startup so both pointers are reset before programming the trigger levels. Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com> Link: https://patch.msgid.link/20260731074820.735619-4-crescentcy.hsieh@moxa.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: 8250: add Moxa MUEx50 UART port typeCrescent Hsieh
Add a new 8250 port type for the Moxa MUEx50 UART and describe its basic FIFO size and trigger characteristics in the 8250 port configuration table. The 8250_mxpcie driver sets UPF_FIXED_TYPE and uses PORT_MUEX50 so that the generic 8250 core applies the correct defaults. Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com> Link: https://patch.msgid.link/20260731074820.735619-3-crescentcy.hsieh@moxa.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: 8250: split Moxa PCIe serial board support out of 8250_pciCrescent Hsieh
The Moxa PCIe multiport serial boards are currently handled as part of 8250_pci.c. In preparation for adding Moxa-specific UART features and optimizations, move the Moxa PCIe implementation into a dedicated driver. This introduces drivers/tty/serial/8250/8250_mxpcie.c and wires it up via Kconfig and Makefile, while preserving the existing probe flow and device IDs. This change was suggested during earlier reviews by Andy Shevchenko [1][2]. No functional change intended. Link: https://lore.kernel.org/all/ZmQovC6TbDpTb3c8@surfacebook.localdomain/ [1] Link: https://lore.kernel.org/all/CAHp75VeDsVt0GQYUFxLM+obfmqXBPa3hM3YMsFbc26uzWZG-SQ@mail.gmail.com/ [2] Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Crescent Hsieh <crescentcy.hsieh@moxa.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://patch.msgid.link/20260731074820.735619-2-crescentcy.hsieh@moxa.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: qcom-geni: Use geni_se_set_perf_level() for baud rate perf levelPraveen Talari
The driver implements its own helper to select the performance level corresponding to a requested baud rate. The helper duplicates functionality already provided by geni_se_set_perf_level() in the GENI core. Replace the local implementation with the common helper and remove the associated duplicate definitions and code. This consolidates performance-level management in the GENI framework and reduces driver specific code. Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com> Link: https://patch.msgid.link/20260801-reuse_common_geni_framework_helpers-v2-3-13753256ef71@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: qcom-geni: Use resources helper APIs in runtime PM functionsPraveen Talari
To manage GENI serial engine resources during runtime power management, drivers currently need to call functions for ICC, clock, and SE resource operations in both suspend and resume paths, resulting in code duplication across drivers. The new geni_se_resources_activate() and geni_se_resources_deactivate() helper APIs addresses this issue by providing a streamlined method to enable or disable all resources based, thereby eliminating redundancy across drivers. Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com> Link: https://patch.msgid.link/20260801-reuse_common_geni_framework_helpers-v2-2-13753256ef71@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: qcom-geni: Use common GENI resource initialisation helpersPraveen Talari
The UART driver maintains local helpers for resource and power-domain initialisation that duplicate functionality already provided by the common GENI framework. Replace the driver-specific implementations with geni_se_resources_init() and geni_se_domain_attach(), and use the power-domain list stored in struct geni_se. This reduces code duplication and centralises GENI resource management without functional changes. Signed-off-by: Praveen Talari <praveen.talari@oss.qualcomm.com> Link: https://patch.msgid.link/20260801-reuse_common_geni_framework_helpers-v2-1-13753256ef71@oss.qualcomm.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: amba-pl011: keep console clock enabled for atomic writesKarl Mehltretter
pl011_console_write_atomic() runs from nbcon atomic context, where sleeping is not allowed. It calls clk_enable(), which takes the common-clk enable_lock. Under PREEMPT_RT that is a sleeping lock: clk_enable_lock() first tries spin_trylock_irqsave(), but on contention falls back to spin_lock_irqsave(). Therefore, an atomic-context printk on an RT kernel with a clk-backed pl011 can trip: BUG: sleeping function called from invalid context at spinlock_rt.c:48 __might_resched from rt_spin_lock rt_spin_lock from clk_enable_lock clk_enable_lock from clk_enable clk_enable from pl011_console_write_atomic ... from vprintk_emit This was found and reproduced on PREEMPT_RT. Arm32 and arm64 DT SoCs are affected; arm64 SBSA/ACPI has no clk, so clk_enable(NULL) short-circuits before the lock. In addition, write_atomic() may be invoked from NMI context and is documented to avoid locking. Removing clk_enable() from the callback also avoids a potentially unsafe NMI acquisition of the common-clock enable_lock. An nbcon atomic-capable console must be printable from any context, so the clock cannot be gated between writes. Enable the clock while the console is available for output: use clk_prepare_enable() in pl011_console_setup(), release it via clk_disable_unprepare() in the console .exit() callback, and drop the per-write clk_enable()/clk_disable() pairs from write_atomic() and write_thread(). When printk suspends consoles, drop the reference after uart_suspend_port() stops console access and restore it before uart_resume_port() -- but only if suspend actually marked the port suspended (a wake-capable tty stays running and must keep its clock), and keep it when console_suspend_enabled is false so no_console_suspend works. The active power cost of keeping the clock enabled is platform-dependent: none where the UART clock is a fixed always-on oscillator, real where it is a gateable clock branch, which then cannot be gated (nor possibly can its parent clocks) while the console is available for output. When serial core actually suspends the port, the reference is released so the clock provider can gate the clock tree. Fixes: 2eb2608618ce ("serial: amba-pl011: Implement nbcon console") Suggested-by: John Ogness <john.ogness@linutronix.de> Link: https://lore.kernel.org/all/8733xeaxix.fsf@jogness.linutronix.de/ Assisted-by: Claude:claude-fable-5 Signed-off-by: Karl Mehltretter <kmehltretter@gmail.com> Link: https://patch.msgid.link/20260724213348.77418-3-kmehltretter@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: amba-pl011: unprepare console clock on unregisterKarl Mehltretter
pl011_console_setup() calls clk_prepare() on the UART clock, but the console provides no matching teardown, so the clock is never unprepared when the console is unregistered -- via the sysfs "console" attribute or a driver unbind. Each re-registration prepares the clock again, leaking one prepare reference per cycle. Even where preparing the clock has no hardware effect, the stale reference leaves the clock framework's prepare count unbalanced. For providers with prepare/unprepare operations or runtime-PM integration, it may also retain resources after the console is unregistered. Add a console .exit() callback that clk_unprepare()s the clock, balancing the clk_prepare() in pl011_console_setup(). Fixes: 4b4851c65d92 ("clk: amba-pl011: convert to clk_prepare()/clk_unprepare()") Assisted-by: Claude:claude-fable-5 Signed-off-by: Karl Mehltretter <kmehltretter@gmail.com> Link: https://patch.msgid.link/20260724213348.77418-2-kmehltretter@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: 8250_mtk: honor DT serial aliasesCarlo Caione
The Genio board DTs provide serial aliases for all enabled UARTs, but the MTK 8250 driver still registered every port with the default line number. If uart0 deferred and another UART probed first, the 8250 core could still assign ttyS0 to the wrong port despite the DT aliases. Read the serial alias during OF probe and seed uart.port.line before registering the port so the 8250 core reserves the requested ttyS slot. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://patch.msgid.link/20260727-ccaione-genio-serial-aliases-v2-2-0f2ae41a8e89@baylibre.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: amba-pl011: synchronize DMA teardownFan Wu
dmaengine_terminate_all() does not wait for a running callback, so the TX callback can still touch the TX buffer after it is freed. The RX poll timer reads the RX buffers without the port lock. Switch to dmaengine_terminate_sync() and delete the RX timer before freeing the buffers. Fixes: ead76f329f77 ("ARM: 6763/1: pl011: add optional RX DMA to PL011 v2") Cc: stable <stable@kernel.org> Assisted-by: Codex:gpt-5.6 Signed-off-by: Fan Wu <fanwu01@zju.edu.cn> Link: https://patch.msgid.link/20260731085915.326775-4-fanwu01@zju.edu.cn Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: amba-pl011: cancel RS485 hrtimers after freeing IRQFan Wu
The RS485 trigger hrtimers are embedded in the devm-managed port and can fire after it is freed. The IRQ handler can arm a timer, so free the IRQ first and then cancel both timers. Complete the RS485 stop without arming a timer, and cancel the timers in remove() for the suspend-then-unbind path, where shutdown is not called. This issue was found by an in-house static analysis tool. Fixes: 2c1fd53af21b ("serial: amba-pl011: Fix RTS handling in RS485 mode") Cc: stable <stable@kernel.org> Assisted-by: Codex:gpt-5.6 Signed-off-by: Fan Wu <fanwu01@zju.edu.cn> Link: https://patch.msgid.link/20260731085915.326775-3-fanwu01@zju.edu.cn Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: amba-pl011: fix indefinite RS485 post-send delayFan Wu
The RS485 stop hrtimer is used both to drain the transmitter and to wait out delay_rts_after_send. The callback cannot tell the two apart, so it restarts the post-send delay on every expiry and the timer never stops. Add a WAIT_AFTER_SEND_DELAY state so its expiry ends the stop sequence instead of restarting the delay. Fixes: 2c1fd53af21b ("serial: amba-pl011: Fix RTS handling in RS485 mode") Cc: stable <stable@kernel.org> Assisted-by: Codex:gpt-5.6 Signed-off-by: Fan Wu <fanwu01@zju.edu.cn> Link: https://patch.msgid.link/20260731085915.326775-2-fanwu01@zju.edu.cn Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03vt: add permission check for KDSKBMETA ioctlJoshua Rogers
KDSKBMETA modifies keyboard meta mode but lacks the !perm check that all other keyboard setter ioctls in vt_k_ioctl() enforce, allowing a process to change meta mode on a non-controlling console without authorization. Assisted-by: AISLE:Snapshot Cc: stable <stable@kernel.org> Signed-off-by: Joshua Rogers <linux@joshua.hu> Link: https://patch.msgid.link/20260731-tty-vt-stuff-v1-2-be99b9da8e30@linuxfoundation.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03vt: stabilize tty reference in kbd_keycode with tty_port_tty_getJoshua Rogers
kbd_keycode() reads vc->port.tty without acquiring a tty reference, racing against con_shutdown() which clears port.tty under a different lock. Use tty_port_tty_get()/tty_kref_put() to hold a proper reference for the duration the tty pointer is needed. Assisted-by: AISLE:Snapshot Signed-off-by: Joshua Rogers <linux@joshua.hu> Cc: stable <stable@kernel.org> Link: https://patch.msgid.link/20260731-tty-vt-stuff-v1-1-be99b9da8e30@linuxfoundation.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03serial: 8250_of: clear stuck empty-FIFO RX-timeout on LPC32xxRyan Wilbur
The NXP LPC32xx UART (PORT_LPC3220) can latch an RX character-timeout interrupt while the RX FIFO is empty: IIR reports UART_IIR_RX_TIMEOUT (0x0c) but LSR.DR is clear. A character timeout is only cleared by reading RHR, but serial8250_rx_chars() reads RHR only when LSR.DR is set, so nothing ever clears the condition. The interrupt is level-triggered and re-fires immediately, so on a single-core ARM926 the resulting interrupt storm livelocks the CPU. It is reproducible when userspace repeatedly opens the front-panel port (ttyS1): serial8250_do_set_termios() re-enables interrupts on unlock and the handler then spins forever with iir=0xcc lsr=0x60 ier=0x05, tripping the soft-lockup detector in serial8250_handle_irq_locked(). LPC32xx has no dedicated 8250 glue driver, it's driven by the generic 8250_of. Add a hardware specific handle_irq for PORT_LPC3220, wired up in of_platform_serial_setup() the same way fsl8250_handle_irq is installed. The handler follows dw8250_handle_irq(): on an RX timeout with an empty FIFO (LSR.DR and LSR.BI clear) it does one throwaway RHR read to clear the condition, then calls serial8250_handle_irq_locked(). No real received data is ever discarded, and it is a no-op on healthy UARTs which never report a timeout with DR clear. This is the same class of bug already worked around in other 8250 drivers; see commit 424d79183af0 ("serial: 8250_dw: Avoid "too much work" from bogus rx timeout interrupt") which reports the identical iir=0xcc/lsr=0x60. See also UART_RX_TIMEOUT_QUIRK in 8250_omap, and the note in 8250_bcm7271. Cc: stable <stable@kernel.org> Assisted-by: Claude:Opus4.8 Signed-off-by: Ryan Wilbur <rwilbur633@gmail.com> Link: https://patch.msgid.link/20260730193920.28954-1-rwilbur633@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03Xen/gnttab: adjust two uses of sizeof()Jan Beulich
The use in gnttab_map() is latently buggy, as "frames" there is xen_pfn_t *, not unsigned long *. Adjust the correct use in gnttab_map_frames_v2() as well, just to avoid the problematic pattern of sizeof(<type>). Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Signed-off-by: Juergen Gross <jgross@suse.com> Message-ID: <0ddff6c4-7ec7-41a9-9417-687ca16aaafd@suse.com>
2026-08-03Merge tag 'thunderbolt-for-v7.2-rc7' of ↵Greg Kroah-Hartman
ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt into usb-linus Mika writes: thunderbolt: Fixes for v7.2-rc7 This includes following USB4/Thunderbolt fixes: - Correct DMA unmapping of USB4STREAM driver. - Fix indexing of bandwidth groups. - More bounds checking for DROM parsing. - Fix ICM USB4 router operation messaging. - Fix crash on ICM error path. All these have been in linux-next with no reported issues. * tag 'thunderbolt-for-v7.2-rc7' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/westeri/thunderbolt: thunderbolt: Initialize ->domain_released completion before it is being used thunderbolt: icm: Preserve USB4 proxy data-valid bit thunderbolt: Bound the DROM dual link port number before indexing sw->ports thunderbolt: Fix bandwidth group reservation indexing thunderbolt: stream: Unmap buffers with mapped size
2026-08-03ACPI: PAD: xen: Stop setting acpi_device_name/class()Rafael J. Wysocki
The driver sets acpi_device_name() and acpi_device_class() which are never read afterward, so make it stop doing that and drop the symbols defined specifically for this purpose. No intentional functional impact. This will facilitate the removal of device_name and device_class from struct acpi_device_pnp in the future. Signed-off-by: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Juergen Gross <jgross@suse.com> Signed-off-by: Juergen Gross <jgross@suse.com> Message-ID: <2384190.iZASKD2KPV@rafael.j.wysocki>
2026-08-03Merge branch 'for-linus' into for-nextTakashi Iwai
Pull 7.2 devel branch for put_device auto-clean fixes. Signed-off-by: Takashi Iwai <tiwai@suse.de>
2026-08-03soc: fsl: qe: Rename irq variable to parent_irqPaul Louvel
Rename the local variable holding the platform IRQ to parent_irq, which better describes its role as the upstream/chained interrupt in the hierarchy. Signed-off-by: Paul Louvel <paul.louvel@bootlin.com> Reviewed-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org> Link: https://lore.kernel.org/r/20260708-qe-pic-gpios-v2-9-1972044cfbd1@bootlin.com Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-08-03soc: fsl: qe: Convert to generic IRQ chipPaul Louvel
The generic IRQ chip framework is available to handle IRQ chips. Using this framework for the QE interrupt controller allows to simplify the driver. Indeed, the framework internally handles operations coded directly in the driver. Signed-off-by: Paul Louvel <paul.louvel@bootlin.com> Reviewed-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org> Link: https://lore.kernel.org/r/20260708-qe-pic-gpios-v2-8-1972044cfbd1@bootlin.com Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-08-03soc: fsl: qe: Handle spurious interruptsPaul Louvel
When no interrupt bits are set in the event register, call handle_bad_irq() to account for the spurious interrupt before exiting the cascade handler. Signed-off-by: Paul Louvel <paul.louvel@bootlin.com> Reviewed-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org> Link: https://lore.kernel.org/r/20260708-qe-pic-gpios-v2-7-1972044cfbd1@bootlin.com Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-08-03soc: fsl: qe: Iterate over all pending interrupts in cascade handlerPaul Louvel
Instead of only servicing a single interrupt, the chained handler can handle all IRQs that have their bit set in the event register. This avoid multiple parent IRQ handler being serviced if more than one interrupt are pending on the QE PIC. Remove unused code. Signed-off-by: Paul Louvel <paul.louvel@bootlin.com> Reviewed-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org> Link: https://lore.kernel.org/r/20260708-qe-pic-gpios-v2-6-1972044cfbd1@bootlin.com Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-08-03soc: fsl: qe: Use generic_handle_domain_irq()Paul Louvel
Replace the irq_find_mapping() + generic_handle_irq() pattern with generic_handle_domain_irq(), which handles the IRQ domain lookup internally. This is less error-prone and more idiomatic. Remove the now-unused irq_find_mapping() call from qepic_get_irq(). Signed-off-by: Paul Louvel <paul.louvel@bootlin.com> Reviewed-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org> Link: https://lore.kernel.org/r/20260708-qe-pic-gpios-v2-5-1972044cfbd1@bootlin.com Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-08-03soc: fsl: qe: Add chained_irq_{enter,exit}() calls in cascade handlerPaul Louvel
Wrap the cascade handler body with chained_irq_{enter,exit}() to properly inform the parent IRQ chip that a chained interrupt is being serviced. Fixes: f0bcd784e1b76 ("soc: fsl: qe: Add an interrupt controller for QUICC Engine Ports") Signed-off-by: Paul Louvel <paul.louvel@bootlin.com> Cc: stable@kernel.org Reviewed-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org> Link: https://lore.kernel.org/r/20260708-qe-pic-gpios-v2-1-1972044cfbd1@bootlin.com Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-08-03soc: fsl: qe: implement get_direction()Christophe Leroy (CS GROUP)
The lack of get_direction() callback in this driver causes GPIOLIB to emit a warning. Implement it. Fixes: e623c4303ed1 ("gpiolib: sanitize the return value of gpio_chip::get_direction()") Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> Link: https://lore.kernel.org/r/30b3f278a10b46252783458c81dc438df176f86c.1785405882.git.chleroy@kernel.org Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-08-03soc: fsl: dpio: Remove redundant dev_err()Pan Chuang
Since commit 55b48e23f5c4 ("genirq/devres: Add error handling in devm_request_*_irq()"), devm_request_irq() automatically logs detailed error messages on failure. Remove the now-redundant driver-specific dev_err() calls. Signed-off-by: Pan Chuang <panchuang@vivo.com> Acked-by: Ioana Ciornei <ioana.ciornei@nxp.com> Link: https://lore.kernel.org/r/20260723024748.30105-1-panchuang@vivo.com Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-08-03drivers/bus/fsl-mc: Use strscpy() to copy strings into arraysDavid Laight
Replacing strcpy() with strscpy() ensures than overflow of the target buffer cannot happen. Signed-off-by: David Laight <david.laight.linux@gmail.com> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Link: https://lore.kernel.org/r/20260608095500.2567-1-david.laight.linux@gmail.com Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-08-03soc: fsl: qe: properly scan GPIO nodes at startupChristophe Leroy (CS GROUP)
Before commit 156460811def ("soc: fsl: qe: Change GPIO driver to a proper platform driver") qe_add_gpiochips() was walking the device tree to find all nodes with compatible "fsl,mpc8323-qe-pario-bank". After that commit the discovery is handled by the platform core, therefore it is necessary to call of_platform_default_populate() on the par_io node. Fixes: 156460811def ("soc: fsl: qe: Change GPIO driver to a proper platform driver") Reviewed-by: Herve Codina <herve.codina@bootlin.com> Link: https://lore.kernel.org/r/a1db12ef75bf881dd5fba893a37db0c8517eca1b.1785414349.git.chleroy@kernel.org Signed-off-by: Christophe Leroy (CS GROUP) <chleroy@kernel.org>
2026-08-03tty: remove the ipwireless driverQingfang Deng
The last mentions of this driver on local Linux and telco support forums date back to 2011. This does not prove that no users remain, but the likelihood is too low to justify continuing to carry the driver in the kernel. The maintainer agreed that the driver should be removed and noted that it is simple enough to build as an external module if a user resurfaces [1]. Remove the driver along with its Kconfig, defconfig, build and MAINTAINERS entries. [1] https://lore.kernel.org/linux-serial/20260218152330.GI26902@suse.cz/ Assisted-by: Codex:GPT-5.6 Signed-off-by: Qingfang Deng <qingfang.deng@linux.dev> Reviewed-by: David Sterba <dsterba@suse.com> Acked-by: David Sterba <dsterba@suse.com> Acked-by: Jiri Kosina <jkosina@suse.com> Link: https://patch.msgid.link/20260803091938.259944-1-qingfang.deng@linux.dev Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2026-08-03mmc: sdhci-tegra: Add Tegra264 SoC dataPrathamesh Shete
Add a new SoC data structure for Tegra264 platforms and register the nvidia,tegra264-sdhci compatible string. Configure the supported features and tap delay values for the Tegra264 SDHCI controller. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-08-03mmc: sdhci-tegra: Add Tegra238 SoC dataPrathamesh Shete
Add a new SoC data structure for Tegra238 platforms and register the nvidia,tegra238-sdhci compatible string. Configure the supported features and tap delay values for the Tegra238 SDHCI controller. Signed-off-by: Prathamesh Shete <pshete@nvidia.com> Reviewed-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Ulf Hansson <ulfh@kernel.org>
2026-08-03drm/imagination: Reuse layout check macros for MIPS FW structuresAlessio Belle
Replace static asserts on MIPS firmware structures offsets and sizes with more compact macros that are already used for similar checks on common firmware interface structures. Reviewed-by: Brajesh Gupta <brajesh.gupta@imgtec.com> Link: https://patch.msgid.link/20260729-fwif-checks-updates-v1-2-af65e9606a7e@imgtec.com Signed-off-by: Alessio Belle <alessio.belle@imgtec.com>
2026-08-03drm/imagination: Move all FW interface check macros to pvr_checks.hAlexandru Dadu
The same macros are redefined in three places, so move them to a common file to reduce duplication and make it easier to reuse them. Signed-off-by: Alexandru Dadu <alexandru.dadu@imgtec.com> Co-developed-by: Alessio Belle <alessio.belle@imgtec.com> Reviewed-by: Brajesh Gupta <brajesh.gupta@imgtec.com> Link: https://patch.msgid.link/20260729-fwif-checks-updates-v1-1-af65e9606a7e@imgtec.com Signed-off-by: Alessio Belle <alessio.belle@imgtec.com>
2026-08-03USB: serial: pl2303: add support for PL256X multi-port devicesCharles Yeh
Prolific PL256X devices are multi-port USB-to-UART controllers, including the PL2533, PL2543 and PL2565 variants. These devices use vendor requests that differ from those used by the existing TYPE_HX and TYPE_HXN devices. They also require a separate UART reset request and use a port-specific register for configuring flow control. Add a new TYPE_MP device type and select the appropriate vendor requests, reset operation and flow-control register for PL256X devices. Store the USB interface number so that requests can be directed to the corresponding UART port. Detect the supported PL256X variants using bcdDevice before issuing any legacy vendor requests, as PL256X devices do not accept those requests. PL256X devices support baud rates up to 24 Mbps and do not use divisor encoding. Signed-off-by: Charles Yeh <charlesyeh522@gmail.com> Link: https://lore.kernel.org/all/CAAZvQQ6O4p35Xs2hVYaoJxD4D7U0YonsdweuPh6W8RQVhvoUNw@mail.gmail.com/ Signed-off-by: Johan Hovold <johan@kernel.org>
2026-08-03powerpc/pseries: Move H_WATCHDOG definitions to a common headerSourabh Jain
The H_WATCHDOG input and output definitions are currently local to the pseries watchdog driver. The next patch in this series also needs these definitions to issue H_WATCHDOG hypercalls outside the watchdog driver. Move the H_WATCHDOG definitions to a new common header, asm/papr-watchdog.h, so they can be shared without duplicating the PAPR watchdog definitions. No functional changes. Cc: stable@vger.kernel.org Suggested-by: Ritesh Harjani (IBM) <ritesh.list@gmail.com> Signed-off-by: Sourabh Jain <sourabhjain@linux.ibm.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20260727053416.276317-2-sourabhjain@linux.ibm.com
2026-08-03Merge tag 'pinctrl-qcom-fixes-for-v7.2-rc6' of ↵Linus Walleij
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into fixes Qualcomm pin control fixes for v7.2-rc6 - mark gpio and pci reset as a GPIO pin functions in pinctrl-ipq8064 - fix audio_sec_mclk_in1/out1 pin numbers in pinctrl-ipq9650 Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-03pinctrl: spacemit: validate pins in pinconf callbacksTroy Mitchell
Pin 0 is a valid pin ID, but spacemit_pinconf_get() rejects it by testing the numeric ID rather than the result of the descriptor lookup. It also fails to reject nonzero IDs absent from the SoC pin table before computing their register addresses. Check the descriptor and use its pin ID for the register lookup. spacemit_pinconf_group_set() validates only the first group member when generating the configuration. If a later member is invalid, spacemit_pin_set_config() returns -EINVAL, but the callback ignores it and reports success after partially updating the group. Validate every group member before writing any registers so malformed groups fail without being partially applied. Fixes: a83c29e1d145 ("pinctrl: spacemit: add support for SpacemiT K1 SoC") Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com> Reviewed-by: Yixun Lan <dlan@kernel.org> Signed-off-by: Linus Walleij <linusw@kernel.org>
2026-08-03pinctrl: generic: free maps on pinctrl_generic_to_map() failureSurendra Singh Chouhan
pinctrl_generic_to_map() parses DT configuration and allocates pinctrl maps via pinctrl_utils_reserve_map(). If subsequent steps (such as pinctrl_utils_add_map_mux(), pinctrl_generic_add_group(), pinconf_generic_parse_dt_config(), or pinctrl_utils_add_map_configs()) return an error, *maps may contain partially allocated map entries. Returning the error directly without freeing *maps leaks the allocated mapping memory across all drivers that rely on pinctrl_generic_to_map(). Fix this by calling pinctrl_utils_free_map() and resetting *maps, *num_maps, and *num_reserved_maps in the error path of pinctrl_generic_to_map(). Fixes: aaaf31be0426 ("pinctrl: extract pinctrl_generic_to_map() from pinctrl_generic_pins_function_dt_node_to_map()") Signed-off-by: Surendra Singh Chouhan <kr494167@gmail.com> Signed-off-by: Linus Walleij <linusw@kernel.org>
generated by cgit v1.2.3 (git 2.39.1) at 2026-09-07 15:11:27 +0000