<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/stable/linux.git/arch/arm/common/gic.c, branch master</title>
<subtitle>Linux kernel stable tree</subtitle>
<id>https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=master</id>
<link rel='self' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/'/>
<updated>2013-01-12T16:47:31+00:00</updated>
<entry>
<title>irqchip: Move ARM GIC to drivers/irqchip</title>
<updated>2013-01-12T16:47:31+00:00</updated>
<author>
<name>Rob Herring</name>
<email>rob.herring@calxeda.com</email>
</author>
<published>2012-11-21T03:21:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=81243e444c6e9d1625073e4a3d3bc244c8a545f0'/>
<id>urn:sha1:81243e444c6e9d1625073e4a3d3bc244c8a545f0</id>
<content type='text'>
Now that we have drivers/irqchip, move GIC irqchip to drivers/irqchip. This
is necessary to share the GIC with arm and arm64.

Signed-off-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>ARM: remove mach .handle_irq for GIC users</title>
<updated>2013-01-12T16:47:20+00:00</updated>
<author>
<name>Rob Herring</name>
<email>rob.herring@calxeda.com</email>
</author>
<published>2012-11-21T01:52:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=1d5cc604f42ff1acdec0407247b2f720135ba0c2'/>
<id>urn:sha1:1d5cc604f42ff1acdec0407247b2f720135ba0c2</id>
<content type='text'>
Now that the GIC initialization sets up the handle_arch_irq pointer, we
can remove it for all machines and make it static.

Signed-off-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Anton Vorontsov &lt;avorontsov@mvista.com&gt;
Cc: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
Cc: Sascha Hauer &lt;kernel@pengutronix.de&gt;
Cc: David Brown &lt;davidb@codeaurora.org&gt;
Cc: Daniel Walker &lt;dwalker@fifo99.com&gt;
Cc: Bryan Huntsman &lt;bryanh@codeaurora.org&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Cc: Paul Mundt &lt;lethal@linux-sh.org&gt;
Cc: Magnus Damm &lt;magnus.damm@gmail.com&gt;
Cc: Dinh Nguyen &lt;dinguyen@altera.com&gt;
Cc: Shiraz Hashim &lt;shiraz.hashim@st.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Cc: Srinidhi Kasagar &lt;srinidhi.kasagar@stericsson.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Acked-by: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Acked-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>ARM: GIC: set handle_arch_irq in GIC initialization</title>
<updated>2013-01-10T17:45:48+00:00</updated>
<author>
<name>Rob Herring</name>
<email>rob.herring@calxeda.com</email>
</author>
<published>2012-11-03T17:59:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=cfed7d6014589f51a092463f9c4aca3683fffdb8'/>
<id>urn:sha1:cfed7d6014589f51a092463f9c4aca3683fffdb8</id>
<content type='text'>
Set handle_arch_irq to gic_handle_irq. Only the first GIC initialized can
setup the handler.

Signed-off-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>ARM: GIC: remove direct use of gic_raise_softirq</title>
<updated>2013-01-10T17:45:43+00:00</updated>
<author>
<name>Rob Herring</name>
<email>rob.herring@calxeda.com</email>
</author>
<published>2012-11-26T21:05:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=b1cffebf1029c87e1f1984d48463ee21093a6bc7'/>
<id>urn:sha1:b1cffebf1029c87e1f1984d48463ee21093a6bc7</id>
<content type='text'>
In preparation of moving gic code to drivers/irqchip, remove the direct
platform dependencies on gic_raise_softirq. Move the setup of
smp_cross_call into the gic code and use arch_send_wakeup_ipi_mask
function to trigger wake-up IPIs.

Signed-off-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Cc: Sascha Hauer &lt;kernel@pengutronix.de&gt;
Cc: David Brown &lt;davidb@codeaurora.org&gt;
Cc: Daniel Walker &lt;dwalker@fifo99.com&gt;
Cc: Bryan Huntsman &lt;bryanh@codeaurora.org&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
Cc: Paul Mundt &lt;lethal@linux-sh.org&gt;
Cc: Magnus Damm &lt;magnus.damm@gmail.com&gt;
Acked-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Cc: Shiraz Hashim &lt;shiraz.hashim@st.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Cc: Srinidhi Kasagar &lt;srinidhi.kasagar@stericsson.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Acked-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>ARM: gic: use a private mapping for CPU target interfaces</title>
<updated>2012-11-19T15:44:34+00:00</updated>
<author>
<name>Nicolas Pitre</name>
<email>nicolas.pitre@linaro.org</email>
</author>
<published>2012-04-11T22:55:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=384a290283fde63ba8dc671fca5420111cdac19a'/>
<id>urn:sha1:384a290283fde63ba8dc671fca5420111cdac19a</id>
<content type='text'>
The GIC interface numbering does not necessarily follow the logical
CPU numbering, especially for complex topologies such as multi-cluster
systems.

Fortunately we can easily probe the GIC to create a mapping as the
Interrupt Processor Targets Registers for the first 32 interrupts are
read-only, and each field returns a value that always corresponds to
the processor reading the register.

Initially all mappings target all CPUs in case an IPI is required to
boot secondary CPUs.  It is refined as those CPUs discover what their
actual mapping is.

Signed-off-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-linus' of git://git.linaro.org/people/rmk/linux-arm</title>
<updated>2012-03-29T23:53:48+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2012-03-29T23:53:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=12679a2d7e3bfbdc7586e3e86d1ca90c46659363'/>
<id>urn:sha1:12679a2d7e3bfbdc7586e3e86d1ca90c46659363</id>
<content type='text'>
Pull more ARM updates from Russell King.

This got a fair number of conflicts with the &lt;asm/system.h&gt; split, but
also with some other sparse-irq and header file include cleanups.  They
all looked pretty trivial, though.

* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (59 commits)
  ARM: fix Kconfig warning for HAVE_BPF_JIT
  ARM: 7361/1: provide XIP_VIRT_ADDR for no-MMU builds
  ARM: 7349/1: integrator: convert to sparse irqs
  ARM: 7259/3: net: JIT compiler for packet filters
  ARM: 7334/1: add jump label support
  ARM: 7333/2: jump label: detect %c support for ARM
  ARM: 7338/1: add support for early console output via semihosting
  ARM: use set_current_blocked() and block_sigmask()
  ARM: exec: remove redundant set_fs(USER_DS)
  ARM: 7332/1: extract out code patch function from kprobes
  ARM: 7331/1: extract out insn generation code from ftrace
  ARM: 7330/1: ftrace: use canonical Thumb-2 wide instruction format
  ARM: 7351/1: ftrace: remove useless memory checks
  ARM: 7316/1: kexec: EOI active and mask all interrupts in kexec crash path
  ARM: Versatile Express: add NO_IOPORT
  ARM: get rid of asm/irq.h in asm/prom.h
  ARM: 7319/1: Print debug info for SIGBUS in user faults
  ARM: 7318/1: gic: refactor irq_start assignment
  ARM: 7317/1: irq: avoid NULL check in for_each_irq_desc loop
  ARM: 7315/1: perf: add support for the Cortex-A7 PMU
  ...
</content>
</entry>
<entry>
<title>ARM: 7318/1: gic: refactor irq_start assignment</title>
<updated>2012-03-24T09:38:53+00:00</updated>
<author>
<name>Will Deacon</name>
<email>will.deacon@arm.com</email>
</author>
<published>2012-02-03T13:52:14+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=e0b823e9a543527dbb0f806252ee03a60f2aefbc'/>
<id>urn:sha1:e0b823e9a543527dbb0f806252ee03a60f2aefbc</id>
<content type='text'>
The irq_start and hwirq_base assignment code is fairly hairy and ended
up being difficult to read following a conflict resolution for 3.2.

This patch rearranges the code slightly to make it easier to read.

Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>irq_domain/c6x: constify irq_domain structures</title>
<updated>2012-02-16T13:11:24+00:00</updated>
<author>
<name>Grant Likely</name>
<email>grant.likely@secretlab.ca</email>
</author>
<published>2012-01-26T19:25:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=15a25980d450c81e514c2a8724b575461961a30d'/>
<id>urn:sha1:15a25980d450c81e514c2a8724b575461961a30d</id>
<content type='text'>
Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
Cc: Mark Salter &lt;msalter@redhat.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>irq_domain: Remove 'new' irq_domain in favour of the ppc one</title>
<updated>2012-02-16T13:11:23+00:00</updated>
<author>
<name>Grant Likely</name>
<email>grant.likely@secretlab.ca</email>
</author>
<published>2012-02-14T21:06:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=75294957be1dee7d22dd7d90bd31334ba410e836'/>
<id>urn:sha1:75294957be1dee7d22dd7d90bd31334ba410e836</id>
<content type='text'>
This patch removes the simplistic implementation of irq_domains and enables
the powerpc infrastructure for all irq_domain users.  The powerpc
infrastructure includes support for complex mappings between Linux and
hardware irq numbers, and can manage allocation of irq_descs.

This patch also converts the few users of irq_domain_add()/irq_domain_del()
to call irq_domain_add_legacy() instead.

v3: Fix bug that set up too many irqs in translation range.
v2: Fix removal of irq_alloc_descs() call in gic driver

Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
Cc: Rob Herring &lt;rob.herring@calxeda.com&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Milton Miller &lt;miltonm@bga.com&gt;
Tested-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>irq_domain: Make irq_domain structure match powerpc's irq_host</title>
<updated>2012-02-14T21:06:48+00:00</updated>
<author>
<name>Grant Likely</name>
<email>grant.likely@secretlab.ca</email>
</author>
<published>2012-02-14T21:06:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=7bb69bade0d41715bdf1b24f5ef0b8f798769fe9'/>
<id>urn:sha1:7bb69bade0d41715bdf1b24f5ef0b8f798769fe9</id>
<content type='text'>
Part of the series to unify the irq remapping mechanisms in the
kernel.  A follow up patch will copy the powerpc implementation into
kernel/irq/irqdomain.c, which will be a lot easier if the structures
are identical.

Where they differ, I've chose to use the powerpc names since there is
a lot more code using those names.

Signed-off-by: Grant Likely &lt;grant.likely@secretlab.ca&gt;
Cc: Rob Herring &lt;rob.herring@calxeda.com&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Milton Miller &lt;miltonm@bga.com&gt;
Tested-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
</feed>
