kernel/git/stable/linux.git/arch/blackfin/mach-common/lock.S, branch master

Blackfin: punt dead cache locking code

2009-09-17T02:10:25+00:00

No one uses these functions, and some are duplicate of existing C code. So just punt the whole thing. Signed-off-by: Mike Frysinger

Blackfin arch: rename cache_lock() to bfin_cache_lock()

2008-11-18T09:48:22+00:00

rename cache_lock() to bfin_cache_lock() to avoid namespace collision with common code Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu

Blackfin arch: cleanup cache lock code

2008-08-14T06:29:57+00:00

- remove cheesy read_iloc() function - move invalidate_entire_icache function to lock.S - export proper prototypes for functions in lock.S - only build lock.S when BFIN_ICACHE_LOCK is enabled Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu

[Blackfin] arch: make the mask explicit rather than writing a negative number in hex

2008-04-23T21:56:07+00:00

Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu

Blackfin arch: to do some consolidation of common code and common name spaces

2007-10-10T15:55:26+00:00

now all BLKFIN should be BFIN, should be no functional changes. Signed-off-by: Robin Getz Signed-off-by: Bryan Wu

Blackfin arch: use HI/LO macros rather than masking the bit ranges ourselves

2007-07-25T02:11:42+00:00

Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu

Blackfin arch: add proper ENDPROC()

2007-06-11T07:31:30+00:00

add proper ENDPROC() to close out assembly functions so size/type is set properly in the final ELF image Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu

blackfin architecture

2007-05-07T19:12:58+00:00

This adds support for the Analog Devices Blackfin processor architecture, and currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561 (Dual Core) devices, with a variety of development platforms including those avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP, BF561-EZKIT), and Bluetechnix! Tinyboards. The Blackfin architecture was jointly developed by Intel and Analog Devices Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in December of 2000. Since then ADI has put this core into its Blackfin processor family of devices. The Blackfin core has the advantages of a clean, orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC (Multiply/Accumulate), state-of-the-art signal processing engine and single-instruction, multiple-data (SIMD) multimedia capabilities into a single instruction-set architecture. The Blackfin architecture, including the instruction set, is described by the ADSP-BF53x/BF56x Blackfin Processor Programming Reference http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf The Blackfin processor is already supported by major releases of gcc, and there are binary and source rpms/tarballs for many architectures at: http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete documentation, including "getting started" guides available at: http://docs.blackfin.uclinux.org/ which provides links to the sources and patches you will need in order to set up a cross-compiling environment for bfin-linux-uclibc This patch, as well as the other patches (toolchain, distribution, uClibc) are actively supported by Analog Devices Inc, at: http://blackfin.uclinux.org/ We have tested this on LTP, and our test plan (including pass/fails) can be found at: http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel [m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files] Signed-off-by: Bryan Wu Signed-off-by: Mariusz Kozlowski Signed-off-by: Aubrey Li Signed-off-by: Jie Zhang Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds