<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/stable/linux.git/arch/mips/oprofile/common.c, branch master</title>
<subtitle>Linux kernel stable tree</subtitle>
<id>https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=master</id>
<link rel='self' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=master'/>
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<updated>2021-01-22T06:42:26+00:00</updated>
<entry>
<title>arch: mips: Remove CONFIG_OPROFILE support</title>
<updated>2021-01-22T06:42:26+00:00</updated>
<author>
<name>Viresh Kumar</name>
<email>viresh.kumar@linaro.org</email>
</author>
<published>2021-01-14T11:35:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=e258958945c6e1f682bf6d1f3b2bbf93895ae884'/>
<id>urn:sha1:e258958945c6e1f682bf6d1f3b2bbf93895ae884</id>
<content type='text'>
The "oprofile" user-space tools don't use the kernel OPROFILE support
any more, and haven't in a long time. User-space has been converted to
the perf interfaces.

Remove the old oprofile's architecture specific support.

Suggested-by: Christoph Hellwig &lt;hch@infradead.org&gt;
Suggested-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Acked-by: Robert Richter &lt;rric@kernel.org&gt;
Acked-by: William Cohen &lt;wcohen@redhat.com&gt;
Acked-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>MIPS: oprofile: remove unneeded semicolon in common.c</title>
<updated>2020-04-28T11:08:42+00:00</updated>
<author>
<name>Jason Yan</name>
<email>yanaijie@huawei.com</email>
</author>
<published>2020-04-28T06:32:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=618c35556e5f2156c8bc5cd43664363838e38e45'/>
<id>urn:sha1:618c35556e5f2156c8bc5cd43664363838e38e45</id>
<content type='text'>
Fix the following coccicheck warning:

arch/mips/oprofile/common.c:113:2-3: Unneeded semicolon

Signed-off-by: Jason Yan &lt;yanaijie@huawei.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson: Rename LOONGSON1 to LOONGSON32</title>
<updated>2019-11-11T18:43:13+00:00</updated>
<author>
<name>Huacai Chen</name>
<email>chenhc@lemote.com</email>
</author>
<published>2019-11-04T06:11:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=b2afb64cccd243afd8a4337d8ee4c2f2afbe991d'/>
<id>urn:sha1:b2afb64cccd243afd8a4337d8ee4c2f2afbe991d</id>
<content type='text'>
Now old Loongson-2E/2F use LOONGSON2EF and will be removed in future,
newer Loongson-2/3 use LOONGSON64. So rename LOONGSON1 to LOONGSON32
will make the naming style more unified.

Signed-off-by: Huacai Chen &lt;chenhc@lemote.com&gt;
[paulburton@kernel.org: Fix checkpatch whitespace warning in irqflags.h]
Signed-off-by: Paul Burton &lt;paulburton@kernel.org&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: James Hogan &lt;jhogan@kernel.org&gt;
Cc: linux-mips@linux-mips.org
Cc: linux-mips@vger.kernel.org
Cc: Fuxin Zhang &lt;zhangfx@lemote.com&gt;
Cc: Zhangjin Wu &lt;wuzhangjin@gmail.com&gt;
Cc: Huacai Chen &lt;chenhuacai@gmail.com&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson64: Rename CPU TYPES</title>
<updated>2019-10-31T22:03:10+00:00</updated>
<author>
<name>Jiaxun Yang</name>
<email>jiaxun.yang@flygoat.com</email>
</author>
<published>2019-10-20T14:43:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=268a2d60013049cfd9a0aada77284aa6ea8ad26a'/>
<id>urn:sha1:268a2d60013049cfd9a0aada77284aa6ea8ad26a</id>
<content type='text'>
CPU_LOONGSON2 -&gt; CPU_LOONGSON2EF
CPU_LOONGSON3 -&gt; CPU_LOONGSON64

As newer loongson-2 products (2G/2H/2K1000) can share kernel
implementation with loongson-3 while 2E/2F are less similar with
other LOONGSON64 products.

Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Paul Burton &lt;paulburton@kernel.org&gt;
Cc: linux-mips@vger.kernel.org
Cc: chenhc@lemote.com
Cc: paul.burton@mips.com
</content>
</entry>
<entry>
<title>MIPS: oprofile: Fix a preemption issue</title>
<updated>2016-05-09T10:00:03+00:00</updated>
<author>
<name>Yanjiang Jin</name>
<email>yanjiang.jin@windriver.com</email>
</author>
<published>2015-12-09T03:15:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=fa0c879ffc869e2597364c72080fd4756a96e99a'/>
<id>urn:sha1:fa0c879ffc869e2597364c72080fd4756a96e99a</id>
<content type='text'>
Use boot_cpu_type() instead of current_cpu_type() in oprofile_arch_init()
to avoid the below warning, cpu_type is normally consistent in a MIPS SMP
system.  There are a few exceptions such as SGI servers where it is
possible to mix R10000, R12000, R14000 and R16000 within certain
constraints.  Let's not worry about those now.

BUG: using smp_processor_id() in preemptible [00000000] code: insmod/952
caller is oprofile_arch_init+0x30/0x194 [oprofile]
CPU: 5 PID: 952 Comm: insmod Not tainted 4.1.13-WR8.0.0.0_standard #1
Stack : ffffffff80c10000 0000000000000001 8000000025bf0790 ffffffff80e10000
	  ffffffff80e50000 ffffffff80254e2c ffffffff80b64428 ffffffff80e10790
	  0000000000000000 ffffffff801caeb8 0000000000000045 0000000000000005
	  ffffffff80c10000 ffffffff801cb798 0000000000000000 ffffffff80e30000
	  0000000000000000 ffffffff801ff1c0 ffffffff80e2d2f8 000000000000000b
	  ffffffff801cbba0 ffffffff80e107b0 ffffffff80a77828 0000000000000005
	  00000000000003b8 ffffffff80e2d2f8 800000040ad39960 ffffffff801f9950
	  0000000000000124 80000004093b7990 80000004093b7ab8 ffffffff80925108
	  ffffffff80b69a07 ffffffff80a6f0d0 8000000407240e00 ffffffff801cc934
	  000000000000005d ffffffff80159080 0000000000000005 00000000000003b8
	  ...
Call Trace:
[&lt;ffffffff80159080&gt;] show_stack+0xe8/0x108
[&lt;ffffffff80925108&gt;] dump_stack+0x8c/0xd8
[&lt;ffffffff80606570&gt;] check_preemption_disabled+0x110/0x118
[&lt;ffffffffc0086104&gt;] oprofile_arch_init+0x30/0x194 [oprofile]
[&lt;ffffffffc008602c&gt;] oprofile_init+0x2c/0xc0 [oprofile]
[&lt;ffffffff80100550&gt;] do_one_initcall+0xa0/0x1c0
[&lt;ffffffff80921e04&gt;] do_init_module+0x80/0x1d8
[&lt;ffffffff801fd0d4&gt;] load_module+0x1b74/0x2278
[&lt;ffffffff801fdab4&gt;] SyS_finit_module+0xcc/0xf0
[&lt;ffffffff80165884&gt;] handle_sysn32+0x44/0x70

[ralf@linux-mips.org: Correct commit message.]

Signed-off-by: Yanjiang Jin &lt;yanjiang.jin@windriver.com&gt;
Cc: rric@kernel.org
Cc: jinyanjiang@gmail.com
Cc: linux-mips@linux-mips.org
Cc: oprofile-list@lists.sf.net
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11769/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Add cases for CPU_I6400</title>
<updated>2015-08-26T13:23:03+00:00</updated>
<author>
<name>Markos Chandras</name>
<email>markos.chandras@imgtec.com</email>
</author>
<published>2015-07-09T09:40:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=4e88a8621301b992e8e3422e08bfb604772f3338'/>
<id>urn:sha1:4e88a8621301b992e8e3422e08bfb604772f3338</id>
<content type='text'>
Add a CPU_I6400 case to various switch statements, doing the same thing
as for CPU_P5600.

Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10635/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Add R16000 detection</title>
<updated>2015-04-01T15:22:13+00:00</updated>
<author>
<name>Joshua Kinard</name>
<email>kumba@gentoo.org</email>
</author>
<published>2015-01-21T12:59:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=3057739138eb8fbaa5154b149a864f5218898c73'/>
<id>urn:sha1:3057739138eb8fbaa5154b149a864f5218898c73</id>
<content type='text'>
This allows the kernel to correctly detect an R16000 MIPS CPU on systems that
have those.  Otherwise, such systems will detect the CPU as an R14000, due to
similarities in the CPU PRId value.

Signed-off-by: Joshua Kinard &lt;kumba@gentoo.org&gt;
Cc: Linux MIPS List &lt;linux-mips@linux-mips.org&gt;
Patchwork: https://patchwork.linux-mips.org/patch/9092/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: oprofile: Enable backtrace on timer-based profiling</title>
<updated>2014-11-24T06:45:31+00:00</updated>
<author>
<name>Aaro Koskinen</name>
<email>aaro.koskinen@nsn.com</email>
</author>
<published>2014-10-17T15:10:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=1b48142a809ee03f48979fad647245dbe0ce423a'/>
<id>urn:sha1:1b48142a809ee03f48979fad647245dbe0ce423a</id>
<content type='text'>
Allow unsupported CPU types to use backtrace with timer-based profiling.
Some CPUs (notably OCTEON) lack architecture-specific oprofile driver. In
such case oprofile can fallback to timer-based mode, and arch code can
still provide the backtrace functionality. So just set up the backtrace
hook always.

Signed-off-by: Aaro Koskinen &lt;aaro.koskinen@nsn.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8108/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Loongson-3: Add oprofile support</title>
<updated>2014-11-24T06:45:01+00:00</updated>
<author>
<name>Huacai Chen</name>
<email>chenhc@lemote.com</email>
</author>
<published>2014-11-04T06:15:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=89467e73d3881a470ce4ffdcba1d5a5ed618379a'/>
<id>urn:sha1:89467e73d3881a470ce4ffdcba1d5a5ed618379a</id>
<content type='text'>
Loongson-3 has two groups of performance counters, they are 4 sub-
registers of CP0's REG25. This patch add oprofile support.

REG25, sel 0: Perf Control of group 0;
REG25, sel 1: Perf Counter of group 0;
REG25, sel 2: Perf Control of group 1;
REG25, sel 3: Perf Counter of group 1.

Signed-off-by: Huacai Chen &lt;chenhc@lemote.com&gt;
Cc: John Crispin &lt;john@phrozen.org&gt;
Cc: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: Fuxin Zhang &lt;zhangfx@lemote.com&gt;
Cc: Zhangjin Wu &lt;wuzhangjin@gmail.com&gt;
Patchwork: https://patchwork.linux-mips.org/patch/8328/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Add support for the M5150 processor</title>
<updated>2014-03-26T22:09:22+00:00</updated>
<author>
<name>Leonid Yegoshin</name>
<email>Leonid.Yegoshin@imgtec.com</email>
</author>
<published>2014-03-04T13:34:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=f36c4720fca325579faddc880d4e178e4ccbda88'/>
<id>urn:sha1:f36c4720fca325579faddc880d4e178e4ccbda88</id>
<content type='text'>
The M5150 core is a 32-bit MIPS RISC which implements the
MIPS Architecture Release-5  in a 5-stage pipeline.
In addition, it includes the MIPS Architecture Virtualization Module
that enables virtualization of operating systems,
which provides a scalable, trusted, and secure execution environment.

Signed-off-by: Leonid Yegoshin &lt;Leonid.Yegoshin@imgtec.com&gt;
Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6596/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
