<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/stable/linux.git/arch/x86/kvm/vmx.h, branch master</title>
<subtitle>Linux kernel stable tree</subtitle>
<id>https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=master</id>
<link rel='self' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/'/>
<updated>2008-12-31T14:52:27+00:00</updated>
<entry>
<title>KVM: VMX: move vmx.h to include/asm</title>
<updated>2008-12-31T14:52:27+00:00</updated>
<author>
<name>Eduardo Habkost</name>
<email>ehabkost@redhat.com</email>
</author>
<published>2008-11-17T21:03:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=13673a90f1cf88296f726265cc7cf3ec76ecba30'/>
<id>urn:sha1:13673a90f1cf88296f726265cc7cf3ec76ecba30</id>
<content type='text'>
vmx.h will be used by core code that is independent of KVM, so I am
moving it outside the arch/x86/kvm directory.

Signed-off-by: Eduardo Habkost &lt;ehabkost@redhat.com&gt;
Signed-off-by: Avi Kivity &lt;avi@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: VMX: Move private memory slot position</title>
<updated>2008-12-31T14:51:46+00:00</updated>
<author>
<name>Sheng Yang</name>
<email>sheng@linux.intel.com</email>
</author>
<published>2008-10-16T09:30:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=6fe639792c7b8e462baeaac39ecc33541fd5da6e'/>
<id>urn:sha1:6fe639792c7b8e462baeaac39ecc33541fd5da6e</id>
<content type='text'>
PCI device assignment would map guest MMIO spaces as separate slot, so it is
possible that the device has more than 2 MMIO spaces and overwrite current
private memslot.

The patch move private memory slot to the top of userspace visible memory slots.

Signed-off-by: Sheng Yang &lt;sheng@linux.intel.com&gt;
Signed-off-by: Avi Kivity &lt;avi@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: VMX: Add PAT support for EPT</title>
<updated>2008-12-31T14:51:44+00:00</updated>
<author>
<name>Sheng Yang</name>
<email>sheng@linux.intel.com</email>
</author>
<published>2008-10-09T08:01:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=468d472f3f65100d5fb88c8d45043c85b874c294'/>
<id>urn:sha1:468d472f3f65100d5fb88c8d45043c85b874c294</id>
<content type='text'>
GUEST_PAT support is a new feature introduced by Intel Core i7 architecture.
With this, cpu would save/load guest and host PAT automatically, for EPT memory
type in guest depends on MSR_IA32_CR_PAT.

Also add save/restore for MSR_IA32_CR_PAT.

Signed-off-by: Sheng Yang &lt;sheng@linux.intel.com&gt;
Signed-off-by: Avi Kivity &lt;avi@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: VMX: Set IGMT bit in EPT entry</title>
<updated>2008-11-11T19:00:37+00:00</updated>
<author>
<name>Sheng Yang</name>
<email>sheng@linux.intel.com</email>
</author>
<published>2008-11-06T06:55:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=928d4bf747e9c290b690ff515d8f81e8ee226d97'/>
<id>urn:sha1:928d4bf747e9c290b690ff515d8f81e8ee226d97</id>
<content type='text'>
There is a potential issue that, when guest using pagetable without vmexit when
EPT enabled, guest would use PAT/PCD/PWT bits to index PAT msr for it's memory,
which would be inconsistent with host side and would cause host MCE due to
inconsistent cache attribute.

The patch set IGMT bit in EPT entry to ignore guest PAT and use WB as default
memory type to protect host (notice that all memory mapped by KVM should be WB).

Signed-off-by: Sheng Yang &lt;sheng@linux.intel.com&gt;
Signed-off-by: Avi Kivity &lt;avi@redhat.com&gt;
</content>
</entry>
<entry>
<title>x86: Move FEATURE_CONTROL bits to msr-index.h</title>
<updated>2008-10-15T08:16:14+00:00</updated>
<author>
<name>Sheng Yang</name>
<email>sheng.yang@intel.com</email>
</author>
<published>2008-09-11T07:27:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=defed7ed926eca9f178a632df05baa866abe754e'/>
<id>urn:sha1:defed7ed926eca9f178a632df05baa866abe754e</id>
<content type='text'>
For MSR_IA32_FEATURE_CONTROL is already there.

Signed-off-by: Sheng Yang &lt;sheng.yang@intel.com&gt;
Signed-off-by: Avi Kivity &lt;avi@qumranet.com&gt;
</content>
</entry>
<entry>
<title>KVM: VMX: Rename IA32_FEATURE_CONTROL bits</title>
<updated>2008-10-15T08:16:14+00:00</updated>
<author>
<name>Sheng Yang</name>
<email>sheng.yang@intel.com</email>
</author>
<published>2008-09-11T07:27:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=9ea542facbd0fd12a53e169953a3fdd6d0364532'/>
<id>urn:sha1:9ea542facbd0fd12a53e169953a3fdd6d0364532</id>
<content type='text'>
Signed-off-by: Sheng Yang &lt;sheng.yang@intel.com&gt;
Signed-off-by: Avi Kivity &lt;avi@qumranet.com&gt;
</content>
</entry>
<entry>
<title>KVM: VMX: Rename misnamed msr bits</title>
<updated>2008-10-15T08:13:57+00:00</updated>
<author>
<name>Sheng Yang</name>
<email>sheng.yang@intel.com</email>
</author>
<published>2008-06-24T09:02:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=ca60dfbb69afb549e33527cbf676e4daf8febfb5'/>
<id>urn:sha1:ca60dfbb69afb549e33527cbf676e4daf8febfb5</id>
<content type='text'>
MSR_IA32_FEATURE_LOCKED is just a bit in fact, which shouldn't be prefixed with
MSR_.  So is MSR_IA32_FEATURE_VMXON_ENABLED.

Signed-off-by: Sheng Yang &lt;sheng.yang@intel.com&gt;
Signed-off-by: Avi Kivity &lt;avi@qumranet.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'x86/unify-cpu-detect' into x86-v28-for-linus-phase4-D</title>
<updated>2008-10-11T18:23:20+00:00</updated>
<author>
<name>Ingo Molnar</name>
<email>mingo@elte.hu</email>
</author>
<published>2008-10-11T18:23:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=0afe2db21394820d32646a695eccf3fbfe6ab5c7'/>
<id>urn:sha1:0afe2db21394820d32646a695eccf3fbfe6ab5c7</id>
<content type='text'>
Conflicts:
	arch/x86/kernel/cpu/common.c
	arch/x86/kernel/signal_64.c
	include/asm-x86/cpufeature.h
</content>
</entry>
<entry>
<title>KVM: VMX: Always return old for clear_flush_young() when using EPT</title>
<updated>2008-09-11T08:48:19+00:00</updated>
<author>
<name>Sheng Yang</name>
<email>sheng.yang@intel.com</email>
</author>
<published>2008-09-08T07:12:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=534e38b447df47f129a6d3ec3af6705c1e3f651e'/>
<id>urn:sha1:534e38b447df47f129a6d3ec3af6705c1e3f651e</id>
<content type='text'>
As well as discard fake accessed bit and dirty bit of EPT.

Signed-off-by: Sheng Yang &lt;sheng.yang@intel.com&gt;
Signed-off-by: Avi Kivity &lt;avi@qumranet.com&gt;
</content>
</entry>
<entry>
<title>x86: move VMX MSRs to msr-index.h</title>
<updated>2008-09-10T12:00:55+00:00</updated>
<author>
<name>Sheng Yang</name>
<email>sheng.yang@intel.com</email>
</author>
<published>2008-09-09T06:54:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=315a6558f30a264c88274fa70626615d1c7851c7'/>
<id>urn:sha1:315a6558f30a264c88274fa70626615d1c7851c7</id>
<content type='text'>
They are hardware specific MSRs, and we would use them in virtualization
feature detection later.

Signed-off-by: Sheng Yang &lt;sheng.yang@intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
</feed>
