kernel/git/stable/linux.git/drivers/bus/Kconfig, branch linux-4.7.y

arm-ccn: Enable building as module

2016-05-09T14:36:03+00:00

arm-ccn driver uses irq_set_affinity, which is not exported and hence cannot be built as a module, eventhough we have all the bits ready. This patch makes use of the exported helper irq_set_affinity_hint() instead. Also, the __free_irq expects the affinity_hint to be NULL when we free the irq. So set the affinity_hint to NULL at clean up. Now that we can build it as a module, update the Kconfig to reflect the change. Cc: Will Deacon Cc: Mark Rutland Cc: Paul Gortmaker Acked-by: Pawel Moll Signed-off-by: Suzuki K Poulose Signed-off-by: Arnd Bergmann

Merge tag 'arm-soc/for-4.7/drivers' of http://github.com/Broadcom/stblinux into next/drivers

2016-04-25T21:48:29+00:00

Merge "Broadcom ARM-based SoCs drivers changes" from Florian Fainelli: - Justin adds a soc_dev driver to properly report to user-space the Broadcom STB SoC family, product and revision - Florian reworks how the brcmstb_gisb driver dependency is done to enable it on Broadcom STB MIPS-based SoCs and remove a select in arch/arm/mach-bcm/Kconfig * tag 'arm-soc/for-4.7/drivers' of http://github.com/Broadcom/stblinux: bus: brcmstb_gisb: Rework dependencies soc: brcmstb: add SoC driver to brcmstb

bus: brcmstb_gisb: Rework dependencies

2016-04-18T21:20:30+00:00

Do not have the machine Kconfig entry point need to select BRCMSTB_GISB_ARB, instead, just let it be default ARCH_BRCMSTB which is a better way to deal with this. While at it, also make it default BMIPS_GENERIC so the legacy MIPS-based STB platforms can benefit from the same thing. Signed-off-by: Florian Fainelli

bus: simple-pm-bus: Use ARCH_RENESAS

2016-03-28T00:05:58+00:00

Make use of ARCH_RENESAS in place of ARCH_SHMOBILE. This is part of an ongoing process to migrate from ARCH_SHMOBILE to ARCH_RENESAS the motivation for which being that RENESAS seems to be a more appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs. Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman

Merge tag 'arm64-perf' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

2016-03-21T20:14:16+00:00

Pull arm[64] perf updates from Will Deacon: "I have another mixed bag of ARM-related perf patches here. It's about 25% CPU and 75% interconnect, but with drivers/bus/ languishing without an obvious maintainer or tree, Olof and I agreed to keep all of these PMU patches together. I suspect a whole load of code from drivers/bus/arm-* can be moved under drivers/perf/, so that's on the radar for the future. Summary: - Initial support for ARMv8.1 CPU PMUs - Support for the CPU PMU in Cavium ThunderX - CPU PMU support for systems running 32-bit Linux in secure mode - Support for the system PMU in ARM CCI-550 (Cache Coherent Interconnect)" * tag 'arm64-perf' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (26 commits) drivers/perf: arm_pmu: avoid NULL dereference when not using devicetree arm64: perf: Extend ARMV8_EVTYPE_MASK to include PMCR.LC arm-cci: remove unused variable arm-cci: don't return value from void function arm-cci: make private functions static arm-cci: CoreLink CCI-550 PMU driver arm-cci500: Rearrange PMU driver for code sharing with CCI-550 PMU arm-cci: CCI-500: Work around PMU counter writes arm-cci: Provide hook for writing to PMU counters arm-cci: Add helper to enable PMU without synchornising counters arm-cci: Add routines to save/restore all counters arm-cci: Get the status of a counter arm-cci: write_counter: Remove redundant check arm-cci: Delay PMU counter writes to pmu::pmu_enable arm-cci: Refactor CCI PMU enable/disable methods arm-cci: Group writes to counter arm-cci: fix handling cpumask_any_but return value arm-cci: simplify sysfs attr handling drivers/perf: arm_pmu: implement CPU_PM notifier arm64: dts: Add Cavium ThunderX specific PMU ...

arm-cci: CoreLink CCI-550 PMU driver

2016-02-29T23:23:17+00:00

Add ARM CoreLink CCI-550 cache coherent interconnect PMU driver support. The CCI-550 PMU shares all the attributes of CCI-500 PMU, except for an additional master interface (MI-6 - 0xe). CCI-550 requires the same work around as for CCI-500 to write to the PMU counter. Acked-by: Olof Johansson Acked-by: Punit Agrawal Acked-by: Mark Rutland Signed-off-by: Suzuki K Poulose Signed-off-by: Will Deacon

arm-cci500: Rearrange PMU driver for code sharing with CCI-550 PMU

2016-02-29T23:23:17+00:00

CCI-550 PMU shares most of the CCI-500 PMU attributes including the event format, PMU event codes. The only difference is an additional master interface (MI6 - 0xe). Hence we share the driver code for both, except for a model specific event validate method. This patch renames the common CCI500 symbols to CCI5xx, including the Kconfig symbol. No functional changes to the PMU driver. Acked-by: Olof Johansson Acked-by: Punit Agrawal Acked-by: Mark Rutland Signed-off-by: Suzuki K Poulose Signed-off-by: Will Deacon

bus: uniphier-system-bus: revive tristate prompt

2016-02-01T20:17:16+00:00

At first, commit 4b7f48d395a7 ("bus: uniphier-system-bus: add UniPhier System Bus driver") introduced this driver as a tristate one. Then, commit 326ea45aa827 ("bus: uniphier: allow only built-in driver") temporarily made it boolean in order to fix a link error in case it is compiled as a module. The root cause was fixed by commit b80443c2211c ("of/platform: export of_default_bus_match_table"). Now this driver can really be a module. Signed-off-by: Masahiro Yamada Signed-off-by: Olof Johansson

bus: uniphier: allow only built-in driver

2015-12-31T22:46:29+00:00

Building the newly added uniphier system bus driver as a module causes a link error, so let's only allow it to be built-in for now, to fix allmodconfig: ERROR: "of_default_bus_match_table" [drivers/bus/uniphier-system-bus.ko] undefined! Signed-off-by: Arnd Bergmann

bus: uniphier-system-bus: add UniPhier System Bus driver

2015-12-22T19:22:39+00:00

The UniPhier System Bus is an external bus that connects on-board devices to the UniPhier SoC. Each bank (chip select) is dynamically mapped to the CPU-viewed address base via the bus controller. The bus controller must be configured before any access to the bus. This driver parses the "ranges" property of the System Bus node and initialized the bus controller. After the bus becomes ready, devices below it are populated. Note: Each bank can be mapped anywhere in the supported address space; there is nothing preventing us from assigning bank 0 on 0x42000000, 0x43000000, or anywhere as long as such region is not used by others. So, the "ranges" is just one possible software configuration, which does not seem to fit in device tree because device tree is a hardware description language. However, of_translate_address() requires "ranges" in every bus node between CPUs and device mapped on the CPU address space. In other words, "ranges" properties must be statically defined in device tree. After some discussion, I decided the dynamic address reassignment by the driver is too bothersome. Instead, the device tree should provide a reasonable translation setup that the OS can rely on. Signed-off-by: Masahiro Yamada Acked-by: Rob Herring Acked-by: Arnd Bergmann Signed-off-by: Olof Johansson