kernel/git/stable/linux.git/drivers/clk/mediatek, branch linux-6.4.y

clk: mediatek: mt8183: Add back SSPM related clocks

2023-08-11T10:14:26+00:00

[ Upstream commit 1eb8d61ac5c9c7ec56bb96d433532807509b9288 ] This reverts commit 860690a93ef23b567f781c1b631623e27190f101. On the MT8183, the SSPM related clocks were removed claiming a lack of usage. This however causes some issues when the driver was converted to the new simple-probe mechanism. This mechanism allocates enough space for all the clocks defined in the clock driver, not the highest index in the DT binding. This leads to out-of-bound writes if their are holes in the DT binding or the driver (due to deprecated or unimplemented clocks). These errors can go unnoticed and cause memory corruption, leading to crashes in unrelated areas, or nothing at all. KASAN will detect them. Add the SSPM related clocks back to the MT8183 clock driver to fully implement the DT binding. The SSPM clocks are for the power management co-processor, and should never be turned off. They are marked as such. Fixes: 3f37ba7cc385 ("clk: mediatek: mt8183: Convert all remaining clocks to common probe") Signed-off-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20230719074251.1219089-1-wenst@chromium.org Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin

clk: mediatek: clk-mt8173-apmixedsys: Fix iomap not released issue

2023-07-19T14:36:06+00:00

[ Upstream commit b270ae61730e0ebccee39a21dd3311d6896a38ae ] In case of error after of_ioremap() the resource must be released: call iounmap() where appropriate to fix that. Fixes: 41138fbf876c ("clk: mediatek: mt8173: Migrate to platform driver and common probe") Signed-off-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230615122051.546985-4-angelogioacchino.delregno@collabora.com Reviewed-by: Chen-Yu Tsai Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin

clk: mediatek: clk-mt8173-apmixedsys: Fix return value for of_iomap() error

2023-07-19T14:36:06+00:00

[ Upstream commit 3dc265b369ee61db999d6d1588e888eb21dc421e ] The of_iomap() function returns NULL in case of error so usage of PTR_ERR() is wrong! Change that to return -ENOMEM in case of failure. Fixes: 41138fbf876c ("clk: mediatek: mt8173: Migrate to platform driver and common probe") Signed-off-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230615122051.546985-3-angelogioacchino.delregno@collabora.com Reviewed-by: Chen-Yu Tsai Reviewed-by: Markus Schneider-Pargmann Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin

clk: mediatek: clk-mtk: Grab iomem pointer for divider clocks

2023-07-19T14:36:06+00:00

[ Upstream commit 51821765e89906090753421580a61d25a4668186 ] In the rare case in which one of the clock drivers has divider clocks but not composite clocks, mtk_clk_simple_probe() would not io(re)map, hence passing a NULL pointer to mtk_clk_register_dividers(). To fix this issue, extend the `if` conditional to also check if any divider clocks are present. While at it, also make sure the iomem pointer is NULL if no composite/divider clocks are declared, as we are checking for that when iounmapping it in the error path. This hasn't been seen on any MediaTek clock driver as the current ones always declare composite clocks along with divider clocks, but this is still an important fix for a future potential KP. Fixes: 1fe074b1f112 ("clk: mediatek: Add divider clocks to mtk_clk_simple_{probe,remove}()") Signed-off-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20230615122051.546985-2-angelogioacchino.delregno@collabora.com Reviewed-by: Chen-Yu Tsai Reviewed-by: Markus Schneider-Pargmann Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin

clk: mediatek: fix of_iomap memory leak

2023-07-19T14:36:01+00:00

[ Upstream commit 3db7285e044144fd88a356f5b641b9cd4b231a77 ] Smatch reports: drivers/clk/mediatek/clk-mtk.c:583 mtk_clk_simple_probe() warn: 'base' from of_iomap() not released on lines: 496. This problem was also found in linux-next. In mtk_clk_simple_probe(), base is not released when handling errors if clk_data is not existed, which may cause a leak. So free_base should be added here to release base. Fixes: c58cd0e40ffa ("clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers") Signed-off-by: Bosi Zhang Reviewed-by: Dongliang Mu Link: https://lore.kernel.org/r/20230422084331.47198-1-u201911157@hust.edu.cn Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin

clk: mediatek: mt8365: Fix inverted topclk operations

2023-06-13T01:12:09+00:00

The given operations are inverted for the wrong registers which makes multiple of the mt8365 hardware units unusable. In my setup at least usb did not work. Fixed by swapping the operations with the inverted ones. Reported-by: Alexandre Mergnat Fixes: 905b7430d3cc ("clk: mediatek: mt8365: Convert simple_gate to mtk_gate clocks") Signed-off-by: Markus Schneider-Pargmann Link: https://lore.kernel.org/r/20230511133226.913600-1-msp@baylibre.com Tested-by: Alexandre Mergnat Reviewed-by: Alexandre Mergnat Reviewed-by: Matthias Brugger Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd

clk: mediatek: mt8365: Fix index issue

2023-06-12T19:22:03+00:00

Before the patch [1], the clock probe was done directly in the clk-mt8365 driver. In this probe function, the array which stores the data clocks is sized using the higher defined numbers (*_NR_CLOCK) in the clock lists [2]. Currently, with the patch [1], the specific clk-mt8365 probe function is replaced by the mtk generic one [3], which size the clock data array by adding all the clock descriptor array size provided by the clk-mt8365 driver. Actually, all clock indexes come from the header file [2], that mean, if there are more clock (then more index) in the header file [2] than the number of clock declared in the clock descriptor arrays (which is the case currently), the clock data array will be undersized and then the generic probe function will overflow when it will try to write in "clk_data[CLK_INDEX]". Actually, instead of crashing at boot, the probe function returns an error in the log which looks like: "of_clk_hw_onecell_get: invalid index 135", then this clock isn't enabled. Solve this issue by adding in the driver the missing clocks declared in the header clock file [2]. [1]: Commit ffe91cb28f6a ("clk: mediatek: mt8365: Convert to mtk_clk_simple_{probe,remove}()") [2]: include/dt-bindings/clock/mediatek,mt8365-clk.h [3]: drivers/clk/mediatek/clk-mtk.c Fixes: ffe91cb28f6a ("clk: mediatek: mt8365: Convert to mtk_clk_simple_{probe,remove}()") Signed-off-by: Alexandre Mergnat Link: https://lore.kernel.org/r/20230517-fix-clk-index-v3-1-be4df46065c4@baylibre.com Tested-by: Markus Schneider-Pargmann Reviewed-by: Markus Schneider-Pargmann Signed-off-by: Stephen Boyd

Merge branches 'clk-mediatek', 'clk-sunplus', 'clk-loongson' and 'clk-socfpga' into clk-next

2023-04-25T18:50:08+00:00

- Frequency Hopping (FHCTL) on MediaTek MT6795, MT8173, MT8192 and MT8195 SoCs - Converted most Mediatek clock drivers to struct platform_driver - MediaTek clock drivers can be built as modules - Mediatek MT8188 SoC clk drivers - Clock driver for Sunplus SP7021 SoC - Reimplement Loongson-1 clk driver with DT support - Clk driver support for Loongson-2 SoCs - Migrate socfpga clk driver to of_clk_add_hw_provider() * clk-mediatek: (84 commits) clk: mediatek: fhctl: Mark local variables static clk: mediatek: Use right match table, include mod_devicetable clk: mediatek: Add MT8188 adsp clock support clk: mediatek: Add MT8188 imp i2c wrapper clock support clk: mediatek: Add MT8188 wpesys clock support clk: mediatek: Add MT8188 vppsys1 clock support clk: mediatek: Add MT8188 vppsys0 clock support clk: mediatek: Add MT8188 vencsys clock support clk: mediatek: Add MT8188 vdosys1 clock support clk: mediatek: Add MT8188 vdosys0 clock support clk: mediatek: Add MT8188 vdecsys clock support clk: mediatek: Add MT8188 mfgcfg clock support clk: mediatek: Add MT8188 ipesys clock support clk: mediatek: Add MT8188 imgsys clock support clk: mediatek: Add MT8188 ccusys clock support clk: mediatek: Add MT8188 camsys clock support clk: mediatek: Add MT8188 infrastructure clock support clk: mediatek: Add MT8188 peripheral clock support clk: mediatek: Add MT8188 topckgen clock support clk: mediatek: Add MT8188 apmixedsys clock support ... * clk-sunplus: clk: Add Sunplus SP7021 clock driver * clk-loongson: clk: clk-loongson2: add clock controller driver support dt-bindings: clock: add loongson-2 boot clock index MAINTAINERS: remove obsolete file entry in MIPS/LOONGSON1 ARCHITECTURE MIPS: loongson32: Update the clock initialization clk: loongson1: Re-implement the clock driver clk: loongson1: Remove the outdated driver dt-bindings: clock: Add Loongson-1 clock * clk-socfpga: clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling clk: socfpga: use of_clk_add_hw_provider and improve error handling clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling clk: socfpga: use of_clk_add_hw_provider and improve error handling clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handling clk: socfpga: use of_clk_add_hw_provider and improve error handling

clk: mediatek: fhctl: Mark local variables static

2023-04-10T23:57:12+00:00

smatch reports drivers/clk/mediatek/clk-fhctl.c:17:27: warning: symbol 'fhctl_offset_v1' was not declared. Should it be static? drivers/clk/mediatek/clk-fhctl.c:30:27: warning: symbol 'fhctl_offset_v2' was not declared. Should it be static? These variables are only used in one file so should be static. Signed-off-by: Tom Rix Link: https://lore.kernel.org/r/20230406010935.1944976-1-trix@redhat.com Fixes: 8da312d6574c ("clk: mediatek: fhctl: Add support for older fhctl register layout") Signed-off-by: Stephen Boyd

clk: mediatek: Use right match table, include mod_devicetable

2023-04-04T20:47:02+00:00

This is copy/pasta that breaks modular builds. Fix the match table to use the right pointer, or the right device table type. And while we're including the header, fix the order to be linux, dt-bindings, and finally local. Cc: Garmin.Chang Cc: Chen-Yu Tsai Reviewed-by: AngeloGioacchino Del Regno Fixes: f42b9e9a43e3 ("clk: mediatek: Add MT8188 wpesys clock support") Fixes: 0d2f2cefba64 ("clk: mediatek: Add MT8188 adsp clock support") Fixes: e4aaa60eae16 ("clk: mediatek: Add MT8188 vdosys0 clock support") Fixes: cfa4609f9bbe ("clk: mediatek: Add MT8188 vdosys1 clock support") Fixes: bb87c1109ce2 ("clk: mediatek: Add MT8188 vencsys clock support") Reported-by: kernel test robot Link: https://lore.kernel.org/oe-kbuild-all/202304011039.UBDX1UOT-lkp@intel.com/ Link: https://lore.kernel.org/oe-kbuild-all/202304020649.QO2HlpD5-lkp@intel.com/ Link: https://lore.kernel.org/oe-kbuild-all/202304021055.WDhQPcoS-lkp@intel.com/ Signed-off-by: Stephen Boyd Link: https://lore.kernel.org/r/20230404204553.1256263-1-sboyd@kernel.org