kernel/git/stable/linux.git/drivers/clk/mediatek, branch linux-6.7.y

clk: mediatek: mt7981-topckgen: flag SGM_REG_SEL as critical

2024-03-26T22:18:37+00:00

[ Upstream commit aa690050c00a251ab69e3c5204d582833d0b958c ] Without the SGM_REG_SEL clock enabled the cpu freezes if trying to access registers used by MT7981 clock drivers itself. Mark SGM_REG_SEL as critical to make sure it is always enabled to prevent freezes on boot even if the Ethernet driver which prepares and enables the clock is not loaded or probed at a later point. Fixes: 813c3b53b55b ("clk: mediatek: add MT7981 clock support") Signed-off-by: Daniel Golle Link: https://lore.kernel.org/r/fc157139e6b7f8dfb6430ac7191ba754027705e8.1708221995.git.daniel@makrotopia.org Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin

clk: mediatek: mt8183: Correct parent of CLK_INFRA_SSPM_32K_SELF

2024-03-26T22:18:37+00:00

[ Upstream commit a65083fa663a335008e34f65e184041174a9dc7e ] CLK_INFRA_SSPM_32K_SELF has the "f_f26m_ck" clock assigned as its parent. This is inconsistent as the clock is part of a group that are all gates without dividers, and this makes the kernel think it runs at 26 MHz. After clarification from MediaTek engineers, the correct parent is actually the system 32 KHz clock. Fixes: 1eb8d61ac5c9 ("clk: mediatek: mt8183: Add back SSPM related clocks") Signed-off-by: Chen-Yu Tsai Link: https://lore.kernel.org/r/20240219105125.956278-1-wenst@chromium.org Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin

clk: mediatek: mt7622-apmixedsys: Fix an error handling path in clk_mt8135_apmixed_probe()

2024-03-26T22:18:37+00:00

[ Upstream commit a32e88f2b20259f5fe4f8eed598bbc85dc4879ed ] 'clk_data' is allocated with mtk_devm_alloc_clk_data(). So calling mtk_free_clk_data() explicitly in the remove function would lead to a double-free. Remove the redundant call. Fixes: c50e2ea6507b ("clk: mediatek: mt7622-apmixedsys: Add .remove() callback for module build") Signed-off-by: Christophe JAILLET Link: https://lore.kernel.org/r/2c553c2a5077757e4f7af0bb895acc43881cf62c.1704616152.git.christophe.jaillet@wanadoo.fr Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin

clk: mediatek: mt8135: Fix an error handling path in clk_mt8135_apmixed_probe()

2024-03-26T22:18:37+00:00

[ Upstream commit 03c1c51eba6be49b42816af9db114553131af6c8 ] If an error occurs after mtk_alloc_clk_data(), mtk_free_clk_data() should be called, as already done in the remove function. Fixes: 54b7026f011e ("clk: mediatek: mt8135-apmixedsys: Convert to platform_driver and module") Signed-off-by: Christophe JAILLET Link: https://lore.kernel.org/r/6cd6af61e5a91598068227f1f68cfcfde1507453.1704615011.git.christophe.jaillet@wanadoo.fr Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd Signed-off-by: Sasha Levin

clk: mediatek: fix double free in mtk_clk_register_pllfh()

2023-10-24T18:29:41+00:00

The mtk_clk_register_pll_ops() currently frees the "pll" parameter. The function has two callers, mtk_clk_register_pll() and mtk_clk_register_pllfh(). The first one, the _pll() function relies on the free, but for the second _pllfh() function it causes a double free bug. Really the frees should be done in the caller because that's where the allocation is. Fixes: d7964de8a8ea ("clk: mediatek: Add new clock driver to handle FHCTL hardware") Signed-off-by: Dan Carpenter Link: https://lore.kernel.org/r/cd7fa365-28cc-4c34-ac64-6da57c98baa6@moroto.mountain Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd

clk: mediatek: clk-mt2701: Add check for mtk_alloc_clk_data

2023-10-19T01:16:38+00:00

Add the check for the return value of mtk_alloc_clk_data() in order to avoid NULL pointer dereference. Fixes: e9862118272a ("clk: mediatek: Add MT2701 clock support") Signed-off-by: Jiasheng Jiang Link: https://lore.kernel.org/r/20230901024658.23405-1-jiasheng@iscas.ac.cn Reviewed-by: Markus Schneider-Pargmann Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd

clk: mediatek: clk-mt7629: Add check for mtk_alloc_clk_data

2023-10-19T01:15:15+00:00

Add the check for the return value of mtk_alloc_clk_data() in order to avoid NULL pointer dereference. Fixes: 3b5e748615e7 ("clk: mediatek: add clock support for MT7629 SoC") Signed-off-by: Jiasheng Jiang Link: https://lore.kernel.org/r/20230912093407.21505-5-jiasheng@iscas.ac.cn Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd

clk: mediatek: clk-mt7629-eth: Add check for mtk_alloc_clk_data

2023-10-19T01:15:15+00:00

Add the check for the return value of mtk_alloc_clk_data() in order to avoid NULL pointer dereference. Fixes: 3b5e748615e7 ("clk: mediatek: add clock support for MT7629 SoC") Signed-off-by: Jiasheng Jiang Link: https://lore.kernel.org/r/20230912093407.21505-4-jiasheng@iscas.ac.cn Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd

clk: mediatek: clk-mt6797: Add check for mtk_alloc_clk_data

2023-10-19T01:15:15+00:00

Add the check for the return value of mtk_alloc_clk_data() in order to avoid NULL pointer dereference. Fixes: 96596aa06628 ("clk: mediatek: add clk support for MT6797") Signed-off-by: Jiasheng Jiang Link: https://lore.kernel.org/r/20230912093407.21505-3-jiasheng@iscas.ac.cn Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd

clk: mediatek: clk-mt6779: Add check for mtk_alloc_clk_data

2023-10-19T01:15:14+00:00

Add the check for the return value of mtk_alloc_clk_data() in order to avoid NULL pointer dereference. Fixes: 710774e04861 ("clk: mediatek: Add MT6779 clock support") Signed-off-by: Jiasheng Jiang Link: https://lore.kernel.org/r/20230912093407.21505-2-jiasheng@iscas.ac.cn Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Stephen Boyd