kernel/git/stable/linux.git/drivers/clk/meson/gxbb.h, branch master

clk: amlogic: remove unnecessary headers

2025-06-30T09:11:36+00:00

Some Amlogic clock controller drivers have a dedicated headers file, some do not. Over time, these headers have evolved and now only carry register offset definitions. These offsets are only used by the related controller and are not meant to be shared. These headers are not serving any purpose now. Start enforcing some consistency between the different Amlogic clock drivers and move the register offset definitions to the related driver. Link: https://lore.kernel.org/r/20250623-clk-meson-no-headers-v1-1-468161a7279e@baylibre.com [jbrunet: checkpatch strict: removed extra blank line] Signed-off-by: Jerome Brunet

clk: meson: eeclk: move bindings include to main driver

2023-08-08T14:06:17+00:00

Now the clock ids are no more defined in private headers, cleanup and include the dt-bindings headers from the main driver file. Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-16-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet

dt-bindings: clk: gxbb-clkc: expose all clock ids

2023-08-08T14:06:16+00:00

Due to a policy change in clock ID bindings handling, expose all the "private" clock IDs to the public clock dt-bindings to move out of the previous maintenance scheme. This refers to a discussion at [1] & [2] with Krzysztof about the issue with the current maintenance. It was decided to move every gxbb-clkc ID to the public clock dt-bindings headers to be merged in a single tree so we can safely add new clocks without having merge issues. [1] https://lore.kernel.org/all/c088e01c-0714-82be-8347-6140daf56640@linaro.org/ [2] https://lore.kernel.org/all/2fabe721-7434-43e7-bae5-088a42ba128d@app.fastmail.com/ Acked-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-7-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet

clk: meson: migrate meson-eeclk out of hw_onecell_data to drop NR_CLKS

2023-08-08T14:06:16+00:00

The way hw_onecell_data is declared: struct clk_hw_onecell_data { unsigned int num; struct clk_hw *hws[]; }; makes it impossible to have the clk_hw table declared outside while using ARRAY_SIZE() to determine ".num" due to ".hws" being a flexible array member. Completely move out of hw_onecell_data and add a custom devm_of_clk_add_hw_provider() "get" callback to retrieve the clk_hw from the meson_eeclkc_data struct to finally get rid on the NR_CLKS define. Signed-off-by: Neil Armstrong Link: https://lore.kernel.org/r/20230607-topic-amlogic-upstream-clkid-public-migration-v2-2-38172d17c27a@linaro.org Signed-off-by: Jerome Brunet

clk: meson: gxbb: add the gxl internal dac gate

2020-02-13T16:26:04+00:00

Add the ACODEC clock gate to the gxl clk controller driver Acked-by: Neil Armstrong Signed-off-by: Jerome Brunet

dt-bindings: clk: meson-gxbb: Add Video clock bindings

2018-11-23T14:11:56+00:00

Add the video clock bindings covering all the video graphics pipeline and the HDMI controller. Signed-off-by: Neil Armstrong Acked-by: Jerome Brunet Link: http://lkml.kernel.org/r/1541516257-16157-4-git-send-email-narmstrong@baylibre.com

clk: meson: clk-pll: remove od parameters

2018-09-26T10:01:57+00:00

Remove od parameters from pll clocks and add post dividers clocks instead. Some clock, especially the one which feature several ods, may provide output between those ods. Also, some drivers, such as the hdmi driver, may require a more detailed control of the clock dividers, compared to what CCF would perform automatically. One added benefit of removing ods is that it also greatly reduce the size of the rate parameter tables. In the future, we could possibly take the predivider 'n' out of this driver as well. To do so, we will need to understand the constraints for the PLL to lock and whether or not it depends on the input clock rate. Acked-by: Neil Armstrong Reviewed-by: Martin Blumenstingl Tested-by: Martin Blumenstingl Signed-off-by: Jerome Brunet

clk: meson: add gen_clk

2018-07-09T11:49:31+00:00

GEN_CLK is able to route several internal clocks to one of the SoC pads. In the future, even more clocks could be made accessible using cts_msr_clk - the clock measure block. Signed-off-by: Jerome Brunet

clk: meson: gxbb: remove HHI_GEN_CLK_CTNL duplicate definition

2018-07-09T11:49:22+00:00

HHI_GEN_CLK_CTNL is defined twice, just remove the duplicate definition Fixes: 738f66d3211d ("clk: gxbb: add AmLogic GXBB clk controller driver") Acked-by: Martin Blumenstingl Signed-off-by: Jerome Brunet

clk: meson: use SPDX license identifiers consistently

2018-05-18T10:08:29+00:00

Replace every license notices in drivers/clk/meson by SPDX license identifiers, as described in license-rules.rst Acked-by: Neil Armstrong Acked-by: Stephen Boyd Signed-off-by: Jerome Brunet