kernel/git/stable/linux.git/drivers/clk/zte/clk.c, branch masterLinux kernel stable treehttps://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=master2021-02-09T07:42:03+00:00clk: remove zte zx driver2021-02-09T07:42:03+00:00Arnd Bergmannarnd@arndb.de2021-01-20T13:10:24+00:00urn:sha1:bcbe6005eb18d2cd565f202d9351737061753894
The zte zx platform is getting removed, so this driver is no
longer needed.
Cc: Jun Nie <jun.nie@linaro.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20210120131026.1721788-3-arnd@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 5002019-06-19T15:09:55+00:00Thomas Gleixnertglx@linutronix.de2019-06-04T08:11:33+00:00urn:sha1:d2912cb15bdda8ba4a5dd73396ad62641af2f520
Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4122 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
clk: zte: pd_bit is not 0 on zx2967182017-04-12T16:51:31+00:00Shawn Guoshawn.guo@linaro.org2017-03-21T08:38:22+00:00urn:sha1:ee249cbe42f19a7edac0e8cbb95064845e2e5218
The bit 0 of PLL_CFG0 register is not powerdown on zx296718, but part of
of postdiv2 field. The consequence is that functions like hw_to_idx()
and zx_pll_enable() will end up tampering the postdiv2 of the PLL.
Let's fix it by defining pd_bit 0xff which is obviously invalid for a
bit position and having PLL driver check the validity before operating
on the bit.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
clk: zte: add audio clocks for zx2967182017-01-10T00:06:43+00:00Jun Niejun.nie@linaro.org2016-12-16T07:26:47+00:00urn:sha1:edc6da239a1ac7ed1c657b1421c7c714a99db4d9
The audio related clock support is missing from the existing zx296718
clock driver. Let's add it, so that the upstream ZX SPDIF driver can
work for HDMI audio support.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
[sboyd@codeaurora.org: Staticize some more structures]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk: zx: reform pll config info to ease code extension2016-09-14T20:48:32+00:00Jun Niejun.nie@linaro.org2016-09-06T06:02:41+00:00urn:sha1:8d9a0860b75525e3cf240bc152bfdeaeb2e562a1
Add power down bit and pll lock bit in pll config structure
to ease new SoC support.
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
clk: zx: Add audio div clock method for zx2967022015-07-28T18:59:34+00:00Jun Niejun.nie@linaro.org2015-07-23T07:02:51+00:00urn:sha1:4599dd2c926915b5e8c27e0ca21a6172f9d6881c
Add SPDIF/I2S divider clock method for zx296702
Signed-off-by: Jun Nie <jun.nie@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>