<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/stable/linux.git/drivers/clk, branch linux-4.10.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<id>https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=linux-4.10.y</id>
<link rel='self' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=linux-4.10.y'/>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/'/>
<updated>2017-05-14T12:08:26+00:00</updated>
<entry>
<title>clk: rockchip: add "," to mux_pll_src_apll_dpll_gpll_usb480m_p on rk3036</title>
<updated>2017-05-14T12:08:26+00:00</updated>
<author>
<name>Heiko Stuebner</name>
<email>heiko@sntech.de</email>
</author>
<published>2017-03-01T21:00:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=c6a6118496c87355aa10408c99a32a275b2b90d6'/>
<id>urn:sha1:c6a6118496c87355aa10408c99a32a275b2b90d6</id>
<content type='text'>
commit 9b1b23f03abdd25ffde8bbfe5824b89bc0448c28 upstream.

The mux_pll_src_apll_dpll_gpll_usb480m_p parent list was missing a ","
between the 3rd and 4th parent names, making them fall together and thus
lookups fail. Fix that.

Fixes: 5190c08b2989 ("clk: rockchip: add clock controller for rk3036")
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>clk: Make x86/ conditional on CONFIG_COMMON_CLK</title>
<updated>2017-05-14T12:08:24+00:00</updated>
<author>
<name>Pierre-Louis Bossart</name>
<email>pierre-louis.bossart@linux.intel.com</email>
</author>
<published>2017-01-23T18:07:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=5e10d8dc000351158f06314448013a3b5f951795'/>
<id>urn:sha1:5e10d8dc000351158f06314448013a3b5f951795</id>
<content type='text'>
commit f35b6542c3ac3f28056d298348a81f7d56d3a041 upstream.

Fix Makefile for x86 support, dependency on CONFIG_COMMON_CLK
was not explicit

Fixes: 701190fd7419 ('clk: x86: add support for Lynxpoint LPSS clocks')
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Acked-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>clk: sunxi-ng: mp: Adjust parent rate for pre-dividers</title>
<updated>2017-03-30T07:44:07+00:00</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wens@csie.org</email>
</author>
<published>2017-02-14T03:35:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=ad3b48d36e0df32fa76e0be491ce8591d13f265e'/>
<id>urn:sha1:ad3b48d36e0df32fa76e0be491ce8591d13f265e</id>
<content type='text'>
commit ac8616e4c81dded650dfade49a7da283565d37ce upstream.

The MP style clocks support an mux with pre-dividers. While the driver
correctly accounted for them in the .determine_rate callback, it did
not in the .recalc_rate and .set_rate callbacks.

This means when calculating the factors in the .set_rate callback, they
would be off by a factor of the active pre-divider. Same goes for
reading back the clock rate after it is set.

Fixes: 2ab836db5097 ("clk: sunxi-ng: Add M-P factor clock support")
Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>clk: sunxi-ng: sun6i: Fix enable bit offset for hdmi-ddc module clock</title>
<updated>2017-03-30T07:44:07+00:00</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wens@csie.org</email>
</author>
<published>2017-02-14T02:23:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=9300e322b68db47bee5e0d543762065fde522061'/>
<id>urn:sha1:9300e322b68db47bee5e0d543762065fde522061</id>
<content type='text'>
commit 9ad0bb39fce319d7b92c17d306ed0a9f70a02e7d upstream.

The enable bit offset for the hdmi-ddc module clock is wrong. It is
pointing to the main hdmi module clock enable bit.

Reported-by: Bob Ham &lt;rah@settrans.net&gt;
Fixes: c6e6c96d8fa6 ("clk: sunxi-ng: Add A31/A31s clocks")
Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux</title>
<updated>2017-01-22T02:46:45+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2017-01-22T02:46:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=f5e8c0ff563e6bf1633e5a35b0d9b8fe4c7560b8'/>
<id>urn:sha1:f5e8c0ff563e6bf1633e5a35b0d9b8fe4c7560b8</id>
<content type='text'>
Pull clk fix from Stephen Boyd:
 "One fix for Samsung Exynos524x SoCs where recent IOMMU patches have
  caused some of these clocks to turn off when they were always left on
  before"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk/samsung: exynos542x: mark some clocks as critical
</content>
</entry>
<entry>
<title>clk/samsung: exynos542x: mark some clocks as critical</title>
<updated>2017-01-10T00:11:05+00:00</updated>
<author>
<name>Marek Szyprowski</name>
<email>m.szyprowski@samsung.com</email>
</author>
<published>2016-12-22T09:44:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=318fa46cc60d37fec1e87dbf03a82aca0f5ce695'/>
<id>urn:sha1:318fa46cc60d37fec1e87dbf03a82aca0f5ce695</id>
<content type='text'>
Some parent clocks of the Exynos542x clock blocks, which have separate
power domains (like DISP, MFC, MSC, GSC, FSYS and G2D) must be always
enabled to access any register related to power management unit or devices
connected to it. For the time being, until a proper solution based on
runtime PM is applied, mark those clocks as critical (instead of ignore
unused or even no flags) to prevent disabling them.

Signed-off-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Acked-by: Sylwester Nawrocki &lt;s.nawrocki@samsung.com&gt;
Reviewed-by: Chanwoo Choi &lt;cw00.choi@samsung.com&gt;
Reviewed-by: Javier Martinez Canillas &lt;javier@osg.samsung.com&gt;
Tested-by: Javier Martinez Canillas &lt;javier@osg.samsung.com&gt; [Exynos5800 Peach Pi Chromebook]
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux</title>
<updated>2017-01-06T23:35:27+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2017-01-06T23:35:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=d72f0ded89cc78598b8eb0570890234eba167588'/>
<id>urn:sha1:d72f0ded89cc78598b8eb0570890234eba167588</id>
<content type='text'>
Pull clk fixes from Stephen Boyd:
 "One fix for a broken driver on Renesas RZ/A1 SoCs with bootloaders
  that don't turn all the clks on and another fix for stm32f4 SoCs where
  we have multiple drivers attaching to the same DT node"

* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
  clk: stm32f4: Use CLK_OF_DECLARE_DRIVER initialization method
  clk: renesas: mstp: Support 8-bit registers for r7s72100
</content>
</entry>
<entry>
<title>clk: stm32f4: Use CLK_OF_DECLARE_DRIVER initialization method</title>
<updated>2016-12-22T00:33:14+00:00</updated>
<author>
<name>Gabriel Fernandez</name>
<email>gabriel.fernandez@st.com</email>
</author>
<published>2016-12-14T14:22:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=3868f132cce6abab089fd6b12d6a7333712ade83'/>
<id>urn:sha1:3868f132cce6abab089fd6b12d6a7333712ade83</id>
<content type='text'>
Clock and reset controller use same compatible strings (same IP).

Since commit 989eafd0b609 ("clk: core: Avoid double initialization of
clocks") the OF core flags clock controllers registered with the
CLK_OF_DECLARE() macro as OF_POPULATED, so platform devices with the same
compatible string will not be registered.

Signed-off-by: Gabriel Fernandez &lt;gabriel.fernandez@st.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: renesas: mstp: Support 8-bit registers for r7s72100</title>
<updated>2016-12-22T00:33:14+00:00</updated>
<author>
<name>Chris Brandt</name>
<email>chris.brandt@renesas.com</email>
</author>
<published>2016-12-15T17:00:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=e2a33c34ddff22ee208d80abdd12b88a98d6cb60'/>
<id>urn:sha1:e2a33c34ddff22ee208d80abdd12b88a98d6cb60</id>
<content type='text'>
The RZ/A1 is different than the other Renesas SOCs because the MSTP
registers are 8-bit instead of 32-bit and if you try writing values as
32-bit nothing happens...meaning this driver never worked for r7s72100.

Fixes: b6face404f38 ("ARM: shmobile: r7s72100: add essential clock nodes to dtsi")
Signed-off-by: Chris Brandt &lt;chris.brandt@renesas.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Tested-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Kuninori Morimoto &lt;kuninori.morimoto.gx@renesas.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm</title>
<updated>2016-12-16T00:06:15+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2016-12-16T00:06:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=66d466722c39f663b2bbeb44ba4f9419a548fa23'/>
<id>urn:sha1:66d466722c39f663b2bbeb44ba4f9419a548fa23</id>
<content type='text'>
Pull ARM updates from Russell King:

 - an update for clkdev registration error detection to simplify users

 - add cpu capacity parsing from DT

 - support for larger cachelines found on UniPhier caches

 - documentation for udelay constants

 - properly tag assembly function declarations

 - remove unnecessary indirection of asm/mach-types.h

 - switch to syscall table based generation to simplify future additions
   of system calls, along with correpsonding commit for pkey syscalls

 - remove redundant sa1101 header file

 - RONX protect modules when they're in the vmalloc region

* 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm:
  ARM: mm: allow set_memory_*() to be used on the vmalloc region
  ARM: mm: fix set_memory_*() bounds checks
  ARM: 8631/1: clkdev: Detect errors in clk_hw_register_clkdev() for mass registration
  ARM: 8629/1: vfp: properly tag assembly function declarations in C code
  ARM: 8622/3: add sysfs cpu_capacity attribute
  ARM: 8621/3: parse cpu capacity-dmips-mhz from DT
  ARM: 8623/1: mm: add ARM_L1_CACHE_SHIFT_7 for UniPhier outer cache
  ARM: Update mach-types
  ARM: sa1100: remove SA-1101 header file
  ARM: 8619/1: udelay: document the various constants
  ARM: wire up new pkey syscalls
  ARM: convert to generated system call tables
  ARM: remove indirection of asm/mach-types.h
</content>
</entry>
</feed>
