<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/stable/linux.git/drivers/gpu/drm/i915, branch master</title>
<subtitle>Linux kernel stable tree</subtitle>
<id>https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=master</id>
<link rel='self' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/'/>
<updated>2026-09-10T08:05:14+00:00</updated>
<entry>
<title>drm/i915: Fix memory leak in query_perf_config_list()</title>
<updated>2026-09-10T08:05:14+00:00</updated>
<author>
<name>Thorsten Blum</name>
<email>thorsten.blum@linux.dev</email>
</author>
<published>2026-08-23T20:50:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=cbd3dafc2003db679ccd2f6c6a2551db79657049'/>
<id>urn:sha1:cbd3dafc2003db679ccd2f6c6a2551db79657049</id>
<content type='text'>
When krealloc() fails, free the original oa_config_ids before returning
to avoid a memory leak.

Fixes: 4f6ccc74a85c ("drm/i915: add support for perf configuration queries")
Signed-off-by: Thorsten Blum &lt;thorsten.blum@linux.dev&gt;
Cc: &lt;stable@vger.kernel.org&gt; # v5.5+
Reviewed-by: Andi Shyti &lt;andi.shyti@linux.intel.com&gt;
Signed-off-by: Andi Shyti &lt;andi.shyti@linux.intel.com&gt;
Link: https://patch.msgid.link/20260823205028.178597-2-thorsten.blum@linux.dev
(cherry picked from commit 9977e9d84f46d4f12ad35fbbc0ec4638554bce87)
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/dp: Gate UHBR SST SDP splitting on sink capability</title>
<updated>2026-09-10T08:05:09+00:00</updated>
<author>
<name>Mitul Golani</name>
<email>mitulkumar.ajitkumar.golani@intel.com</email>
</author>
<published>2026-08-25T07:32:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=a894f97318366d12102c15937aa6b63c21aa82b5'/>
<id>urn:sha1:a894f97318366d12102c15937aa6b63c21aa82b5</id>
<content type='text'>
SDP splitting for 128b/132b (UHBR) SST audio must only be enabled when
the sink advertises support for it. Previously sdp_split_enable
was set for every UHBR SST stream carrying audio, regardless of sink
capability.

In MST mode SDP splitting is inherently supported, so the sink
capability check (DP_SST_SPLIT_SDP_CAP) is applied only to the SST path.

Fixes: 8853750dbad8 ("drm/i915: Enable SDP split for DP2.0")
Assisted-by: Claude:claude-opus-4-8
Signed-off-by: Mitul Golani &lt;mitulkumar.ajitkumar.golani@intel.com&gt;
Reviewed-by: Suraj Kandpal &lt;suraj.kandpal@intel.com&gt;
Signed-off-by: Suraj Kandpal &lt;suraj.kandpal@intel.com&gt;
Link: https://patch.msgid.link/20260825073204.872441-1-mitulkumar.ajitkumar.golani@intel.com
(cherry picked from commit b37921c9f533ca936c5b5a484c1299680c570a7e)
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915: Guard against NULL driver_data in i915_pci_probe()</title>
<updated>2026-08-31T09:56:49+00:00</updated>
<author>
<name>Deepanshu Kartikey</name>
<email>kartikey406@gmail.com</email>
</author>
<published>2026-08-13T06:49:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=3785d40831ba5601296283e0197e10e089392757'/>
<id>urn:sha1:3785d40831ba5601296283e0197e10e089392757</id>
<content type='text'>
pci_match_device() can return the dummy pci_device_id_any entry
when a device is force-bound via sysfs driver_override, in which
case -&gt;driver_data is unset (NULL). i915_pci_probe() casts it to
struct intel_device_info * unconditionally and dereferences
intel_info-&gt;require_force_probe, causing a NULL-ptr-deref.

Reported-by: syzbot+db96c5ff032f4292a8dc@syzkaller.appspotmail.com
Closes: https://syzkaller.appspot.com/bug?extid=db96c5ff032f4292a8dc
Tested-by: syzbot+db96c5ff032f4292a8dc@syzkaller.appspotmail.com
Cc: stable@vger.kernel.org
Signed-off-by: Deepanshu Kartikey &lt;kartikey406@gmail.com&gt;
Link: https://patch.msgid.link/20260813064902.367504-1-kartikey406@gmail.com
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
(cherry picked from commit 2727922084672cc274ecea726ea00363c2893731)
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/cdclk: Fix dg2_power_well_count() return type</title>
<updated>2026-08-31T09:56:49+00:00</updated>
<author>
<name>Ville Syrjälä</name>
<email>ville.syrjala@linux.intel.com</email>
</author>
<published>2026-08-26T14:31:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=a154f2ae8eecbf2a4f97376d29b8d38c198b54e7'/>
<id>urn:sha1:a154f2ae8eecbf2a4f97376d29b8d38c198b54e7</id>
<content type='text'>
dg2_power_well_count() is supposed to return an integer,
not a boolean. Make it so.

Fixes: 9112ce99c1d7 ("drm/i915/cdclk: Extract dg2_power_well_count()")
Signed-off-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Link: https://patch.msgid.link/20260826143100.19401-1-ville.syrjala@linux.intel.com
Reviewed-by: Matt Roper &lt;matthew.d.roper@intel.com&gt;
(cherry picked from commit dcf423710d0253d7d729c3992bbae0c6197c9c22)
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/cdclk: Avoid spurious cdclk sanitization on PTL+</title>
<updated>2026-08-31T09:56:49+00:00</updated>
<author>
<name>Ville Syrjälä</name>
<email>ville.syrjala@linux.intel.com</email>
</author>
<published>2026-07-17T15:51:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=aad969968824e97ba8d70dd7a95691f750438ebd'/>
<id>urn:sha1:aad969968824e97ba8d70dd7a95691f750438ebd</id>
<content type='text'>
Apparently PTL+ no longer has the cd2x pipe select field in
CDCLK_CTL. Take that into account during CDCLK sanitization.

This currently triggers a spurious CDCLK sanitization during
driver load on PTL+ which will causes a visible glitch on all
active displays.

Cc: stable@vger.kernel.org
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8550
Fixes: 2ee8dbd880b1 ("drm/i915/cdclk: Fix up CDCLK_FREQ_DECIMAL without a full PLL re-enable")
Signed-off-by: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Link: https://patch.msgid.link/20260717155107.17801-1-ville.syrjala@linux.intel.com
Reviewed-by: Suraj Kandpal &lt;suraj.kandpal@intel.com&gt;
(cherry picked from commit 1786d26887817a779641d3a093c66ac91382113b)
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/display: Clear SEL_FETCH_PLANE_CTL on plane disable</title>
<updated>2026-08-31T09:56:49+00:00</updated>
<author>
<name>Nemesa Garg</name>
<email>nemesa.garg@intel.com</email>
</author>
<published>2026-08-18T09:51:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=7f1172a2ac0d7e50850785e2e65789c8aac8411a'/>
<id>urn:sha1:7f1172a2ac0d7e50850785e2e65789c8aac8411a</id>
<content type='text'>
icl_plane_disable_sel_fetch_arm() wrote SEL_FETCH_PLANE_CTL = 0 only when
crtc_state-&gt;enable_psr2_sel_fetch was set. If a plane was disabled after
selective fetch had been turned off, the guard fired early and left the
register's enable bit set in hardware.

The bit is harmless until selective fetch is re-enabled.  When it is, the
hardware resumes fetching for the now-disabled plane and keeps its old DDB
range reserved.

i9xx_cursor_disable_sel_fetch_arm() has the same guard on SEL_FETCH_CUR_CTL
and is fixed the same way.

v2: Add same check for cursor also. [sashiko]

Cc: stable@vger.kernel.org
Fixes: b1f5279b5981 ("drm/i915/psr: Move plane sel fetch configuration into plane source files")
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/8739
Assisted-by: GitHub-Copilot:claude-opus-4.6
Signed-off-by: Nemesa Garg &lt;nemesa.garg@intel.com&gt;
Reviewed-by: Jouni Högander &lt;jouni.hogander@intel.com&gt;
Signed-off-by: Animesh Manna &lt;animesh.manna@intel.com&gt;
Link: https://patch.msgid.link/20260818095149.2172935-1-nemesa.garg@intel.com
(cherry picked from commit 600a7c9d40e5e0c5544f42d1c9592c8d15224dc0)
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/lt_phy: program DDI_CLK_VALFREQ with DDI clock frequency</title>
<updated>2026-08-31T09:56:49+00:00</updated>
<author>
<name>Suraj Kandpal</name>
<email>suraj.kandpal@intel.com</email>
</author>
<published>2026-08-11T17:58:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=1d79c50e2eeae42b8aad7b5d4d0fe57027174e8a'/>
<id>urn:sha1:1d79c50e2eeae42b8aad7b5d4d0fe57027174e8a</id>
<content type='text'>
DDI_CLK_VALFREQ is programmed with the port clock, which for DP is the
symbol clock computed assuming 8b/10b encoding (link_rate / 10). For
DP 128b/132b (UHBR) rates and for HDMI FRL the port clock needs to
be modified.
DDI_CLK_VALFREQ does not have any functional impact on H/w, it
only records the frequency S/w intends to set.
Use intel_ddi_link_symbol_clock() to write the correct DDI clock in
kHz

Fixes: 5ec58d714935 ("drm/i915/lt_phy: Add .enable_clock hook on DDI")
Signed-off-by: Suraj Kandpal &lt;suraj.kandpal@intel.com&gt;
Reviewed-by: Ankit Nautiyal &lt;ankit.k.nautiyal@intel.com&gt;
Link: https://patch.msgid.link/20260811175844.2613721-4-suraj.kandpal@intel.com
(cherry picked from commit eaed815ca3483c227e4ec80b86d1b3ce5c2508be)
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/cx0: program DDI_CLK_VALFREQ with DDI clock frequency</title>
<updated>2026-08-31T09:56:49+00:00</updated>
<author>
<name>Suraj Kandpal</name>
<email>suraj.kandpal@intel.com</email>
</author>
<published>2026-08-11T17:58:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=0cd42b346d13486f8f31c0846f9f2a9241e191c2'/>
<id>urn:sha1:0cd42b346d13486f8f31c0846f9f2a9241e191c2</id>
<content type='text'>
DDI_CLK_VALFREQ is programmed with the port clock, which for DP is the
symbol clock computed assuming 8b/10b encoding (link_rate / 10). For
DP 128b/132b (UHBR) rates and for HDMI FRL the port clock needs to
be modfied.
DDI_CLK_VALFREQ does not have any functional impact on H/w, it
only records the frequency S/w intends to set.
Use intel_ddi_link_symbol_clock() to write the correct DDI clock in
kHz.

Fixes: 51390cc0e00a ("drm/i915/mtl: Add Support for C10 PHY message bus and pll programming")
Fixes: 73fc3abcb797 ("drm/i915/mtl: Enabling/disabling sequence Thunderbolt pll")
Signed-off-by: Suraj Kandpal &lt;suraj.kandpal@intel.com&gt;
Reviewed-by: Ankit Nautiyal &lt;ankit.k.nautiyal@intel.com&gt;
Link: https://patch.msgid.link/20260811175844.2613721-3-suraj.kandpal@intel.com
(cherry picked from commit 9ac3ee6c0f92cd09893bd442964fb6b0d6813b5e)
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/ddi: add helper to compute DDI clock frequency</title>
<updated>2026-08-31T09:56:48+00:00</updated>
<author>
<name>Suraj Kandpal</name>
<email>suraj.kandpal@intel.com</email>
</author>
<published>2026-08-11T17:58:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=900f48940abcb5294dac8f1b5335cdc562798734'/>
<id>urn:sha1:900f48940abcb5294dac8f1b5335cdc562798734</id>
<content type='text'>
Add intel_ddi_link_symbol_clock() to return the DDI clock frequency for
a given port clock:
  DP 8b/10b : rate
  DP 128b/132b (UHBR) : (10 / 32) * rate
  HDMI FRL  : (10 / 18) * rate
  HDMI TMDS : rate

The DP case reuses intel_dp_link_symbol_clock().
This will help in upcoming commits to decide value to be written
in DDI_CLK_VALFREQ.

Signed-off-by: Suraj Kandpal &lt;suraj.kandpal@intel.com&gt;
Reviewed-by: Ankit Nautiyal &lt;ankit.k.nautiyal@intel.com&gt;
Link: https://patch.msgid.link/20260811175844.2613721-2-suraj.kandpal@intel.com
(cherry picked from commit 5abc20e39dd074e8696387ca6871d6e432baf0cd)
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915/dp_mst: Remove duplicate intel_pfit_compute_config() call</title>
<updated>2026-08-31T09:25:16+00:00</updated>
<author>
<name>Chaitanya Kumar Borah</name>
<email>chaitanya.kumar.borah@intel.com</email>
</author>
<published>2026-08-06T07:48:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=6463655ab2946d13d2ec5efe04a5c2bf9d675f01'/>
<id>urn:sha1:6463655ab2946d13d2ec5efe04a5c2bf9d675f01</id>
<content type='text'>
mst_stream_compute_config() called intel_pfit_compute_config() twice
in a row.

commit 5ce9ac1531b8 ("drm/i915/mst: Call intel_pfit_compute_config()
for sharpness filter")
was erroneously cherry-picked to the fixes tree while
commit ca97f5546f19 ("drm/i915/mst: Call intel_pfit_compute_config()
for sharpness filter")
was already in there.

Drop the redundant duplicate call.

Cc: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
Cc: Ville Syrjälä &lt;ville.syrjala@linux.intel.com&gt;
Cc: Nemesa Garg &lt;nemesa.garg@intel.com&gt;
Cc: Jani Nikula &lt;jani.nikula@linux.intel.com&gt;
Fixes: 5ce9ac1531b8 ("drm/i915/mst: Call intel_pfit_compute_config() for sharpness filter")
Signed-off-by: Chaitanya Kumar Borah &lt;chaitanya.kumar.borah@intel.com&gt;
Reviewed-by: Nemesa Garg &lt;nemesa.garg@intel.com&gt;
Link: https://patch.msgid.link/20260806074819.2631970-1-chaitanya.kumar.borah@intel.com
Signed-off-by: Rodrigo Vivi &lt;rodrigo.vivi@intel.com&gt;
[Rodrigo: adjusted commit message]
(cherry picked from commit ea9f3470d33602fb776ea55443467baacf66f23a)
Signed-off-by: Jani Nikula &lt;jani.nikula@intel.com&gt;
</content>
</entry>
</feed>
