kernel/git/stable/linux.git/drivers/mailbox, branch linux-5.12.y

mailbox: qcom-ipcc: Fix IPCC mbox channel exhaustion

2021-07-14T15:00:30+00:00

commit d6fbfdbc12745ce24bcd348dbf7e652353b3e59c upstream. Fix IPCC (Inter-Processor Communication Controller) channel exhaustion by setting the channel private data to NULL on mbox shutdown. Err Logs: remoteproc: MBA booted without debug policy, loading mpss remoteproc: glink-edge: failed to acquire IPC channel remoteproc: failed to probe subdevices for remoteproc: -16 Fixes: fa74a0257f45 ("mailbox: Add support for Qualcomm IPCC") Signed-off-by: Sibi Sankar Cc: stable@vger.kernel.org Reviewed-by: Bjorn Andersson Reviewed-by: Manivannan Sadhasivam Signed-off-by: Jassi Brar Signed-off-by: Greg Kroah-Hartman

mailbox: qcom: Use PLATFORM_DEVID_AUTO to register platform device

2021-07-14T14:59:29+00:00

[ Upstream commit 96e39e95c01283ff5695dafe659df88ada802159 ] In adding APCS clock support for MSM8939, the second clock registration fails due to duplicate device name like below. [ 0.519657] sysfs: cannot create duplicate filename '/bus/platform/devices/qcom-apcs-msm8916-clk' ... [ 0.661158] qcom_apcs_ipc b111000.mailbox: failed to register APCS clk This is because MSM8939 has 3 APCS instances for Cluster0 (little cores), Cluster1 (big cores) and CCI (Cache Coherent Interconnect). Although only APCS of Cluster0 and Cluster1 have IPC bits, each of 3 APCS has A53PLL clock control bits. That said, 3 'qcom-apcs-msm8916-clk' devices need to be registered to instantiate all 3 clocks. Use PLATFORM_DEVID_AUTO rather than PLATFORM_DEVID_NONE for platform_device_register_data() call to fix the issue above. Signed-off-by: Shawn Guo Reviewed-by: Bjorn Andersson Signed-off-by: Jassi Brar Signed-off-by: Sasha Levin

mailbox: sprd: Introduce refcnt when clients requests/free channels

2021-05-14T08:52:41+00:00

[ Upstream commit 9468ab84032f96496e998cfa173cd1d0ac316bcd ] Unisoc mailbox has no way to be enabled/disabled for any single channel. They can only be set to startup or shutdown as a whole device at same time. Add a variable to count references to avoid mailbox FIFO being reset unexpectedly when clients are requesting or freeing channels. Also add a lock to dismiss possible conflicts from register r/w in different startup or shutdown threads. And fix the crash problem when early interrupts come from channel which has not been requested by client yet. Fixes: ca27fc26cd22 ("mailbox: sprd: Add Spreadtrum mailbox driver") Signed-off-by: Orson Zhai Reviewed-by: Baolin Wang Signed-off-by: Jassi Brar Signed-off-by: Sasha Levin

treewide: change my e-mail address, fix my name

2021-04-09T21:54:23+00:00

Change my e-mail address to kabel@kernel.org, and fix my name in non-code parts (add diacritical mark). Link: https://lkml.kernel.org/r/20210325171123.28093-2-kabel@kernel.org Signed-off-by: Marek Behún Cc: Bartosz Golaszewski Cc: Greg Kroah-Hartman Cc: Jassi Brar Cc: Linus Walleij Cc: Pavel Machek Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

mailbox: arm_mhuv2: Skip calling kfree() with invalid pointer

2021-02-22T19:34:27+00:00

It is possible that 'data' passed to kfree() is set to a error value instead of allocated space. Make sure it doesn't get called with invalid pointer. Fixes: 5a6338cce9f4 ("mailbox: arm_mhuv2: Add driver") Cc: v5.11 # v5.11 Reported-by: kernel test robot Reported-by: Dan Carpenter Signed-off-by: Viresh Kumar Signed-off-by: Jassi Brar

mailbox: tegra-hsp: Set lockdep class dynamically

2021-02-15T05:28:40+00:00

On Tegra194, due to both BPMP and TCU using mailboxes, we get a lockdep spew at boot. Both are using different instances of HSP, so this is harmless. As such give each HSP instance a different lockdep class. Signed-off-by: Mikko Perttunen Signed-off-by: Jassi Brar

mailbox: sprd: correct definition of SPRD_OUTBOX_FIFO_FULL

2021-02-15T05:28:20+00:00

According to the specification, bit[2] represents SPRD_OUTBOX_FIFO_FULL, not bit[0], so correct it. Fixes: ca27fc26cd22 ("mailbox: sprd: Add Spreadtrum mailbox driver") Signed-off-by: Magnum Shan Signed-off-by: Chunyan Zhang Reviewed-by: Baolin Wang Signed-off-by: Jassi Brar

mailbox: arm_mhuv2: make remove callback return void

2021-02-15T05:27:16+00:00

My build tests failed to catch that amba driver that would have needed adaption in commit 3fd269e74f2f ("amba: Make the remove callback return void"). Change the remove function to make the driver build again. Reported-by: kernel test robot Fixes: 3fd269e74f2f ("amba: Make the remove callback return void") Signed-off-by: Uwe Kleine-König Acked-by: Viresh Kumar Signed-off-by: Jassi Brar

mailbox: arm_mhuv2: Fix sparse warnings

2021-02-15T05:26:31+00:00

This patch fixes a bunch of sparse warnings in the newly added arm_mhuv2 driver. drivers/mailbox/arm_mhuv2.c:506:24: warning: incorrect type in argument 1 (different address spaces) drivers/mailbox/arm_mhuv2.c:506:24: expected void const volatile [noderef] __iomem *addr drivers/mailbox/arm_mhuv2.c:506:24: got unsigned int [usertype] * drivers/mailbox/arm_mhuv2.c:547:42: warning: incorrect type in argument 2 (different address spaces) drivers/mailbox/arm_mhuv2.c:547:42: expected unsigned int [usertype] *reg drivers/mailbox/arm_mhuv2.c:547:42: got unsigned int [noderef] __iomem * drivers/mailbox/arm_mhuv2.c:625:42: warning: incorrect type in argument 2 (different address spaces) drivers/mailbox/arm_mhuv2.c:625:42: expected unsigned int [usertype] *reg drivers/mailbox/arm_mhuv2.c:625:42: got unsigned int [noderef] __iomem * drivers/mailbox/arm_mhuv2.c:972:24: warning: dereference of noderef expression drivers/mailbox/arm_mhuv2.c:973:22: warning: dereference of noderef expression drivers/mailbox/arm_mhuv2.c:993:25: warning: dereference of noderef expression drivers/mailbox/arm_mhuv2.c:1026:24: warning: dereference of noderef expression drivers/mailbox/arm_mhuv2.c:1027:22: warning: dereference of noderef expression drivers/mailbox/arm_mhuv2.c:1048:17: warning: dereference of noderef expression Reported-by: kernel test robot Signed-off-by: Viresh Kumar Signed-off-by: Jassi Brar

mailbox: qcom: Add support for SDX55 APCS IPC

2021-02-15T05:25:35+00:00

In SDX55, the IPC bits are located in the APCS GCC block. Also, this block can provide clock functionality. Hence, add support for IPC with correct offset and name of the clock provider. Signed-off-by: Manivannan Sadhasivam Signed-off-by: Jassi Brar