kernel/git/stable/linux.git/drivers/mtd/devices/m25p80.c, branch master

mtd: spi-nor: Move m25p80 code in spi-nor.c

2019-08-12T07:54:12+00:00

The m25p80 driver is actually a generic wrapper around the spi-mem layer. Not only the driver name is misleading, but we'd expect such a common logic to be directly available in the core. Another reason for moving this code is that SPI NOR controller drivers should progressively be replaced by SPI controller drivers implementing the spi_mem_ops interface, and when the conversion is done, we should have a single spi-nor driver directly interfacing with the spi-mem layer. While moving the code we also fix a longstanding issue when non-DMA-able buffers are passed by the MTD layer. Signed-off-by: Boris Brezillon Signed-off-by: Vignesh Raghavendra Signed-off-by: Tudor Ambarus

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 420

2019-06-05T15:37:15+00:00

Based on 1 normalized pattern(s): this code is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 6 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Reviewed-by: Armijn Hemel Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190531190113.627158185@linutronix.de Signed-off-by: Greg Kroah-Hartman

mtd: m25p80: add support of octal mode I/O transfer

2019-01-17T07:43:14+00:00

Add support for octal mode I/O data transfer based on the controller (spi) mode. Assign hw-capability mask bits for octal transfer. Signed-off-by: Yogesh Narayan Gaur Reviewed-by: Tudor Ambarus Signed-off-by: Boris Brezillon

Merge tag 'mtd/for-4.20' of git://git.infradead.org/linux-mtd

2018-10-23T00:09:22+00:00

Pull mtd updates from Boris Brezillon: "SPI NOR core changes: - Support non-uniform erase size - Support controllers with limited TX fifo size Driver changes: - m25p80: Re-issue a WREN command after each write access - cadence: Pass a proper dir value to dma_[un]map_single() - fsl-qspi: Check fsl_qspi_get_seqid() return val make sure 4B addressing opcodes are properly handled - intel-spi: Add a new PCI entry for Ice Lake Raw NAND core changes: - Two batchs of cleanups of the NAND API, including: * Deprecating a lot of interfaces (now replaced by ->exec_op()). * Moving code in separate drivers (JEDEC, ONFI), in private files (internals), in platform drivers, etc. * Functions/structures reordering. * Exclusive use of the nand_chip structure instead of the MTD one all across the subsystem. - Addition of the nand_wait_readrdy/rdy_op() helpers. Raw NAND controllers drivers changes: - Various coccinelle patches. - Marvell: * Use regmap_update_bits() for syscon access. * More documentation. * BCH failure path rework. * More layouts to be supported. * IRQ handler complete() condition fixed. - Fsl_ifc: * SRAM initialization fixed for newer controller versions. - Denali: * Fix licenses mismatch and use a SPDX tag. * Set SPARE_AREA_SKIP_BYTES register to 8 if unset. - Qualcomm: * Do not include dma-direct.h. - Docg4: * Removed. - Ams-delta: * Use of a GPIO lookup table * Internal machinery changes. Raw NAND chip drivers changes: - Toshiba: * Add support for Toshiba memory BENAND * Pass a single nand_chip object to the status helper. - ESMT: * New driver to retrieve the ECC requirements from the 5th ID byte. MTD changes: - physmap cleanups/fixe - gpio-addr-flash cleanups/fixes" * tag 'mtd/for-4.20' of git://git.infradead.org/linux-mtd: (93 commits) jffs2: free jffs2_sb_info through jffs2_kill_sb() mtd: spi-nor: fsl-quadspi: fix read error for flash size larger than 16MB mtd: spi-nor: intel-spi: Add support for Intel Ice Lake SPI serial flash mtd: maps: gpio-addr-flash: Convert to gpiod mtd: maps: gpio-addr-flash: Replace array with an integer mtd: maps: gpio-addr-flash: Use order instead of size mtd: spi-nor: fsl-quadspi: Don't let -EINVAL on the bus mtd: devices: m25p80: Make sure WRITE_EN is issued before each write mtd: spi-nor: Support controllers with limited TX FIFO size mtd: spi-nor: cadence-quadspi: Use proper enum for dma_[un]map_single mtd: spi-nor: parse SFDP Sector Map Parameter Table mtd: spi-nor: add support to non-uniform SFDP SPI NOR flash memories mtd: rawnand: marvell: fix the IRQ handler complete() condition mtd: rawnand: denali: set SPARE_AREA_SKIP_BYTES register to 8 if unset mtd: rawnand: r852: fix spelling mistake "card_registred" -> "card_registered" mtd: rawnand: toshiba: Pass a single nand_chip object to the status helper mtd: maps: gpio-addr-flash: Use devm_* functions mtd: maps: gpio-addr-flash: Fix ioremapped size mtd: maps: gpio-addr-flash: Replace custom printk mtd: physmap_of: Release resources on error ...

mtd: devices: m25p80: Make sure WRITE_EN is issued before each write

2018-10-08T19:28:27+00:00

Some SPI controllers can't write nor->page_size bytes in a single step because their TX FIFO is too small, but when that happens we should make sure a WRITE_EN command before each write access and READ_SR command after each write access is issued. The core is already taking care of that, so all we have to do here is return the actual number of bytes that were written during the spi_mem_exec_op() operation. Signed-off-by: Yogesh Gaur Signed-off-by: Boris Brezillon

mtd: devices: m25p80: Make sure the buffer passed in op is DMA-able

2018-09-18T08:17:48+00:00

As documented in spi-mem.h, spi_mem_op->data.buf.{in,out} must be DMA-able, and commit 4120f8d158ef ("mtd: spi-nor: Use the spi_mem_xx() API") failed to follow this rule as buffers passed to ->{read,write}_reg() are usually placed on the stack. Fix that by allocating a scratch buffer and copying the data around. Fixes: 4120f8d158ef ("mtd: spi-nor: Use the spi_mem_xx() API") Reported-by: Jarkko Nikula Cc: Signed-off-by: Boris Brezillon Tested-by: Jarkko Nikula Reviewed-by: Jarkko Nikula

Merge tag 'spi-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

2018-08-14T19:01:08+00:00

Pull spi updates from Mark Brown: "Quite an active release for the SPI subsystem, lots of small updates and fixes scattered about with highlights including: - 3-wire support in the GPIO driver. - support for setting a custom memory name in the memory mapped flash drivers. - support for extended mode in the Freescale DSPI controller. - support for the non-standard integration with the Microsemi Ocelot platform in the DesignWare driver. - new driver for the SocioNext UniPhier" * tag 'spi-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (47 commits) spi: davinci: fix a NULL pointer dereference spi: spi-mem: Constify spi_mem->name mtd: m25p80: Call spi_mem_get_name() to let controller set a custom name spi: spi-mem: Extend the SPI mem interface to set a custom memory name spi: spi-mem: Fix a typo in the documentation of struct spi_mem spi: uniphier: remove unnecessary include headers spi: spi-gpio: add SPI_3WIRE support spi: add flags parameter to txrx_word function pointers spi: add SPI controller driver for UniPhier SoC spi: add DT bindings for UniPhier SPI controller spi: dw: document Microsemi integration spi: img-spfi: Set device select bits for SPFI port state spi: omap2-mcspi: remove several redundant variables spi: dw-mmio: add MSCC Ocelot support spi: dw: export dw_spi_set_cs spi: spi-fsl-espi: Log fifo counters on error spi: imx: Use the longuest possible burst size when in dynamic_burst spi: imx: remove unnecessary check in spi_imx_can_dma spi: imx: Use correct number of bytes per words spi: imx: Use dynamic bursts only when bits_per_word is 8, 16 or 32 ...

mtd: m25p80: Call spi_mem_get_name() to let controller set a custom name

2018-08-02T14:35:42+00:00

By calling spi_mem_get_name(), the driver of the (Q)SPI controller can set a custom name for the memory device if necessary. This is useful to keep mtdparts compatible when controller drivers are ported from the MTD to the SPI layer. Suggested-by: Boris Brezillon Signed-off-by: Frieder Schrempf Acked-by: Boris Brezillon Signed-off-by: Mark Brown

mtd: m25p80: Use SPI_MEM_OP_NO_DUMMY instead of SPI_MEM_OP_DUMMY(0, x)

2018-06-18T09:45:57+00:00

SPI_MEM_OP_DUMMY(0, x) means there's 0 dummy bytes to send, which is similar to SPI_MEM_OP_NO_DUMMY except it's less clear. Use SPI_MEM_OP_NO_DUMMY instead of SPI_MEM_OP_DUMMY(0, x) in m25p80_write(). Also stop updating op.dummy.buswidth since this value is only meaningful if you have dummy bytes. Reported-by: Cyrille Pitchen Signed-off-by: Boris Brezillon Acked-by: Marek Vasut

mtd: m25p80: Remove unneeded m25p->command field

2018-06-18T09:45:55+00:00

The ->command field is no longer used, remove it. Signed-off-by: Boris Brezillon Acked-by: Marek Vasut