kernel/git/stable/linux.git/drivers/net/dsa/mv88e6131.c, branch master

net: dsa: mv88e6xxx: factorize the switch driver

2016-05-09T18:26:13+00:00

Now that all drivers support the same set of functions and the same setup code, drop every model-specific DSA switch driver and replace them with a common mv88e6xxx driver. This merges the info tables into one, removes the function exports, the model-specific files, and update the defconfigs. Signed-off-by: Vivien Didelot Signed-off-by: David S. Miller

net: dsa: mv88e6131: use EDSA tag protocol

2016-05-09T18:26:13+00:00

6131 is the only driver to set the tag protocol to DSA_TAG_PROTO_DSA. Since it works fine with DSA_TAG_PROTO_EDSA, change its value, like all other mv88e6xxx drivers. Signed-off-by: Vivien Didelot Signed-off-by: David S. Miller

net: dsa: mv88e6xxx: factorize switch setup

2016-05-09T18:26:12+00:00

Provide a shared mv88e6xxx_setup function to the drivers. Signed-off-by: Vivien Didelot Signed-off-by: David S. Miller

net: dsa: mv88e6131: drop frames priorities setup

2016-05-09T18:26:12+00:00

6131 is the only driver which setups the priority of IGMP/MLD snoop frames and ARP frames to the highest setting. Drop such change until we figure out a common configuration for all switch models. Signed-off-by: Vivien Didelot Signed-off-by: David S. Miller

net: dsa: mv88e6xxx: factorize GLOBAL_CONTROL_2 setup

2016-05-09T18:26:12+00:00

All switch models setup the GLOBAL_CONTROL_2 register with slightly differences. Since the cascade mode is valid even in a single chip setup, factorize such configuration. Signed-off-by: Vivien Didelot Signed-off-by: David S. Miller

net: dsa: mv88e6xxx: factorize GLOBAL_MONITOR_CONTROL setup

2016-05-09T18:26:12+00:00

All switch drivers configure the GLOBAL_MONITOR_CONTROL register with slightly changes. Assume the setup of the upstream port, and configure it as the port to which ingress and egress and ARP monitor frames are to be sent. Signed-off-by: Vivien Didelot Signed-off-by: David S. Miller

net: dsa: mv88e6131: drop VLAN Ethertype setup

2016-05-09T18:26:11+00:00

The 6131 switch models have a Core Tag Type register. Their setup code is setting it to 0x8100, which is the reset default. Drop this specific part which is correctly configured on reset anyway. Signed-off-by: Vivien Didelot Signed-off-by: David S. Miller

net: dsa: mv88e6xxx: factorize GLOBAL_CONTROL setup

2016-05-09T18:26:11+00:00

All switch models configure the GLOBAL_CONTROL register with slightly differences. Discarding packets with excessive collisions (GLOBAL_CONTROL_DISCARD_EXCESS) is specific to 6352 and similar switches, and setting a maximum frame size (GLOBAL_CONTROL_MAX_FRAME_1632) is specific to 6185 and similar switches. As we are centralizing the chips setup, skip these settings and don't discard any frames yet, until we found out that such discarding by the hardware is necessary. Assume a common setup to enable the PHY Polling Unit if present, don't discard any packets, and mask all interrupt sources. Tested on 88E6352 and 88E6185. Signed-off-by: Vivien Didelot Signed-off-by: David S. Miller

net: dsa: mv88e6xxx: factorize global setup

2016-05-09T18:26:11+00:00

Every driver is calling mv88e6xxx_setup_global after mv88e6xxx_setup_common. Call the former in the latter. Signed-off-by: Vivien Didelot Signed-off-by: David S. Miller

net: dsa: mv88e6xxx: factorize switch reset

2016-05-09T18:26:11+00:00

Add a MV88E6XXX_FLAG_PPU_ACTIVE flag to describe how to reset the switch, and merge the reset call to the common setup code. Signed-off-by: Vivien Didelot Signed-off-by: David S. Miller