<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/stable/linux.git/drivers/pci/access.c, branch linux-3.15.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<id>https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=linux-3.15.y</id>
<link rel='self' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=linux-3.15.y'/>
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<updated>2014-01-13T18:14:43+00:00</updated>
<entry>
<title>PCI: Remove unused pci_vpd_truncate()</title>
<updated>2014-01-13T18:14:43+00:00</updated>
<author>
<name>Stephen Hemminger</name>
<email>stephen@networkplumber.org</email>
</author>
<published>2014-01-10T22:10:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=3984ca1c6e493d06fa7e8dc96ce2b23b86175ec4'/>
<id>urn:sha1:3984ca1c6e493d06fa7e8dc96ce2b23b86175ec4</id>
<content type='text'>
My philosophy is unused code is dead code.  And dead code is subject to bit
rot and is a likely source of bugs.  Use it or lose it.

This reverts db5679437a2b ("PCI: add interface to set visible size of
VPD"), removing this interface:

    pci_vpd_truncate()

[bhelgaas: split to separate patch, also remove prototype from pci.h]
Signed-off-by: Stephen Hemminger &lt;stephen@networkplumber.org&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
</entry>
<entry>
<title>PCI: Remove pcie_cap_has_devctl()</title>
<updated>2013-08-29T02:51:39+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2013-08-28T18:03:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=fed2451512495f0f0820ac9e53936bd208569bc8'/>
<id>urn:sha1:fed2451512495f0f0820ac9e53936bd208569bc8</id>
<content type='text'>
pcie_cap_has_devctl() does nothing, so remove it.  Simplicity over
consistency in this case.  No functional change.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-By: Jiang Liu &lt;jiang.liu@huawei.com&gt;</content>
</entry>
<entry>
<title>PCI: Support PCIe Capability Slot registers only for ports with slots</title>
<updated>2013-08-29T02:51:39+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2013-08-28T18:01:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=6d3a1741f1e648cfbd5a0cc94477a0d5004c6f5e'/>
<id>urn:sha1:6d3a1741f1e648cfbd5a0cc94477a0d5004c6f5e</id>
<content type='text'>
Previously we allowed callers to access Slot Capabilities, Status, and
Control for Root Ports even if the Root Port did not implement a slot.
This seems dubious because the spec only requires these registers if a
slot is implemented.

It's true that even Root Ports without slots must have *space* for these
slot registers, because the Root Capabilities, Status, and Control
registers are after the slot registers in the capability.  However,
for a v1 PCIe Capability, the *semantics* of the slot registers are
undefined unless a slot is implemented.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-By: Jiang Liu &lt;jiang.liu@huawei.com&gt;</content>
</entry>
<entry>
<title>PCI: Remove PCIe Capability version checks</title>
<updated>2013-08-29T02:51:39+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2013-08-28T17:33:53+00:00</published>
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<id>urn:sha1:c8b303d0206b28c4ff3aecada47108d1655ae00f</id>
<content type='text'>
Previously we relied on the PCIe r3.0, sec 7.8, spec language that says
"For Functions that do not implement the [Link, Slot, Root] registers,
these spaces must be hardwired to 0b," which means that for v2 PCIe
capabilities, we don't need to check the device type at all.

But it's simpler if we don't need to check the capability version at all,
and I think the spec is explicit enough about which registers are required
for which types that we can remove the version checks.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-By: Jiang Liu &lt;jiang.liu@huawei.com&gt;</content>
</entry>
<entry>
<title>PCI: Allow PCIe Capability link-related register access for switches</title>
<updated>2013-08-28T17:28:22+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2013-08-27T15:54:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=d3694d4fa3f44f6a295f8ab064937c8a1549d174'/>
<id>urn:sha1:d3694d4fa3f44f6a295f8ab064937c8a1549d174</id>
<content type='text'>
Every PCIe device has a link, except Root Complex Integrated Endpoints
and Root Complex Event Collectors.  Previously we didn't give access
to PCIe capability link-related registers for Upstream Ports, Downstream
Ports, and Bridges, so attempts to read PCI_EXP_LNKCTL incorrectly
returned zero.  See PCIe spec r3.0, sec 7.8 and 1.3.2.3.

Reference: http://lkml.kernel.org/r/979A8436335E3744ADCD3A9F2A2B68A52AD136BE@SJEXCHMB10.corp.ad.broadcom.com
Reported-by: Yuval Mintz &lt;yuvalmin@broadcom.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-By: Jiang Liu &lt;jiang.liu@huawei.com&gt;</content>
</entry>
<entry>
<title>PCI: Fix PCI Express Capability accessors for PCI_EXP_FLAGS</title>
<updated>2013-02-15T18:46:24+00:00</updated>
<author>
<name>Alex Williamson</name>
<email>alex.williamson@redhat.com</email>
</author>
<published>2013-02-14T18:35:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=969daa349f4821a02936af7202b51a9affc7b6da'/>
<id>urn:sha1:969daa349f4821a02936af7202b51a9affc7b6da</id>
<content type='text'>
PCI_EXP_FLAGS_TYPE is a mask, not an offset.  Fix it.

Previously, pcie_capability_read_word(..., PCI_EXP_FLAGS, ...) would
fail.

[bhelgaas:  tweak changelog]
Signed-off-by: Alex Williamson &lt;alex.williamson@redhat.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
CC: stable@vger.kernel.org	# v3.7+</content>
</entry>
<entry>
<title>PCI: Use PCI Express Capability accessor</title>
<updated>2013-01-31T04:24:39+00:00</updated>
<author>
<name>Myron Stowe</name>
<email>myron.stowe@redhat.com</email>
</author>
<published>2013-01-26T00:55:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=1c531d82ee1a220ae7132ba0eb31edaf186b56d1'/>
<id>urn:sha1:1c531d82ee1a220ae7132ba0eb31edaf186b56d1</id>
<content type='text'>
Use PCI Express Capability access functions to simplify device
Capabilities Register usages.

Signed-off-by: Myron Stowe &lt;myron.stowe@redhat.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
</entry>
<entry>
<title>PCI: Add accessors for PCI Express Capability</title>
<updated>2012-08-23T15:41:20+00:00</updated>
<author>
<name>Jiang Liu</name>
<email>jiang.liu@huawei.com</email>
</author>
<published>2012-07-24T09:20:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=8c0d3a02c1309eb6112d2e7c8172e8ceb26ecfca'/>
<id>urn:sha1:8c0d3a02c1309eb6112d2e7c8172e8ceb26ecfca</id>
<content type='text'>
The PCI Express Capability (PCIe spec r3.0, sec 7.8) comes in two
versions, v1 and v2.  In v1 Capability structures (PCIe spec r1.0 and
r1.1), some fields are optional, so the structure size depends on the
device type.

This patch adds functions to access this capability so drivers don't
have to be aware of the differences between v1 and v2.  Note that these
new functions apply only to the "PCI Express Capability," not to any of
the other "PCI Express Extended Capabilities" (AER, VC, ACS, MFVC, etc.)

Function pcie_capability_read_word/dword() reads the PCIe Capabilities
register and returns the value in the reference parameter "val".  If
the PCIe Capabilities register is not implemented on the PCIe device,
"val" is set to 0.

Function pcie_capability_write_word/dword() writes the value to the
specified PCIe Capability register.

Function pcie_capability_clear_and_set_word/dword() sets and/or clears bits
of a PCIe Capability register.

[bhelgaas: changelog, drop "pci_" prefixes, don't export
pcie_capability_reg_implemented()]
Signed-off-by: Jiang Liu &lt;jiang.liu@huawei.com&gt;
Signed-off-by: Yijing Wang &lt;wangyijing@huawei.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
</entry>
<entry>
<title>PCI: export pci_user functions for use by other drivers</title>
<updated>2012-06-12T15:21:42+00:00</updated>
<author>
<name>Alex Williamson</name>
<email>alex.williamson@redhat.com</email>
</author>
<published>2012-06-11T05:27:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=c63587d7f5b9db84e71daf5962dc0394eb657da2'/>
<id>urn:sha1:c63587d7f5b9db84e71daf5962dc0394eb657da2</id>
<content type='text'>
VFIO PCI support will make use of these for user-initiated
PCI config accesses.

Signed-off-by: Alex Williamson &lt;alex.williamson@redhat.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
</entry>
<entry>
<title>PCI: Introduce INTx check &amp; mask API</title>
<updated>2012-01-06T20:10:34+00:00</updated>
<author>
<name>Jan Kiszka</name>
<email>jan.kiszka@siemens.com</email>
</author>
<published>2011-11-04T08:46:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=a2e27787f893621c5a6b865acf6b7766f8671328'/>
<id>urn:sha1:a2e27787f893621c5a6b865acf6b7766f8671328</id>
<content type='text'>
These new PCI services allow to probe for 2.3-compliant INTx masking
support and then use the feature from PCI interrupt handlers. The
services are properly synchronized with concurrent config space access
via sysfs or on device reset.

This enables generic PCI device drivers like uio_pci_generic or KVM's
device assignment to implement the necessary kernel-side IRQ handling
without any knowledge about device-specific interrupt status and control
registers.

Acked-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Jan Kiszka &lt;jan.kiszka@siemens.com&gt;
Signed-off-by: Jesse Barnes &lt;jbarnes@virtuousgeek.org&gt;
</content>
</entry>
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