kernel/git/stable/linux.git/drivers/pinctrl/mvebu, branch linux-3.18.y

pinctrl: mvebu: armada-38x: fix incorrect total number of GPIOs

2015-07-04T03:02:27+00:00

[ Upstream commit 27e7cd016558bf787b128fd882cdd90409ae4036 ] The pinctrl_gpio_range[] array described a first bank of 32 GPIOs and a second one of 27 GPIOs. However, since there is a total of 60 MPP pins that can be muxed as GPIOs, the second bank really has 28 GPIOs. Signed-off-by: Thomas Petazzoni Cc: # v3.15+ Fixes: ca6d9a084b56f ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 380/385") Signed-off-by: Linus Walleij Signed-off-by: Sasha Levin

pinctrl: mvebu: armada-375: remove incorrect space in pin description

2015-07-04T03:02:27+00:00

[ Upstream commit d538990ee12b162f7ce6c0fcef3b643800102676 ] There was an incorrect space in the definition of the function of one pin in the Armada 375 pinctrl driver, which this commit fixes. Signed-off-by: Thomas Petazzoni Cc: # v3.15+ Fixes: ce3ed59dcddd ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 375") Signed-off-by: Linus Walleij Signed-off-by: Sasha Levin

pinctrl: mvebu: armada-xp: fix functions of MPP48

2015-07-04T03:02:27+00:00

[ Upstream commit ea78b9511a54d0de026e04b5da86b30515072f31 ] There was a mistake in the definition of the functions for MPP48 on Marvell Armada XP. The second function is dev(clkout), and not tclk. Signed-off-by: Thomas Petazzoni Cc: # v3.7+ Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP") Signed-off-by: Linus Walleij Signed-off-by: Sasha Levin

pinctrl: mvebu: armada-xp: remove non-existing VDD cpu_pd functions

2015-07-04T03:02:27+00:00

[ Upstream commit 80b3d04feab5e69d51cb2375eb989a7165e43e3b ] The latest version of the Armada XP datasheet no longer documents the VDD cpu_pd functions, which might indicate they are not working and/or not supported. This commit ensures the pinctrl driver matches the datasheet. Signed-off-by: Thomas Petazzoni Cc: # v3.7+ Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP") Signed-off-by: Linus Walleij Signed-off-by: Sasha Levin

pinctrl: mvebu: armada-xp: remove non-existing NAND pins

2015-07-04T03:02:26+00:00

[ Upstream commit bc99357f3690c11817756adfee0ece811a3db2e7 ] After updating to a more recent version of the Armada XP datasheet, we realized that some of the pins documented as having a NAND-related functionality in fact did not have such functionality. This commit updates the pinctrl driver accordingly. Signed-off-by: Thomas Petazzoni Cc: # v3.7+ Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP") Signed-off-by: Linus Walleij Signed-off-by: Sasha Levin

pinctrl: mvebu: armada-375: remove non-existing NAND re/we pins

2015-07-04T03:02:26+00:00

[ Upstream commit e5447d26092c72ef3346615ee558c9112ef8063f ] After updating to a more recent version of the Armada 375, we realized that some of the pins documented as having a NAND-related functionality in fact did not have such functionality. This commit updates the pinctrl driver accordingly. Signed-off-by: Thomas Petazzoni Cc: # v3.15+ Fixes: ce3ed59dcddd ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 375") Signed-off-by: Linus Walleij Signed-off-by: Sasha Levin

pinctrl: mvebu: armada-370: fix spi0 pin description

2015-07-04T03:02:26+00:00

[ Upstream commit 438881dfddb9107ef0eb30b49368e91e092f0b3e ] Due to a mistake, the CS0 and CS1 SPI0 functions were incorrectly named "spi0-1" instead of just "spi0". This commit fixes that. This DT binding change does not affect any of the in-tree users. Signed-off-by: Thomas Petazzoni Cc: # v3.7+ Fixes: 5f597bb2be57 ("pinctrl: mvebu: add pinctrl driver for Armada 370") Signed-off-by: Linus Walleij Signed-off-by: Sasha Levin

pinctrl: mvebu: armada-38x: fix PCIe functions

2015-07-04T03:02:26+00:00

[ Upstream commit 331642fbf24a1c16b2669ca0a6479b5fcd6dd5b2 ] A new revision of the Marvell Armada 38x hardware datasheet unveiled that the definition of some of the PCIe functions were not correct. This commit fixes the pinctrl driver accordingly. Some PCIe functions simply do not exist, some of the PCIe functions in fact were corresponding to other functions, and some PCIe functions have been added. Note: the seemingly unrelated removal of spi(cs2) on MPP47 is related: this function is in fact implemented on MPP43, instead of a PCIe function. Signed-off-by: Thomas Petazzoni Cc: # v3.15+ Fixes: ca6d9a084b56f ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 380/385") Signed-off-by: Linus Walleij Signed-off-by: Sasha Levin

pinctrl: clean up after enable refactoring

2014-09-04T08:05:07+00:00

commit 2243a87d90b42eb38bc281957df3e57c712b5e56 "pinctrl: avoid duplicated calling enable_pinmux_setting for a pin" removed the .disable callback from the struct pinmux_ops, making the .enable() callback the only remaining callback. However .enable() is a bad name as it seems to imply that a muxing can also be disabled. Rename the callback to .set_mux() and also take this opportunity to clean out any remaining mentions of .disable() from the documentation. Acked-by: Stephen Warren Acked-by: Bjorn Andersson Acked-by: Fan Wu Signed-off-by: Linus Walleij

pinctrl: mvebu: new driver for Orion platforms

2014-04-24T13:09:35+00:00

This commit extends the pinctrl mvebu logic with a new driver to cover Orion5x SoC. It supports the definitions for the 5181l, 5182 and 5281 variants of Orion5x, which are the three ones supported by the old style MPP code in arch/arm/mach-orion5x/. Signed-off-by: Thomas Petazzoni Acked-by: Sebastian Hesselbarth Signed-off-by: Linus Walleij