<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/stable/linux.git/drivers/pinctrl/pinctrl-single.c, branch linux-3.18.y</title>
<subtitle>Linux kernel stable tree</subtitle>
<id>https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=linux-3.18.y</id>
<link rel='self' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=linux-3.18.y'/>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/'/>
<updated>2016-07-12T12:47:47+00:00</updated>
<entry>
<title>pinctrl: single: Fix pcs_parse_bits_in_pinctrl_entry to use __ffs than ffs</title>
<updated>2016-07-12T12:47:47+00:00</updated>
<author>
<name>Keerthy</name>
<email>j-keerthy@ti.com</email>
</author>
<published>2016-04-14T04:59:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=9f31dbd914efc39d18abbcb7568b53a148096d77'/>
<id>urn:sha1:9f31dbd914efc39d18abbcb7568b53a148096d77</id>
<content type='text'>
[ Upstream commit 56b367c0cd67d4c3006738e7dc9dda9273fd2bfe ]

pcs_parse_bits_in_pinctrl_entry uses ffs which gives bit indices
ranging from 1 to MAX. This leads to a corner case where we try to request
the pin number = MAX and fails.

bit_pos value is being calculted using ffs. pin_num_from_lsb uses
bit_pos value. pins array is populated with:

pin + pin_num_from_lsb.

The above is 1 more than usual bit indices as bit_pos uses ffs to compute
first set bit. Hence the last of the pins array is populated with the MAX
value and not MAX - 1 which causes error when we call pin_request.

mask_pos is rightly calculated as ((pcs-&gt;fmask) &lt;&lt; (bit_pos - 1))
Consequently val_pos and submask are correct.

Hence use __ffs which gives (ffs(x) - 1) as the first bit set.

fixes: 4e7e8017a8 ("pinctrl: pinctrl-single: enhance to configure multiple pins of different modules")
Signed-off-by: Keerthy &lt;j-keerthy@ti.com&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: single: Fix missing flush of posted write for a wakeirq</title>
<updated>2016-07-12T12:46:58+00:00</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2016-05-31T21:17:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=53801c45e5bed7c047e52aebd53b269020580876'/>
<id>urn:sha1:53801c45e5bed7c047e52aebd53b269020580876</id>
<content type='text'>
[ Upstream commit 0ac3c0a4025f41748a083bdd4970cb3ede802b15 ]

With many repeated suspend resume cycles, the pin specific wakeirq
may not always work on omaps. This is because the write to enable the
pin interrupt may not have reached the device over the interconnect
before suspend happens.

Let's fix the issue with a flush of posted write with a readback.

Cc: stable@vger.kernel.org
Reported-by: Nishanth Menon &lt;nm@ti.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: single: fix freudian slip</title>
<updated>2014-09-05T08:33:25+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2014-09-05T07:53:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=9e3a979f03b37b8502da6cfce8581e28375cf96f'/>
<id>urn:sha1:9e3a979f03b37b8502da6cfce8581e28375cf96f</id>
<content type='text'>
commit 03e9f0cac5da6af85758276cb4624caf5911f2b9
"pinctrl: clean up after enable refactoring"
renamed the vtable callback .enable to .set_mux. The
renaming was done manually, and one of the alterations
contained a freudian slip. I confess, I am human.

Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: clean up after enable refactoring</title>
<updated>2014-09-04T08:05:07+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2014-09-03T11:02:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=03e9f0cac5da6af85758276cb4624caf5911f2b9'/>
<id>urn:sha1:03e9f0cac5da6af85758276cb4624caf5911f2b9</id>
<content type='text'>
commit 2243a87d90b42eb38bc281957df3e57c712b5e56
"pinctrl: avoid duplicated calling enable_pinmux_setting for a pin"
removed the .disable callback from the struct pinmux_ops,
making the .enable() callback the only remaining callback.

However .enable() is a bad name as it seems to imply that a
muxing can also be disabled. Rename the callback to .set_mux()
and also take this opportunity to clean out any remaining
mentions of .disable() from the documentation.

Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Bjorn Andersson &lt;bjorn.andersson@sonymobile.com&gt;
Acked-by: Fan Wu &lt;fwu@marvell.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: single: AM437x: Add pinctrl compatibility</title>
<updated>2014-08-29T07:28:35+00:00</updated>
<author>
<name>Keerthy</name>
<email>j-keerthy@ti.com</email>
</author>
<published>2014-08-22T14:01:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=aa2293d82c29309d8399d41941add7af606a4fea'/>
<id>urn:sha1:aa2293d82c29309d8399d41941add7af606a4fea</id>
<content type='text'>
AM437x pinctrl definitions now differ from traditional 16 bit OMAP pin
ctrl definitions, in that all 32 bits are used to describe a single pin

Also the location of wakeupenable and event bits have changed.

Signed-off-by: Keerthy &lt;j-keerthy@ti.com&gt;
[nm@ti.com: minor updates]
Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: single: Add DRA7 pinctrl compatibility</title>
<updated>2014-08-29T07:27:44+00:00</updated>
<author>
<name>Nishanth Menon</name>
<email>nm@ti.com</email>
</author>
<published>2014-08-22T14:01:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=31320beaa3d3c5190e7db08144f37a2d519f6d6d'/>
<id>urn:sha1:31320beaa3d3c5190e7db08144f37a2d519f6d6d</id>
<content type='text'>
DRA7 pinctrl definitions now differ from traditional 16 bit OMAP pin
ctrl definitions, in that all 32 bits are used to describe a single pin

Also the location of wakeupenable and event bits have changed.

Signed-off-by: Nishanth Menon &lt;nm@ti.com&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: pinctrl-single.c: Cleaning up wrong format string usage</title>
<updated>2014-07-11T12:08:35+00:00</updated>
<author>
<name>Rickard Strandqvist</name>
<email>rickard_strandqvist@spectrumdigital.se</email>
</author>
<published>2014-06-26T16:58:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=bf4cef6c70258e1f771ebfe08558b77ad24700c2'/>
<id>urn:sha1:bf4cef6c70258e1f771ebfe08558b77ad24700c2</id>
<content type='text'>
%d in format string used, but the type is unsigned int

This was found using a static code analysis program called cppcheck

Signed-off-by: Rickard Strandqvist &lt;rickard_strandqvist@spectrumdigital.se&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: pinctrl-single.c: Cleaning up values that are never used</title>
<updated>2014-07-11T12:08:34+00:00</updated>
<author>
<name>Rickard Strandqvist</name>
<email>rickard_strandqvist@spectrumdigital.se</email>
</author>
<published>2014-06-26T13:43:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=849bfe0637fd45bf50aac3b12e7e56248c0b9031'/>
<id>urn:sha1:849bfe0637fd45bf50aac3b12e7e56248c0b9031</id>
<content type='text'>
Remove variable that are never used

This was found using a static code analysis program called cppcheck.

Signed-off-by: Rickard Strandqvist &lt;rickard_strandqvist@spectrumdigital.se&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: avoid duplicated calling enable_pinmux_setting for a pin</title>
<updated>2014-07-11T12:08:26+00:00</updated>
<author>
<name>Fan Wu</name>
<email>fwu@marvell.com</email>
</author>
<published>2014-06-09T01:37:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=2243a87d90b42eb38bc281957df3e57c712b5e56'/>
<id>urn:sha1:2243a87d90b42eb38bc281957df3e57c712b5e56</id>
<content type='text'>
What the patch does:
1. Call pinmux_disable_setting ahead of pinmux_enable_setting
  each time pinctrl_select_state is called
2. Remove the HW disable operation in pinmux_disable_setting function.
3. Remove the disable ops in struct pinmux_ops
4. Remove all the disable ops users in current code base.

Notes:
1. Great thanks for the suggestion from Linus, Tony Lindgren and
   Stephen Warren and Everyone that shared comments on this patch.
2. The patch also includes comment fixes from Stephen Warren.

The reason why we do this:
1. To avoid duplicated calling of the enable_setting operation
   without disabling operation inbetween which will let the pin
   descriptor desc-&gt;mux_usecount increase monotonously.
2. The HW pin disable operation is not useful for any of the
   existing platforms.
   And this can be used to avoid the HW glitch after using the
   item #1 modification.

In the following case, the issue can be reproduced:
1. There is a driver that need to switch pin state dynamically,
   e.g. between "sleep" and "default" state
2. The pin setting configuration in a DTS node may be like this:

  component a {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = &lt;&amp;a_grp_setting &amp;c_grp_setting&gt;;
	pinctrl-1 = &lt;&amp;b_grp_setting &amp;c_grp_setting&gt;;
  }

  The "c_grp_setting" config node is totally identical, maybe like
  following one:

  c_grp_setting: c_grp_setting {
	pinctrl-single,pins = &lt;GPIO48 AF6&gt;;
  }

3. When switching the pin state in the following official pinctrl
   sequence:
	pin = pinctrl_get();
	state = pinctrl_lookup_state(wanted_state);
	pinctrl_select_state(state);
	pinctrl_put();

Test Result:
1. The switch is completed as expected, that is: the device's
   pin configuration is changed according to the description in the
   "wanted_state" group setting
2. The "desc-&gt;mux_usecount" of the corresponding pins in "c_group"
   is increased without being decreased, because the "desc" is for
   each physical pin while the setting is for each setting node
   in the DTS.
   Thus, if the "c_grp_setting" in pinctrl-0 is not disabled ahead
   of enabling "c_grp_setting" in pinctrl-1, the desc-&gt;mux_usecount
   will keep increasing without any chance to be decreased.

According to the comments in the original code, only the setting,
in old state but not in new state, will be "disabled" (calling
pinmux_disable_setting), which is correct logic but not intact. We
still need consider case that the setting is in both old state
and new state. We can do this in the following two ways:

1. Avoid to "enable"(calling pinmux_enable_setting) the "same pin
   setting" repeatedly
2. "Disable"(calling pinmux_disable_setting) the "same pin setting",
   actually two setting instances, ahead of enabling them.

Analysis:
1. The solution #2 is better because it can avoid too much
   iteration.
2. If we disable all of the settings in the old state and one of
   the setting(s) exist in the new state, the pins mux function
   change may happen when some SoC vendors defined the
   "pinctrl-single,function-off"
   in their DTS file.
   old_setting =&gt; disabled_setting =&gt; new_setting.
3. In the pinmux framework, when a pin state is switched, the
   setting in the old state should be marked as "disabled".

Conclusion:
1. To Remove the HW disabling operation to above the glitch mentioned
   above.
2. Handle the issue mentioned above by disabling all of the settings
   in old state and then enable the all of the settings in new state.

Signed-off-by: Fan Wu &lt;fwu@marvell.com&gt;
Acked-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Acked-by: Maxime Coquelin &lt;maxime.coquelin@st.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: single: Clear pin interrupts enabled by bootloader</title>
<updated>2014-04-23T13:56:56+00:00</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2014-04-10T23:47:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=58968625c496c2e39545781915dbb848b38bd249'/>
<id>urn:sha1:58968625c496c2e39545781915dbb848b38bd249</id>
<content type='text'>
Since we set up device wake-up interrupts as pinctrl-single
interrupts, we now must use the standard request_irq and
related functions to manage them.

If the pin interrupts are enabled for some pins at boot,
the wake-up events can show up as constantly pending
at least on omaps and will hang the system unless the related
device driver clears the event at the device.

To fix this, let's clear the interrupt flags during init,
and print out a warning so the board maintainers can update
their drivers to do proper request_irq for the driver specific
wake-up events.

Cc: Haojian Zhuang &lt;haojian.zhuang@linaro.org&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
