<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/stable/linux.git/include/asm-powerpc/immap_qe.h, branch master</title>
<subtitle>Linux kernel stable tree</subtitle>
<id>https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=master</id>
<link rel='self' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/'/>
<updated>2008-08-04T02:02:00+00:00</updated>
<entry>
<title>powerpc: Move include files to arch/powerpc/include/asm</title>
<updated>2008-08-04T02:02:00+00:00</updated>
<author>
<name>Stephen Rothwell</name>
<email>sfr@canb.auug.org.au</email>
</author>
<published>2008-08-01T05:20:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=b8b572e1015f81b4e748417be2629dfe51ab99f9'/>
<id>urn:sha1:b8b572e1015f81b4e748417be2629dfe51ab99f9</id>
<content type='text'>
from include/asm-powerpc.  This is the result of a

mkdir arch/powerpc/include/asm
git mv include/asm-powerpc/* arch/powerpc/include/asm

Followed by a few documentation/comment fixups and a couple of places
where &lt;asm-powepc/...&gt; was being used explicitly.  Of the latter only
one was outside the arch code and it is a driver only built for powerpc.

Signed-off-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] QE: immap_qe.h should include asm/io.h</title>
<updated>2008-04-17T06:01:39+00:00</updated>
<author>
<name>Anton Vorontsov</name>
<email>avorontsov@ru.mvista.com</email>
</author>
<published>2008-03-11T17:24:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=ab1220d5ac69bd3327305c4d367548221f2bc3b4'/>
<id>urn:sha1:ab1220d5ac69bd3327305c4d367548221f2bc3b4</id>
<content type='text'>
Headers should include prototypes they use, otherwise build will
break if we use it without explicitly including io.h:

  CC      arch/powerpc/sysdev/qe_lib/gtm.o
In file included from include/asm/qe.h:20,
                 from arch/powerpc/sysdev/qe_lib/gtm.c:18:
include/asm/immap_qe.h: In function ‘immrbar_virt_to_phys’:
include/asm/immap_qe.h:480: error: implicit declaration of function ‘virt_to_phys’
make[2]: *** [arch/powerpc/sysdev/qe_lib/gtm.o] Error 1
make[1]: *** [arch/powerpc/sysdev/qe_lib] Error 2

gtm.c needs qe.h (which includes immap_qe.h) to use qe_get_brg_clk().

Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] QE: implement qe_muram_offset</title>
<updated>2008-04-17T06:01:39+00:00</updated>
<author>
<name>Anton Vorontsov</name>
<email>avorontsov@ru.mvista.com</email>
</author>
<published>2008-03-11T17:24:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=0b51b02edff2417deff98d8bbf294fa56b765bc6'/>
<id>urn:sha1:0b51b02edff2417deff98d8bbf294fa56b765bc6</id>
<content type='text'>
qe_muram_offset is the reverse of the qe_muram_addr, will be
used for the Freescale QE USB Host Controller driver.

This patch also moves qe_muram_addr into the qe.h header, plus
adds __iomem hints to use with sparse.

Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] QE: Add ability to upload QE firmware</title>
<updated>2008-01-24T01:34:06+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>timur@freescale.com</email>
</author>
<published>2008-01-08T16:30:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=bc556ba940085e46e0ab1b5ed7c31428dc86dd03'/>
<id>urn:sha1:bc556ba940085e46e0ab1b5ed7c31428dc86dd03</id>
<content type='text'>
Define the layout of a binary blob that contains a QE firmware and instructions
on how to upload it.  Add function qe_upload_firmware() to parse the blob
and perform the actual upload.  Fully define 'struct rsp' in immap_qe.h to
include the actual RISC Special Registers.  Added description of a new
QE firmware node to booting-without-of.txt.

Signed-off-by: Timur Tabi &lt;timur@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] qe: miscellaneous code improvements and fixes to the QE library</title>
<updated>2007-10-08T13:38:15+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>timur@freescale.com</email>
</author>
<published>2007-10-03T16:34:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=6b0b594bb81f86dbc7b0829ee5102abaab242913'/>
<id>urn:sha1:6b0b594bb81f86dbc7b0829ee5102abaab242913</id>
<content type='text'>
This patch makes numerous miscellaneous code improvements to the QE library.

1. Remove struct ucc_common and merge ucc_init_guemr() into ucc_set_type()
   (every caller of ucc_init_guemr() also calls ucc_set_type()).  Modify all
   callers of ucc_set_type() accordingly.

2. Remove the unused enum ucc_pram_initial_offset.

3. Refactor qe_setbrg(), also implement work-around for errata QE_General4.

4. Several printk() calls were missing the terminating \n.

5. Add __iomem where needed, and change u16 to __be16 and u32 to __be32 where
   appropriate.

6. In ucc_slow_init() the RBASE and TBASE registers in the PRAM were programmed
   with the wrong value.

7. Add the protocol type to struct us_info and updated ucc_slow_init() to
   use it, instead of always programming QE_CR_PROTOCOL_UNSPECIFIED.

8. Rename ucc_slow_restart_x() to ucc_slow_restart_tx()

9. Add several macros in qe.h (mostly for slow UCC support, but also to
   standardize some naming convention) and remove several unused macros.

10. Update ucc_geth.c to use the new macros.

11. Add ucc_slow_info.protocol to specify which QE_CR_PROTOCOL_xxx protcol
    to use when initializing the UCC in ucc_slow_init().

12. Rename ucc_slow_pram.rfcr to rbmr and ucc_slow_pram.tfcr to tbmr, since
    these are the real names of the registers.

13. Use the setbits, clrbits, and clrsetbits where appropriate.

14. Refactor ucc_set_qe_mux_rxtx().

15. Remove all instances of 'volatile'.

16. Simplify get_cmxucr_reg();

17. Replace qe_mux.cmxucrX with qe_mux.cmxucr[].

18. Updated struct ucc_geth because struct ucc_fast is not padded any more.

Signed-off-by: Timur Tabi &lt;timur@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] QE: Added missing CEURNR register</title>
<updated>2007-10-04T16:03:03+00:00</updated>
<author>
<name>Emil Medve</name>
<email>Emilian.Medve@Freescale.com</email>
</author>
<published>2007-09-26T17:03:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=b6927bca245f83879bcb319aa108a1a347e36d8f'/>
<id>urn:sha1:b6927bca245f83879bcb319aa108a1a347e36d8f</id>
<content type='text'>
According to the publicly available MPC8360E RM (rev. 1 from 09/2006 and rev. 2
from 05/2007) and MPC8323E RM (rev. 1 from 09/2006), CEURNR is the QE microcode
revision number register and is located at offset 0x1b8 within the QE internal
register space

Signed-off-by: Emil Medve &lt;Emilian.Medve@Freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] qe: ucc_slow.guemr is in the wrong place</title>
<updated>2007-03-29T19:33:56+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>timur@freescale.com</email>
</author>
<published>2007-03-26T19:25:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=297640e89ea21e314bdda45468e5f78c978dae16'/>
<id>urn:sha1:297640e89ea21e314bdda45468e5f78c978dae16</id>
<content type='text'>
The definition of struct ucc_slow puts the guemr register immediately after the
utpt register, when it should be at offset 0x90.  This patch adds the missing
0x52-byte padding.

Signed-off-by: Timur Tabi &lt;timur@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
</content>
</entry>
<entry>
<title>[PATCH] Optimize qe_brg struct to use an array</title>
<updated>2006-11-13T03:49:01+00:00</updated>
<author>
<name>Timur Tabi</name>
<email>timur@freescale.com</email>
</author>
<published>2006-11-09T21:42:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=fc9e8b4e275b6882cb537154c8fc7cde3692eea0'/>
<id>urn:sha1:fc9e8b4e275b6882cb537154c8fc7cde3692eea0</id>
<content type='text'>
The qe_brg structure manually defined each of the 16 BRG registers, which
made any code that used them cumbersome.  This patch replaces the fields
with a single 16-element array.

Signed-off-by: Timur Tabi &lt;timur@freescale.com&gt;
Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
<entry>
<title>[POWERPC] Add QUICC Engine (QE) infrastructure</title>
<updated>2006-10-04T05:24:27+00:00</updated>
<author>
<name>Li Yang</name>
<email>leoli@freescale.com</email>
</author>
<published>2006-10-04T04:10:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=9865853851313e0d94a4acde42d6f9d8070bb376'/>
<id>urn:sha1:9865853851313e0d94a4acde42d6f9d8070bb376</id>
<content type='text'>
Add QUICC Engine (QE) configuration, header files, and
QE management and library code that are used by QE devices
drivers.

Includes Leo's modifications up to, and including, the
platform_device to of_device adaptation:

"The series of patches add generic QE infrastructure called
qe_lib, and MPC8360EMDS board support.  Qe_lib is used by
QE device drivers such as ucc_geth driver.

This version updates QE interrupt controller to use new irq
mapping mechanism, addresses all the comments received with
last submission and includes some style fixes.

v2: Change to use device tree for BCSR and MURAM;
Remove I/O port interrupt handling code as it is not generic
enough.

v3: Address comments from Kumar;  Update definition of several
device tree nodes;  Copyright style change."

In addition, the following changes have been made:

o removed typedefs
o uint -&gt; u32 conversions
o removed following defines:
  QE_SIZEOF_BD, BD_BUFFER_ARG, BD_BUFFER_CLEAR, BD_BUFFER,
  BD_STATUS_AND_LENGTH_SET, BD_STATUS_AND_LENGTH, and BD_BUFFER_SET
  because they hid sizeof/in_be32/out_be32 operations from the reader.
o fixed qe_snums_init() serial num assignment to use a const array
o made CONFIG_UCC_FAST select UCC_SLOW
o reduced NR_QE_IC_INTS from 128 to 64
o remove _IO_BASE, etc. defines (not used)
o removed irrelevant comments, added others to resemble removed BD_ defines
o realigned struct definitions in headers
o various other style fixes including things like pinMask -&gt; pin_mask
o fixed a ton of whitespace issues
o marked ioregs as __be32/__be16
o removed platform_device code and redundant get_qe_base()
o removed redundant comments
o added cpu_relax() to qe_reset
o uncasted all get_property() assignments
o eliminated unneeded casts
o eliminated immrbar_phys_to_virt (not used)

Signed-off-by: Li Yang &lt;leoli@freescale.com&gt;
Signed-off-by: Shlomi Gridish &lt;gridish@freescale.com&gt;
Signed-off-by: Kim Phillips &lt;kim.phillips@freescale.com&gt;
Signed-off-by: Paul Mackerras &lt;paulus@samba.org&gt;
</content>
</entry>
</feed>
