kernel/git/stable/linux.git/include/asm-ppc/ibm44x.h, branch master

powerpc: Remove arch/ppc and include/asm-ppc

2008-06-10T11:40:22+00:00

All the maintained platforms are now in arch/powerpc, so the old arch/ppc stuff can now go away. Acked-by: Adrian Bunk Acked-by: Arnd Bergmann Acked-by: Becky Bruce Acked-by: Benjamin Herrenschmidt Acked-by: Geert Uytterhoeven Acked-by: Grant Likely Acked-by: Jochen Friedrich Acked-by: John Linn Acked-by: Jon Loeliger Acked-by: Josh Boyer Acked-by: Kumar Gala Acked-by: Olof Johansson Acked-by: Peter Korsgaard Acked-by: Scott Wood Acked-by: Sean MacLennan Acked-by: Segher Boessenkool Acked-by: Stefan Roese Acked-by: Stephen Neuendorffer Acked-by: Wolfgang Denk Signed-off-by: Paul Mackerras

Don't include linux/config.h from anywhere else in include/

2006-04-26T11:56:16+00:00

Signed-off-by: David Woodhouse

[PATCH] powerpc: generalize PPC44x_PIN_SIZE

2006-01-20T05:13:50+00:00

The following patch generalizes PPC44x_PIN_SIZE by changing it to PPC_PIN_SIZE, which can be defined by any sub-arch to automatically adjust VMALLOC_START. Define PPC_PIN_SIZE on 8xx, avoiding potential conflicts with the pinned space. Signed-off-by: Marcelo Tosatti Signed-off-by: Paul Mackerras

[PATCH] ppc32: Add 440SPe support

2005-11-07T15:53:26+00:00

Add support for the AMCC PowerPC 440SPe SoC, including PCI Express in root port mode. Signed-off-by: Roland Dreier Cc: Matt Porter Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

[PATCH] ppc32: Dump error status for both PLB segments on 440SP

2005-11-07T15:53:26+00:00

The PowerPC 440SP SoC has two Processor Local Bus (PLB) segments (a high-throughput segment and a low-latency segment). Fix our PLB register definitions to cope with this, and add code to dump the status of both segments when a machine check occurs. Signed-off-by: Roland Dreier Cc: Matt Porter Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

[PATCH] ppc32: Allow ERPN for early serial to depend on CPU type

2005-11-07T15:53:26+00:00

The PowerPC 440SPe supports up to 16 GB of RAM, and therefore its IO registers are at 0x4_xxxx_xxxx instead of being at 0x1_xxxx_xxxx like most other PPC 440 chips. To allow for this, this patch moves the definition of the ERPN used for mapping UART0 from being hard-coded in the head_44x.S assembly code to being defined in ibm44x.h. Signed-off-by: Roland Dreier Signed-off-by: Matt Porter Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

[PATCH] ppc32: Fix PPC440SP SRAM controller DCRs

2005-08-18T19:53:58+00:00

Fixes the incorrect DCR base value for the 440SP SRAM controller. Signed-off-by: Matt Porter Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

[PATCH] ppc32: add 440ep support

2005-08-02T02:14:01+00:00

Add PPC440EP core support. PPC440EP is a PPC440-based SoC with a classic PPC FPU and another set of peripherals. Signed-off-by: Wade Farnsworth Signed-off-by: Matt Porter Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

Linux-2.6.12-rc2

2005-04-16T22:20:36+00:00

Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!