<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel/git/stable/linux.git/include/asm-x86/iommu.h, branch master</title>
<subtitle>Linux kernel stable tree</subtitle>
<id>https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=master</id>
<link rel='self' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/'/>
<updated>2008-10-23T05:55:20+00:00</updated>
<entry>
<title>x86, um: ... and asm-x86 move</title>
<updated>2008-10-23T05:55:20+00:00</updated>
<author>
<name>Al Viro</name>
<email>viro@zeniv.linux.org.uk</email>
</author>
<published>2008-08-18T01:05:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=bb8985586b7a906e116db835c64773b7a7d51663'/>
<id>urn:sha1:bb8985586b7a906e116db835c64773b7a7d51663</id>
<content type='text'>
Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
</content>
</entry>
<entry>
<title>x86: rename iommu_num_pages function to iommu_nr_pages</title>
<updated>2008-10-16T18:21:33+00:00</updated>
<author>
<name>Joerg Roedel</name>
<email>joerg.roedel@amd.com</email>
</author>
<published>2008-10-16T05:02:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=bdab0ba3d9ad8de257ee6236daf314723748fde6'/>
<id>urn:sha1:bdab0ba3d9ad8de257ee6236daf314723748fde6</id>
<content type='text'>
This series of patches re-introduces the iommu_num_pages function so that
it can be used by each architecture specific IOMMU implementations.  The
series also changes IOMMU implementations for X86, Alpha, PowerPC and
UltraSparc.  The other implementations are not yet changed because the
modifications required are not obvious and I can't test them on real
hardware.

This patch:

This is a preparation patch for introducing a generic iommu_num_pages function.

Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
Cc: "David S. Miller" &lt;davem@davemloft.net&gt;
Cc: Richard Henderson &lt;rth@twiddle.net&gt;
Cc: Ivan Kokshaysky &lt;ink@jurassic.park.msu.ru&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Ingo Molnar &lt;mingo@elte.hu&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: FUJITA Tomonori &lt;fujita.tomonori@lab.ntt.co.jp&gt;
Cc: Muli Ben-Yehuda &lt;muli@il.ibm.com&gt;
Cc: Dave Airlie &lt;airlied@linux.ie&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>Merge branches 'core/iommu', 'x86/amd-iommu' and 'x86/iommu' into x86-v28-for-linus-phase3-B</title>
<updated>2008-10-10T17:47:12+00:00</updated>
<author>
<name>Ingo Molnar</name>
<email>mingo@elte.hu</email>
</author>
<published>2008-10-10T17:47:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=725c25819e4a0dafdcf42a5f31bc569341919c7c'/>
<id>urn:sha1:725c25819e4a0dafdcf42a5f31bc569341919c7c</id>
<content type='text'>
Conflicts:
	arch/x86/kernel/pci-gart_64.c
	include/asm-x86/dma-mapping.h
</content>
</entry>
<entry>
<title>Merge branch 'x86/header-guards' into x86-v28-for-linus-phase1</title>
<updated>2008-10-06T14:15:57+00:00</updated>
<author>
<name>Ingo Molnar</name>
<email>mingo@elte.hu</email>
</author>
<published>2008-10-06T14:15:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=b8cd9d056bbc5f2630ab1787dbf76f83bbb517c0'/>
<id>urn:sha1:b8cd9d056bbc5f2630ab1787dbf76f83bbb517c0</id>
<content type='text'>
Conflicts:
	include/asm-x86/dma-mapping.h
	include/asm-x86/gpio.h
	include/asm-x86/idle.h
	include/asm-x86/kvm_host.h
	include/asm-x86/namei.h
	include/asm-x86/uaccess.h

Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>iommu: remove fullflush and nofullflush in IOMMU generic option</title>
<updated>2008-09-22T18:43:37+00:00</updated>
<author>
<name>FUJITA Tomonori</name>
<email>fujita.tomonori@lab.ntt.co.jp</email>
</author>
<published>2008-09-19T16:23:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=afa9fdc2f5f8e4d98f3e77bfa204412cbc181346'/>
<id>urn:sha1:afa9fdc2f5f8e4d98f3e77bfa204412cbc181346</id>
<content type='text'>
This patch against tip/x86/iommu virtually reverts
2842e5bf3115193f05dc9dac20f940e7abf44c1a. But just reverting the
commit breaks AMD IOMMU so this patch also includes some fixes.

The above commit adds new two options to x86 IOMMU generic kernel boot
options, fullflush and nofullflush. But such change that affects all
the IOMMUs needs more discussion (all IOMMU parties need the chance to
discuss it):

http://lkml.org/lkml/2008/9/19/106

Signed-off-by: FUJITA Tomonori &lt;fujita.tomonori@lab.ntt.co.jp&gt;
Acked-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: move GART TLB flushing options to generic code</title>
<updated>2008-09-19T10:59:06+00:00</updated>
<author>
<name>Joerg Roedel</name>
<email>joerg.roedel@amd.com</email>
</author>
<published>2008-09-18T13:23:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=2842e5bf3115193f05dc9dac20f940e7abf44c1a'/>
<id>urn:sha1:2842e5bf3115193f05dc9dac20f940e7abf44c1a</id>
<content type='text'>
The GART currently implements the iommu=[no]fullflush command line
parameters which influence its IO/TLB flushing strategy. This patch
makes these parameters generic so that they can be used by the AMD IOMMU
too.

Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86: blacklist DMAR on Intel G31/G33 chipsets</title>
<updated>2008-09-05T18:20:25+00:00</updated>
<author>
<name>David Woodhouse</name>
<email>dwmw2@infradead.org</email>
</author>
<published>2008-09-04T08:54:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=e51af6630848406fc97adbd71443818cdcda297b'/>
<id>urn:sha1:e51af6630848406fc97adbd71443818cdcda297b</id>
<content type='text'>
Some BIOSes (the Intel DG33BU, for example) wrongly claim to have DMAR
when they don't. Avoid the resulting crashes when it doesn't work as
expected.

I'd still be grateful if someone could test it on a DG33BU with the old
BIOS though, since I've killed mine. I tested the DMI version, but not
this one.

Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>generic, x86: fix add iommu_num_pages helper function</title>
<updated>2008-07-29T10:12:48+00:00</updated>
<author>
<name>FUJITA Tomonori</name>
<email>fujita.tomonori@lab.ntt.co.jp</email>
</author>
<published>2008-07-29T04:38:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=8978b74253280d59e97cf49a3ec2c0cbccd5b801'/>
<id>urn:sha1:8978b74253280d59e97cf49a3ec2c0cbccd5b801</id>
<content type='text'>
This IOMMU helper function doesn't work for some architectures:

  http://marc.info/?l=linux-kernel&amp;m=121699304403202&amp;w=2

It also breaks POWER and SPARC builds:

  http://marc.info/?l=linux-kernel&amp;m=121730388001890&amp;w=2

Currently, only x86 IOMMUs use this so let's move it to x86 for
now.

Reported-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
Signed-off-by: FUJITA Tomonori &lt;fujita.tomonori@lab.ntt.co.jp&gt;
Signed-off-by: Ingo Molnar &lt;mingo@elte.hu&gt;
</content>
</entry>
<entry>
<title>x86 calgary: fix handling of devices that aren't behind the Calgary</title>
<updated>2008-07-26T19:00:03+00:00</updated>
<author>
<name>Alexis Bruemmer</name>
<email>alexisb@us.ibm.com</email>
</author>
<published>2008-07-26T02:44:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=1956a96de488feb05e95c08c9d5e80f63a4be2b1'/>
<id>urn:sha1:1956a96de488feb05e95c08c9d5e80f63a4be2b1</id>
<content type='text'>
The calgary code can give drivers addresses above 4GB which is very bad
for hardware that is only 32bit DMA addressable.

With this patch, the calgary code sets the global dma_ops to swiotlb or
nommu properly, and the dma_ops of devices behind the Calgary/CalIOC2
to calgary_dma_ops.  So the calgary code can handle devices safely that
aren't behind the Calgary/CalIOC2.

[akpm@linux-foundation.org: coding-style fixes]
Signed-off-by: Alexis Bruemmer &lt;alexisb@us.ibm.com&gt;
Signed-off-by: FUJITA Tomonori &lt;fujita.tomonori@lab.ntt.co.jp&gt;
Cc: Muli Ben-Yehuda &lt;muli@il.ibm.com&gt;
Cc: Ingo Molnar &lt;mingo@elte.hu&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>x86: consolidate header guards</title>
<updated>2008-07-22T19:31:34+00:00</updated>
<author>
<name>Vegard Nossum</name>
<email>vegard.nossum@gmail.com</email>
</author>
<published>2008-06-18T15:08:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?id=77ef50a522717fa040636ee1017179ceba12ff62'/>
<id>urn:sha1:77ef50a522717fa040636ee1017179ceba12ff62</id>
<content type='text'>
This patch is the result of an automatic script that consolidates the
format of all the headers in include/asm-x86/.

The format:

1. No leading underscore. Names with leading underscores are reserved.
2. Pathname components are separated by two underscores. So we can
   distinguish between mm_types.h and mm/types.h.
3. Everything except letters and numbers are turned into single
   underscores.

Signed-off-by: Vegard Nossum &lt;vegard.nossum@gmail.com&gt;
</content>
</entry>
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