Linux kernel stable tree https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=linux-6.3.y 2023-02-22T19:05:56+00:00 2023-02-22T19:05:56+00:00 Linus Torvalds torvalds@linux-foundation.org 2023-02-22T19:05:56+00:00 urn:sha1:d5176cdbf64ce7d4eebf339205f17c23118e9f72 Pull pin control updates from Linus Walleij: "Nothing special, notably a lot of new Qualcomm hardware is supported, a RISC-V reference SoC and then some cleanups both in code and device tree bindings. Core changes: - Add PINCTRL_PINFUNCTION() macro and use it in several drivers New drivers: - New driver for the StarFive JH7110 SoC "sys" and "aon" (always-on) pin controllers. (RISC-V.) - New subdriver for the Qualcomm QDU1000/QRU1000 SoC pin controller - New subdrivers for the Qualcomm SM8550 SoC and LPASS pin controllers - New subdriver for the Qualcomm SA8775P SoC pin controller - New subdriver for the Qualcomm IPQ5332 SoC pin controller - New (trivial) support for Qualcomm PM8550 and PMR735D PMIC pin control - New subdriver for the Mediatek MT7981 SoC pin controller Improvements: - Several cleanups and refactorings to the Intel drivers - Add 4KOhm bias support to the Intel driver - Use the NOIRQ_SYSTEM_SLEEP_PM_OPS for the AT91 driver - Support general purpose clocks in the Qualcomm MSM8226 SoC - Several conversions to use the new I2C .probe_new() call - Massive clean-up of the Qualcomm Device Tree YAML schemas - Add VIN[45] pins, groups and functions to the Renesas r8a77950 SoC driver" * tag 'pinctrl-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (118 commits) pinctrl: qcom: Add support for i2c specific pull feature pinctrl: starfive: Add StarFive JH7110 aon controller driver pinctrl: starfive: Add StarFive JH7110 sys controller driver dt-bindings: pinctrl: Add StarFive JH7110 aon pinctrl dt-bindings: pinctrl: Add StarFive JH7110 sys pinctrl pinctrl: add mt7981 pinctrl driver dt-bindings: pinctrl: add bindings for MT7981 SoC dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated pinctrl: qcom: Introduce IPQ5332 TLMM driver dt-bindings: pinctrl: qcom: add IPQ5332 pinctrl dt-bindings: pinctrl: qcom: lpass-lpi: correct GPIO name pattern pinctrl: qcom: pinctrl-sm8550-lpass-lpi: add SM8550 LPASS dt-bindings: pinctrl: qcom,sm8550-lpass-lpi-pinctrl: add SM8550 LPASS pinctrl: at91: use devm_kasprintf() to avoid potential leaks dt-bindings: pinctrl: qcom: correct gpio-ranges in examples dt-bindings: pinctrl: qcom,msm8994: correct number of GPIOs dt-bindings: pinctrl: qcom,sdx55: correct GPIO name pattern dt-bindings: pinctrl: qcom,msm8953: correct GPIO name pattern dt-bindings: pinctrl: qcom,sm6375: correct GPIO name pattern and example dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and example ... 2023-02-10T22:44:07+00:00 Jianlong Huang jianlong.huang@starfivetech.com 2023-02-09T14:37:00+00:00 urn:sha1:716129d3b76d060bdfbdfa6cec7091a9fe7729d2 Add pinctrl bindings for StarFive JH7110 SoC aon pinctrl controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Link: https://lore.kernel.org/r/20230209143702.44408-3-hal.feng@starfivetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 2023-02-10T22:44:07+00:00 Jianlong Huang jianlong.huang@starfivetech.com 2023-02-09T14:36:59+00:00 urn:sha1:d6e0a660097dcdb80e7c5c859eb12f776060b02e Add pinctrl bindings for StarFive JH7110 SoC sys pinctrl controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Co-developed-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Link: https://lore.kernel.org/r/20230209143702.44408-2-hal.feng@starfivetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 2023-01-15T16:54:36+00:00 Apurva Nandan a-nandan@ti.com 2023-01-12T14:27:23+00:00 urn:sha1:a0c01bc565332cff9183bd8a17b4db94732d645d Add pinctrl macros for J784s4 SoC. These macro definitions are similar to that of J721s2, but adding new definitions to avoid any naming confusions in the soc dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Hari Nagalla <hnagalla@ti.com> Signed-off-by: Apurva Nandan <a-nandan@ti.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230112142725.77785-3-a-nandan@ti.com 2022-11-10T08:19:43+00:00 Wei Li liwei391@huawei.com 2022-11-08T09:45:29+00:00 urn:sha1:c12c19877b56a1e4e12d2076b1b85f85071df4de Rename the header guard of mt6795-pinfunc.h from __DTS_MT8173_PINFUNC_H to __DTS_MT6795_PINFUNC_H what corresponding with the file name. Fixes: 81557a71564a ("dt-bindings: pinctrl: Add MediaTek MT6795 pinctrl bindings") Signed-off-by: Wei Li <liwei391@huawei.com> Link: https://lore.kernel.org/r/20221108094529.3597920-1-liwei391@huawei.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 2022-10-11T17:59:59+00:00 Linus Torvalds torvalds@linux-foundation.org 2022-10-11T17:59:59+00:00 urn:sha1:979bb59016aed7c7c58baca2307d9d13890cc6ab Pull pin control updates from Linus Walleij: "There is nothing exciting going on, no core changes, just a few drivers and cleanups. New drivers: - Cypress CY8C95x0 chip pin control support, along with an immediate cleanup - Mediatek MT8188 SoC pin control support - Qualcomm SM8450 and SC8280XP LPASS (low power audio subsystem) pin control support - Qualcomm PM7250, PM8450 - Rockchip RV1126 SoC pin control support Improvements: - Fix some missing pins in the Armada 37xx driver - Convert Broadcom and Nomadik drivers to use PINCTRL_PINGROUP() macro - Fix some GPIO irq_chips to be immutable - Massive Qualcomm device tree binding cleanup, with more to come" * tag 'pinctrl-v6.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (119 commits) MAINTAINERS: adjust STARFIVE JH7100 PINCTRL DRIVER after file movement pinctrl: starfive: Rename "pinctrl-starfive" to "pinctrl-starfive-jh7100" pinctrl: Create subdirectory for StarFive drivers dt-bindings: pinctrl: st,stm32: Document interrupt-controller property dt-bindings: pinctrl: st,stm32: Document gpio-hog pattern property dt-bindings: pinctrl: st,stm32: Document gpio-line-names pinctrl: st: stop abusing of_get_named_gpio() pinctrl: wpcm450: Correct the fwnode_irq_get() return value check pinctrl: bcm: Remove unused struct bcm6328_pingroup pinctrl: qcom: restrict drivers per ARM/ARM64 pinctrl: bcm: ns: Remove redundant dev_err call gpio: rockchip: request GPIO mux to pinctrl when setting direction pinctrl: rockchip: add pinmux_ops.gpio_set_direction callback pinctrl: cy8c95x0: Align function names in cy8c95x0_pmxops pinctrl: cy8c95x0: Drop atomicity on operations on push_pull pinctrl: cy8c95x0: Lock register accesses in cy8c95x0_set_mux() pinctrl: sunxi: sun50i-h5: Switch to use dev_err_probe() helper pinctrl: stm32: Switch to use dev_err_probe() helper dt-bindings: qcom-pmic-gpio: Add PM7250B and PM8450 bindings pinctrl: qcom: spmi-gpio: Add compatible for PM7250B ... 2022-10-04T08:47:48+00:00 Jianlong Huang jianlong.huang@starfivetech.com 2022-09-30T06:14:04+00:00 urn:sha1:ba99b756da178aa8c608c4499a91074466050c10 Add the SoC name to make it more clear. Also the next generation StarFive SoCs will use "pinctrl-starfive" as the core of StarFive pinctrl driver. No functional change. Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com> Signed-off-by: Hal Feng <hal.feng@linux.starfivetech.com> Reviewed-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220930061404.5418-1-hal.feng@linux.starfivetech.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> 2022-09-14T12:28:47+00:00 Linus Walleij linus.walleij@linaro.org 2022-09-14T12:28:47+00:00 urn:sha1:94bc967b8d3b9cc7e69094aa7fc99dbb9036d727 Samsung pinctrl drivers changes for v6.1 1. Minor fix in order of initializing pinctrl driver - GPIOs should be configured before registering gpiolib. 2. Final steps to deprecated bindings headers with register constants. The constants were moved to include files in DTS directories, because these are not suitable for bindings. Remove final references and mark binding header as deprecated to warn any users. 2022-09-13T10:28:16+00:00 Vignesh Raghavendra vigneshr@ti.com 2022-09-01T14:13:26+00:00 urn:sha1:1607e6f9289cdb4c982a223e80ff3c5e827b7cd4 Add pinctrl macros for AM62AX SoCs. These macro definitions are similar to that of previous platforms, but adding new definitions to avoid any naming confusions in the SoC dts files. checkpatch insists the following error exists: ERROR: Macros with complex values should be enclosed in parentheses However, we do not need parentheses enclosing the values for this macro as we do intend it to generate two separate values as has been done for other similar platforms. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Tested-by: Devarsh Thakkar <devarsht@ti.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20220901141328.899100-4-vigneshr@ti.com 2022-09-13T10:28:05+00:00 Vignesh Raghavendra vigneshr@ti.com 2022-09-01T14:13:24+00:00 urn:sha1:a3c52977419beabc5cb4d6f0b062fd4cb460e54d Rearrange SOC specific IOPAD macros alphabetically, so that its easier to read. No functional change intended. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Tested-by: Devarsh Thakkar <devarsht@ti.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220901141328.899100-2-vigneshr@ti.com