kernel/git/stable/linux.git/sound/soc/codecs/ad193x.h, branch master

ASoC: codecs: ad193x: add support for 96kHz and 192kHz playback rates

2021-08-03T17:27:15+00:00

ad193x devices support 96KHz and 192KHz sampling rates, when PLL/MCLK is referenced to 48kHz. Tested on ad1934. Signed-off-by: Codrin Ciubotariu Link: https://lore.kernel.org/r/20210803104825.2198335-1-codrin.ciubotariu@microchip.com Signed-off-by: Mark Brown

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 149

2019-05-30T18:25:18+00:00

Based on 1 normalized pattern(s): licensed under the gpl 2 or later extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 82 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Reviewed-by: Kate Stewart Reviewed-by: Richard Fontana Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190524100845.150836982@linutronix.de Signed-off-by: Greg Kroah-Hartman

ASoC: codecs: ad193x: Add support to disable on-chip PLL

2019-02-18T17:41:42+00:00

The on-chip PLL can be disabled if on the MCLKI pin we have an external clock at 512 x fs. This clock can be used as direct internal clock for ADCs or DACs. To support this, we add an extra clock id that can be configured using the set_sysclk() callback. Signed-off-by: Codrin Ciubotariu Signed-off-by: Mark Brown

ASoC: ad193x: add support to ad1934

2015-10-05T16:42:49+00:00

The AD1934 codec has no ADC feature. Hence it register mapping is slightly different from the register mapping of other members of the AD193x family. Some ASoC controls and widgets are related to the DAC feature so are not relevant in the case of an AD1934 codec. Signed-off-by: Cyrille Pitchen Acked-by: Lars-Peter Clausen Signed-off-by: Mark Brown

ASoC: ad193x: Split SPI and I2C code into different modules

2014-02-18T01:04:37+00:00

There are a few known (minor) problems with having the support code for both I2C and SPI in the same module: * We need to be extra careful to make sure to not build the driver into the kernel if one of the subsystems is build as a module (Currently only I2C can be build as a module). * The module init path error handling is rather ugly. E.g. what should be done if either the SPI or the I2C driver fails to register? Most drivers that implement SPI and I2C in the same module currently fallback to undefined behavior in that case. Splitting the the driver into two modules, one for each bus, allows the registration of the other bus driver to continue without problems if one of them fails. This patch splits the AD193X driver into 3 modules. One core module that implements the device logic, but is independent of the bus method used. And one module for SPI and I2C each that registers the drivers and sets up the regmap struct for the bus. Signed-off-by: Lars-Peter Clausen Signed-off-by: Mark Brown

ASoC: ad193x: Use snd_soc_update_bits where appropriate

2011-11-28T18:57:52+00:00

We can reduce the code size here a bit by using snd_soc_update_bits instead of open-coding the read-modify-write cycle. The conversion done in this patch is not completely straightforward and some minor code restructuring has been incorporated to further reduce the code size. Signed-off-by: Lars-Peter Clausen Signed-off-by: Mark Brown

ASoC: ad193x: Fix define of AD193X_PLL_INPUT_MASK

2011-10-14T19:29:05+00:00

Current code defines AD193X_PLL_INPUT_MASK as (~0x6) which is quite different from other MASK defines. To make it consistent with other mask defines, define AD193X_PLL_INPUT_MASK as 0x6 and change the code accordingly. I think this change improves the readability. Signed-off-by: Axel Lin Signed-off-by: Mark Brown

ASoC: ad193x: Setup regmap read and write flag masks for SPI

2011-09-09T18:13:31+00:00

Currently register read-back for the ad193x is broken, because it expects bit 0 of the upper byte to be set to indicate a read operation, while the regmap default for SPI is to use bit 7. This patch also addresses another oddity of the device. There are SPI and I2C versions of this codec. In both cases the registers are 8-bit wide and numbered from 0x0 to 0x10, but in the SPI case there is also a so called 'global address' which is prefixed in-front of the register address. The global address mimics I2C behaviour and includes a static device address the and the read/write flag. This basically extends the register address to an 16-bit value numbered from 0x800 to 0x810. These are the register numbers which are currently used by the driver. This works, because I2C will ignore the upper 8 bits of the register, but it is still a bit confusing, as there are no such register numbers in the I2C case. The approach taken by this patch is to number the registers from 0x00 to 0x10 and encode the global address for SPI mode into the read and write flag masks. Signed-off-by: Lars-Peter Clausen Acked-by: Liam Girdwood Signed-off-by: Mark Brown

ASoC: ad193x: fix dac word len setting

2011-08-15T13:29:22+00:00

dac word len value should left shift before setting Signed-off-by: Scott Jiang Acked-by: Barry Song <21cnbao@gmail.com> Signed-off-by: Mark Brown Cc: stable@kernel.org

ASoC: ad193x: fix registers definition

2011-08-15T13:28:53+00:00

fix dac word len mask and adc tdm fmt shift value Signed-off-by: Scott Jiang Signed-off-by: Mark Brown Cc: stable@kernel.org