Linux kernel stable tree https://git.rulkc.org/pub/scm/linux/kernel/git/stable/linux.git/atom?h=linux-3.5.y 2012-06-04T03:47:49+00:00 2012-06-04T03:47:49+00:00 Len Brown len.brown@intel.com 2012-06-04T03:34:44+00:00 urn:sha1:650a37f32d2bc16fa802075be579802bc4ec4132 Initial IVB support went into turbostat in Linux-3.1: 553575f1ae048aa44682b46b3c51929a0b3ad337 (tools turbostat: recognize and run properly on IVB) However, when running on IVB, turbostat would fail to report the new couters added with SNB, c7, pc2 and pc7. So in scenarios where these counters are non-zero on IVB, turbostat would report erroneous residencey results. In particular c7 time would be added to c1 time, since c1 time is calculated as "that which is left over". Also, turbostat reports MHz capabilities when passed the "-v" option, and it would incorrectly report 133MHz bclk instead of 100MHz bclk for IVB, which would inflate GHz reported with that option. This patch is a backport of a fix already included in turbostat v2. Signed-off-by: Len Brown <len.brown@intel.com> 2012-06-04T03:24:00+00:00 Len Brown len.brown@intel.com 2012-06-04T03:24:00+00:00 urn:sha1:d15cf7c129fa4ec4b44c52521e49ffafb9749029 Linux 3.4 included a modification to turbostat to lower cross-call overhead by using scheduler affinity: 15aaa34654831e98dd76f7738b6c7f5d05a66430 (tools turbostat: reduce measurement overhead due to IPIs) In the use-case where turbostat forks a child program, that change had the un-intended side-effect of binding the child to the last cpu in the system. This change removed the binding before forking the child. This is a back-port of a fix already included in turbostat v2. Signed-off-by: Len Brown <len.brown@intel.com> 2012-03-30T02:27:19+00:00 Len Brown len.brown@intel.com 2012-03-30T02:19:58+00:00 urn:sha1:15aaa34654831e98dd76f7738b6c7f5d05a66430 Sometimes users have turbostat running in interval mode when they take processors offline/online. Previously, turbostat would survive, but not gracefully. Tighten up the error checking so turbostat notices changesn sooner, and print just 1 line on change: turbostat: re-initialized with num_cpus %d Signed-off-by: Len Brown <len.brown@intel.com> 2012-03-30T02:04:58+00:00 Len Brown len.brown@intel.com 2012-03-30T01:44:40+00:00 urn:sha1:88c3281f7ba449992f7a33bd2452a8c6fa5503cb turbostat uses /dev/cpu/*/msr interface to read MSRs. For modern systems, it reads 10 MSR/CPU. This can be observed as 10 "Function Call Interrupts" per CPU per sample added to /proc/interrupts. This overhead is measurable on large idle systems, and as Yoquan Song pointed out, it can even trick cpuidle into thinking the system is busy. Here turbostat re-schedules itself in-turn to each CPU so that its MSR reads will always be local. This replaces the 10 "Function Call Interrupts" with a single "Rescheduling interrupt" per sample per CPU. On an idle 32-CPU system, this shifts some residency from the shallow c1 state to the deeper c7 state: # ./turbostat.old -s %c0 GHz TSC %c1 %c3 %c6 %c7 %pc2 %pc3 %pc6 %pc7 0.27 1.29 2.29 0.95 0.02 0.00 98.77 20.23 0.00 77.41 0.00 0.25 1.24 2.29 0.98 0.02 0.00 98.75 20.34 0.03 77.74 0.00 0.27 1.22 2.29 0.54 0.00 0.00 99.18 20.64 0.00 77.70 0.00 0.26 1.22 2.29 1.22 0.00 0.00 98.52 20.22 0.00 77.74 0.00 0.26 1.38 2.29 0.78 0.02 0.00 98.95 20.51 0.05 77.56 0.00 ^C i# ./turbostat.new -s %c0 GHz TSC %c1 %c3 %c6 %c7 %pc2 %pc3 %pc6 %pc7 0.27 1.20 2.29 0.24 0.01 0.00 99.49 20.58 0.00 78.20 0.00 0.27 1.22 2.29 0.25 0.00 0.00 99.48 20.79 0.00 77.85 0.00 0.27 1.20 2.29 0.25 0.02 0.00 99.46 20.71 0.03 77.89 0.00 0.28 1.26 2.29 0.25 0.01 0.00 99.46 20.89 0.02 77.67 0.00 0.27 1.20 2.29 0.24 0.01 0.00 99.48 20.65 0.00 78.04 0.00 cc: Youquan Song <youquan.song@intel.com> Signed-off-by: Len Brown <len.brown@intel.com> 2012-03-29T17:22:06+00:00 Len Brown len.brown@intel.com 2012-02-06T23:37:16+00:00 urn:sha1:e23da0370f80834e971142e50253f5b79be83631 turbostat -s cuts down on the amount of output, per user request. also treak some output whitespace and the man page. Signed-off-by: Len Brown <len.brown@intel.com> 2012-01-18T23:51:48+00:00 Linus Torvalds torvalds@linux-foundation.org 2012-01-18T23:51:48+00:00 urn:sha1:507a03c1cba0e32309223d23d19a1bfc0916c140 This includes initial support for the recently published ACPI 5.0 spec. In particular, support for the "hardware-reduced" bit that eliminates the dependency on legacy hardware. APEI has patches resulting from testing on real hardware. Plus other random fixes. * 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux: (52 commits) acpi/apei/einj: Add extensions to EINJ from rev 5.0 of acpi spec intel_idle: Split up and provide per CPU initialization func ACPI processor: Remove unneeded variable passed by acpi_processor_hotadd_init V2 ACPI processor: Remove unneeded cpuidle_unregister_driver call intel idle: Make idle driver more robust intel_idle: Fix a cast to pointer from integer of different size warning in intel_idle ACPI: kernel-parameters.txt : Add intel_idle.max_cstate intel_idle: remove redundant local_irq_disable() call ACPI processor: Fix error path, also remove sysdev link ACPI: processor: fix acpi_get_cpuid for UP processor intel_idle: fix API misuse ACPI APEI: Convert atomicio routines ACPI: Export interfaces for ioremapping/iounmapping ACPI registers ACPI: Fix possible alignment issues with GAS 'address' references ACPI, ia64: Use SRAT table rev to use 8bit or 16/32bit PXM fields (ia64) ACPI, x86: Use SRAT table rev to use 8bit or 32bit PXM fields (x86/x86-64) ACPI: Store SRAT table revision ACPI, APEI, Resolve false conflict between ACPI NVS and APEI ACPI, Record ACPI NVS regions ACPI, APEI, EINJ, Refine the fix of resource conflict ... 2012-01-18T06:15:54+00:00 Len Brown len.brown@intel.com 2012-01-18T06:15:54+00:00 urn:sha1:79ba0db69c5887f1ad4ed51d58894e7e889084b0 2011-12-15T15:34:20+00:00 Arun Thomas arun.thomas@gmail.com 2011-08-16T22:34:14+00:00 urn:sha1:9b6cf1a0120a80ec342f10c297efaa0ba79f7ab7 Field names were shortened: "pkg" is now "pk", "core" is now "cr" Signed-off-by: Arun Thomas <arun.thomas@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz> 2011-11-18T08:32:01+00:00 Len Brown len.brown@intel.com 2011-11-18T08:32:01+00:00 urn:sha1:553575f1ae048aa44682b46b3c51929a0b3ad337 Signed-off-by: Len Brown <len.brown@intel.com> 2011-11-07T03:14:50+00:00 Len Brown len.brown@intel.com 2011-11-07T03:14:50+00:00 urn:sha1:efb90582c575084723cc14302c1300cb26c7e01f